Commit Graph

17144 Commits

Author SHA1 Message Date
NAKAMURA Takumi
3fc42fd77c test/CodeGen/X86/red-zone2.ll: Add -mtriple=x86_64-linux, and FileCheck-ize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164975 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 22:48:07 +00:00
Jim Grosbach
b4316028b3 MachO: direct-to-object attribute for data-in-code markers.
The target backend can support data-in-code load commands even when
the assembler doesn't, or vice-versa. Allow targets to opt-in for
direct-to-object.

PR13973.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164974 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 22:20:54 +00:00
Reed Kotler
0585b38088 checking test case for r164811. was an omission to not check this in. this was already approved
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164972 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 21:35:06 +00:00
Micah Villmow
7744345a71 Forgot the SPIR test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164949 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 17:07:51 +00:00
Michael Liao
3118937305 Fix PR13899
- Update maximal stack alignment when stack arguments are prepared before a
  call.
- Test cases are enhanced to show it's not a Win32 specific issue but a generic
  one.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164946 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 16:44:04 +00:00
Chandler Carruth
cfb65293c3 Fix more misspellings found by Duncan during review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164940 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 12:30:45 +00:00
Chandler Carruth
673850aa2d Fix several issues with alignment. We weren't always accounting for type
alignment requirements of the new alloca. As one consequence which was
reported as a bug by Duncan, we overaligned memcpy calls to ranges of
allocas after they were rewritten to types with lower alignment
requirements. Other consquences are possible, but I don't have any test
cases for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164937 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 12:16:54 +00:00
Benjamin Kramer
64f27e78c4 SimplifyCFG: Don't crash when forming a switch bitmap with an undef default value.
Fixes PR13985.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164934 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 11:31:48 +00:00
Chandler Carruth
77c1270033 Refactor the PartitionUse structure to actually use the Use* instead of
a pair of instructions, one for the used pointer and the second for the
user. This simplifies the representation and also makes it more dense.

This was noticed because of the miscompile in PR13926. In that case, we
were running up against a fundamental "bad idea" in the speculation of
PHI and select instructions: the speculation and rewriting are
interleaved, which requires phi speculation to also perform load
rewriting! This is bad, and causes us to miss opportunities to do (for
example) vector rewriting only exposed after PHI speculation, etc etc.
It also, in the old system, required us to insert *new* load uses into
the current partition's use list, which would then be ignored during
rewriting because we had already extracted an end iterator for the use
list. The appending behavior (and much of the other oddities) stem from
the strange de-duplication strategy in the PartitionUse builder.
Amusingly, all this went without notice for so long because it could
only be triggered by having *different* GEPs into the same partition of
the same alloca, where both different GEPs were operands of a single
PHI, and where the GEP which was not encountered first also had multiple
uses within that same PHI node... Hence the insane steps required to
reproduce.

So, step one in fixing this fundamental bad idea is to make the
PartitionUse actually contain a Use*, and to make the builder do proper
deduplication instead of funky de-duplication. This is enough to remove
the appending behavior, and fix the miscompile in PR13926, but there is
more work to be done here. Subsequent commits will lift the speculation
into its own visitor. It'll be a useful step toward potentially
extracting all of the speculation logic into a generic utility
transform.

The existing PHI test case for repeated operands has been made more
extreme to catch even these issues. This test case, run through the old
pass, will exactly reproduce the miscompile from PR13926. ;] We were so
close here!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 01:49:22 +00:00
Duncan Sands
b620469223 Ignore apparent buffer overruns on external or weak globals. This is a major
source of false positives due to globals being declared in a header with some
kind of incomplete (small) type, but the actual definition being bigger.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164912 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-30 07:30:10 +00:00
Nadav Rotem
73fab91f2c Revert r164910 because it causes failures to several phase2 builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164911 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-30 07:17:56 +00:00
Nadav Rotem
e5f163a3b9 A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
 int a = p->a;
 int b = p->b;
 q->a = a;
 q->b = b;

2. Consecutive stores where the values are constants. Foe example:
 q->a = 4;
 q->b = 5;



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-30 06:24:14 +00:00
Bob Wilson
eb1641d54a Add LLVM support for Swift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164899 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-29 21:43:49 +00:00
Bob Wilson
154418cdd8 Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164898 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-29 21:27:31 +00:00
Chandler Carruth
b67c9a5b02 Fix a somewhat surprising miscompile where code relying on an ABI
alignment could lose it due to the alloca type moving down to a much
smaller alignment guarantee.

Now SROA will actively compute a proper alignment, factoring the target
data, any explicit alignment, and the offset within the struct. This
will in some cases lower the alignment requirements, but when we lower
them below those of the type, we drop the alignment entirely to give
freedom to the code generator to align it however is convenient.

Thanks to Duncan for the lovely test case that pinned this down. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164891 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-29 10:41:21 +00:00
Duncan Sands
454627252b Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile of
buildbots.  Original commit message:

A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;

2. Consecutive stores where the values are constants. Foe example:
  q->a = 4;
  q->b = 5;



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164890 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-29 10:25:35 +00:00
Nadav Rotem
72f7b0811e A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;

2. Consecutive stores where the values are constants. Foe example:
  q->a = 4;
  q->b = 5;



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-29 06:33:25 +00:00
Evan Cheng
aa7e47416a Add test case for r164850.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164867 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-29 00:12:08 +00:00
Evan Cheng
465970736b Do not delete BBs if their addresses are taken. rdar://12396696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164866 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 23:58:57 +00:00
Akira Hatanaka
21731d876c MIPS DSP: add operands to make sure instruction strings are being matched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164849 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 21:23:16 +00:00
Akira Hatanaka
93ba059e48 MIPS DSP: other miscellaneous instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164845 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 20:50:31 +00:00
Manman Ren
284c1004f7 Testcase for r164835
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164842 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 20:26:33 +00:00
Akira Hatanaka
e91ff1d135 MIPS DSP: ADDUH.QB instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 20:16:04 +00:00
Benjamin Kramer
8be16fe703 CorrelatedPropagation: BasicBlock::removePredecessor can simplify PHI nodes. If the it's the condition of a SwitchInst, reload it.
Fixes PR13972.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 10:42:50 +00:00
Benjamin Kramer
ab16423c91 GlobalOpt: non-constexpr bitcasts or GEPs can occur even if the global value is only stored once.
Fixes PR13968.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 10:01:27 +00:00
Nick Lewycky
7e0e166d17 Surprisingly, we missed a trivial case here. Fix that!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 09:33:53 +00:00
Meador Inge
ce71822d38 instcombine: Add more test cases for __strncpy_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164800 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:31 +00:00
Meador Inge
a968582978 instcombine: Add more test cases for __strcpy_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:28 +00:00
Meador Inge
c8613c9089 instcombine: Add more test cases for __memmove_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164798 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:25 +00:00
Meador Inge
012ffd251b instcombine: Add more test cases for __memcpy_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164797 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:21 +00:00
Meador Inge
910c564d3b instcombine: Add more test cases for __memset_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164796 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:18 +00:00
Jakob Stoklund Olesen
5cf178f281 Enable the new coalescer algorithm by default.
The new coalescer is better at merging values into unused vector lanes,
improving NEON code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164794 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:06:02 +00:00
Akira Hatanaka
cb39aa05af MIPS DSP: ABSQ_S.PH instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 19:09:21 +00:00
Akira Hatanaka
23bb38f034 MIPS DSP: SHLL.QB instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 19:05:08 +00:00
Benjamin Kramer
465251a7ce Fix a integer overflow in SimplifyCFG's look up table formation logic.
If the width is very large it gets truncated from uint64_t to uint32_t when
passed to TD->fitsInLegalInteger. The truncated value can fit in a register.
This manifested in massive memory usage or crashes (PR13946).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164784 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 18:29:58 +00:00
Jakob Stoklund Olesen
ddc26d8936 Avoid dereferencing a NULL pointer.
Fixes PR13943.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 16:34:19 +00:00
Sylvestre Ledru
94c22716d6 Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 10:14:43 +00:00
Sylvestre Ledru
7e2c793a2b Fix a typo 'iff' => 'if'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 09:59:43 +00:00
Nick Lewycky
466e0f38d3 Prefer shuffles to selects. Backends love shuffles!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164763 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 08:33:56 +00:00
Jush Lu
8f50647662 [arm-fast-isel] Add support for ELF PIC.
This is a preliminary step towards ELF support; currently ARMFastISel hasn't
been used for ELF object files yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 05:21:41 +00:00
Akira Hatanaka
5e92990703 Test case for r164755 and 164756.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 04:12:30 +00:00
Akira Hatanaka
a216401621 MIPS DSP: ADDU.QB instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 03:13:59 +00:00
Akira Hatanaka
01f7089bca MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164751 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:15:57 +00:00
Akira Hatanaka
2df483efb3 MIPS DSP: all the remaining instructions which read or write accumulators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164750 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:11:20 +00:00
Akira Hatanaka
fd89e6ffda MIPS DSP: add support for extract-word instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164749 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:05:42 +00:00
Akira Hatanaka
7509ec18d1 MIPS DSP: add vector load/store patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 01:50:59 +00:00
Jim Grosbach
b7abea0840 X86_32: Large Symbol+Offset relocations.
If the offset is more than 24-bits, it won't fit in a scattered
relocation offset field, so we fall back to using a non-scattered
relocation.

rdar://12358909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164724 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 21:27:45 +00:00
Duncan Sands
44401b7c80 Now that invoke of an intrinsic is possible (for the llvm.do.nothing intrinsic)
teach the callgraph logic to not create callgraph edges to intrinsics for invoke
instructions; it already skips this for call instructions.  Fixes PR13903.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164707 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 17:16:01 +00:00
Hans Wennborg
50b7d70707 Address Duncan's comments on r164684:
- Put statistics in alphabetical order
- Don't use getZextValue when building TableInt, just use APInts
- Introduce Create{Z,S}ExtOrTrunc in IRBuilder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164696 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 14:01:53 +00:00
Chandler Carruth
238fd1591e When rewriting the pointer operand to a load or store which has
alignment guarantees attached, re-compute the alignment so that we
consider offsets which impact alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164690 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 10:45:28 +00:00