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5546 Commits

Author SHA1 Message Date
Jim Grosbach
245f5e8e2a Use ARMPseudoExpand for ARM tail calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134719 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 18:50:22 +00:00
Benjamin Kramer
9c64030445 Emit a more efficient magic number multiplication for exact sdivs. 
We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building.

  struct foo { char x[24]; };
  long bar(struct foo *a, struct foo *b) { return a-b; }
is now compiled into
  movl	4(%esp), %eax
  subl	8(%esp), %eax
  sarl	$3, %eax
  imull	$-1431655765, %eax, %eax
instead of
  movl	4(%esp), %eax
  subl	8(%esp), %eax
  movl	$715827883, %ecx
  imull	%ecx
  movl	%edx, %eax
  shrl	$31, %eax
  sarl	$2, %edx
  addl	%eax, %edx
  movl	%edx, %eax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134695 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 10:31:30 +00:00
Jakob Stoklund Olesen
2aa6b4c142 Fix more register allocation sensitive tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134667 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 00:24:06 +00:00
Jakob Stoklund Olesen
caab27963b Remove a test that no longer makes sense. 
It was testing a linear scan feature:

  Test if linearscan is unfavoring registers for allocation to allow
  more reuse of reloads from stack slots.

The greedy register allocator doesn't access any stack slots in this
function, so the linear scan feature was not being tested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134666 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 00:24:03 +00:00
Nick Lewycky
9bf45d0b1a Let the inline asm 'q' constraint match float, and on 64-bit double too. 
Fixes PR9602!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134665 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 00:19:27 +00:00
Eric Christopher
77ed1353bf Go ahead and emit the barrier on x86-64 even without sse2. The 
processor supports it just fine.

Fixes PR9675 and rdar://9740801


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134664 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 00:04:56 +00:00
Eric Christopher
31b5f00c4e Add support for the X86 'l' constraint. 
Fixes PR10149 and rdar://9738585

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134648 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 22:29:07 +00:00
Evan Cheng
18fb1d35db Add Mode64Bit feature and sink it down to MC layer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134641 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 21:06:52 +00:00
Evan Cheng
39dfb0ff84 Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 03:55:05 +00:00
Lang Hames
d0626aacca Added a testcase for PR10220. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134573 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:36:02 +00:00
Jakub Staszak
9da9934e27 Introduce "expect" intrinsic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 18:22:43 +00:00
Dan Gohman
211f53aa04 Revert r134366 and add an explicit triple to make this test host-independent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134447 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-05 22:09:19 +00:00
Jakob Stoklund Olesen
9693d4c3f0 Fix PR10277. 
Remat during spilling triggers dead code elimination. If a phi-def
becomes unused, that may also cause live ranges to split into separate
connected components.

This type of splitting is different from normal live range splitting. In
particular, there may not be a common original interval.

When the split range is its own original, make sure that the new
siblings are also their own originals. The range being split cannot be
used as an original since it doesn't cover the new siblings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134413 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-05 15:38:41 +00:00
NAKAMURA Takumi
7495ea7fe9 test/CodeGen/X86/lsr-nonaffine.ll: Relax expressions for Win64 CC to appease Win32 hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134366 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-03 09:26:14 +00:00
Chandler Carruth
78e4fcecef FileCheck-ize another test. Reduces the llc invocations from 8 to 1, and 
makes one of the tests actually mean something (as the string 'add' will
always appear in the output of this file).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134358 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 21:34:52 +00:00
Chandler Carruth
a42e665442 FileCheck-ize another X86 test, making it more precisely verify the 
desired result based on the comments in the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:43:16 +00:00
Chandler Carruth
aea63ff104 FileCheck-ize and simplify RUN lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134352 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:43:11 +00:00
Chandler Carruth
432a8931e4 FileCheck-ize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134351 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:43:08 +00:00
Chandler Carruth
327b8f1706 FileCheck-ize and tighten up assertions to only check the relevant sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134350 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:43:04 +00:00
Chandler Carruth
44f52f2d39 FileCheck-ize and cleanup IR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134349 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:43:01 +00:00
Chandler Carruth
b3ce947ecf FileCheck-ize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134348 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:59 +00:00
Chandler Carruth
f2a3b35a7c Remove a grep that is already checked with FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134346 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:56 +00:00
Chandler Carruth
3bd210ea8f FileCheck-ize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134345 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:53 +00:00
Chandler Carruth
45177cb85c FileCheck-ize and modernize IR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134344 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:50 +00:00
Chandler Carruth
36da1d9633 FileCheck-ize and simplify RUNs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134343 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:48 +00:00
Chandler Carruth
431d63b560 FileCheck-ize and modernize the RUN line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134342 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:44 +00:00
Chandler Carruth
03119ab3d7 FileCheck-ize, tightening checks and avoiding a temporary file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134341 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:42 +00:00
Chandler Carruth
5a26013390 FileCheck-ize, tightening checks and avoiding a temporary file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134340 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:39 +00:00
Chandler Carruth
2fa43a7315 FileCheck-ize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134339 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:36 +00:00
Chandler Carruth
19318fe135 FileCheck-ize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134338 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:33 +00:00
Chandler Carruth
fa9d797d73 FileCheck-ize a test, avoiding a temporary file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134337 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:31 +00:00
Chandler Carruth
d26117d7f6 FileCheck-ize and simplify this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134336 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:28 +00:00
Chandler Carruth
8a0a4de71f FileCheck-ize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134335 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:25 +00:00
Chandler Carruth
8b89789188 FileCheck-ize another codegen test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134334 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:22 +00:00
Chandler Carruth
d95cb01823 Partially FileCheck-ize a test to remove a weird quoting situation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134333 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:20 +00:00
Chandler Carruth
218674ba61 FileCheck-ize another test, and upgrade its syntax a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:17 +00:00
Chandler Carruth
8f786a5834 FileCheck-ize another codegen test, tightening it up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134331 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:14 +00:00
Chandler Carruth
4d28d7365a FileCheck-ize another test, making it much more precise for testing the 
individual cases, while hard coding less about registers in use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134330 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:11 +00:00
Chandler Carruth
549f123715 FileCheck-ize another test. This one is more clear and runs fewer 
commands as a result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134329 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:08 +00:00
Chandler Carruth
0d390f6366 FileCheck-ize a test, no functionality changed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134328 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 20:42:06 +00:00
Jakob Stoklund Olesen
9d812a2805 Better diagnostics when inline asm fails to allocate. 
asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134310 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 07:17:37 +00:00
Eric Christopher
839656120b Be less specific about register allocation ordering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134308 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-02 04:06:41 +00:00
Eric Christopher
e3997d40de TargetConstant immediates won't be placed into registers so tighten 
up the valid constant check earlier.

rdar://9692967


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134286 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 23:04:38 +00:00
Dan Gohman
71997f303e Teach IVUsers to stop at non-affine expressions unless they are both 
outside the loop and reducible.

This more completely hides them from LSR, which isn't usually able to
do anything meaningful with non-affine expressions anyway, and this
consequently hides them from SCEVExpander, which is acutely unprepared
for non-affine expressions.

Replace test/CodeGen/X86/lsr-nonaffine.ll with a new test that tests
the new behavior.

This works around the bug in PR10117 / rdar://problem/9633149, and is
generally an improvement besides.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134268 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 22:05:19 +00:00
Jim Grosbach
a7603982db ARMv7M vs. ARMv7E-M support. 
The DSP instructions in the Thumb2 instruction set are an optional extension
in the Cortex-M* archtitecture. When present, the implementation is considered
an "ARMv7E-M implementation," and when not, an "ARMv7-M implementation."

Add a subtarget feature hook for the v7e-m instructions and hook it up. The
cortex-m3 cpu is an example of a v7m implementation, while the cortex-m4 is
a v7e-m implementation.

rdar://9572992



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134261 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 21:12:19 +00:00
Eric Christopher
5e653c925c Add support for the 'j' immediate constraint. This is conditionalized on 
supporting the instruction that the constraint is for 'movw'.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134222 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 01:00:07 +00:00
Eric Christopher
d5dc9eca2b Add support for the ARM 't' register constraint. And another testcase 
for the 'x' register constraint.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134220 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 00:30:46 +00:00
Eric Christopher
89bd71fc53 Add support for the 'x' constraint. 
Part of rdar://9307836 and rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134215 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 00:14:47 +00:00
Jakob Stoklund Olesen
098c7ac7c8 Fix a problem with fast-isel return values introduced in r134018. 
We would put the return value from long double functions in the wrong
register.

This fixes gcc.c-torture/execute/conversion.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134205 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 23:42:18 +00:00
Eric Christopher
73744df0c4 Add support for the 'h' constraint. 
Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134203 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 23:23:01 +00:00