Rafael Espindola
54f7533e36
Remove previous commit while I debug the bot failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148156 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 23:28:50 +00:00
Jakob Stoklund Olesen
ece8b73eb2
Use RegisterTuples to generate pseudo-registers.
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The QQ and QQQQ registers are not 'real', they are pseudo-registers used
to model some vld and vst instructions.
This makes the call clobber lists longer, but I intend to get rid of
those soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:55:42 +00:00
Rafael Espindola
cf05d03961
Remove label that is not used anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:41:58 +00:00
Eli Friedman
09a536a88b
Speculatively revert r148132+r148133 to try and fix a buildbot failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148149 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:34:39 +00:00
Jakob Stoklund Olesen
794481d5ca
Skip the NAME field when forming tuples.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148147 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:23:50 +00:00
Andrew Trick
23d1c5ce8a
Remove pointless mode line in .cpp file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 22:04:16 +00:00
Duncan Sands
8d6796b796
Try to clarify a little how exception handling works.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:59:16 +00:00
Devang Patel
85d5aaecd0
Revert r148131, it was committed before it was ready.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:28:58 +00:00
Stepan Dyatkovskiy
5dab2bf293
Cosmetic patch for r148132.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:27:22 +00:00
Stepan Dyatkovskiy
a5a1e46d00
LoopUnswitch: All helper data that is collected during loop-unswitch iterations was moved to separated class (LUAnalysisCache).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:13:54 +00:00
Devang Patel
c798cc4283
Refactor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 19:12:18 +00:00
Devang Patel
4a5c0fd70e
Add new test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 18:45:31 +00:00
Pete Cooper
0f3023c180
Fixed comment. Thanks Duncan!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148123 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 17:52:01 +00:00
Craig Topper
0518970dc8
Convert SHUFPD with the same register for both sources to PSHUFD if it would prevent a register copy. Similar to SHUFPS, but requires the mask to be converted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148112 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 09:21:41 +00:00
Craig Topper
562659ff6b
use v8i32 as optimal mem type over v8f32 if AVX2 is enabled. Similar to SSE2 vs SSE1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 08:32:21 +00:00
Craig Topper
12216172c0
Make X86 instruction selection use 256-bit VPXOR for build_vector of all ones if AVX2 is enabled. This gives the ExeDepsFix pass a chance to choose FP vs int as appropriate. Also use v8i32 as the type for getZeroVector if AVX2 is enabled. This is consistent with SSE2 using prefering v4i32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148108 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 08:12:35 +00:00
NAKAMURA Takumi
db080e814f
test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 07:03:55 +00:00
Craig Topper
c30432ab57
Add patterns for v16i16 and v32i8 immAllZerosV to select VPXOR to match v4i64 and v8i32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148106 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 06:59:47 +00:00
Andrew Trick
96f678f2d7
Added the MachineSchedulerPass skeleton.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148105 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 06:30:30 +00:00
Andrew Trick
b3fe88f837
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148104 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 06:30:25 +00:00
Andrew Trick
524ff020f3
wrong filename
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 06:30:22 +00:00
Andrew Trick
07680ec7a1
80-col violation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 06:30:19 +00:00
Craig Topper
b9c7f652d7
Use 8i32 constant pool entry for converting AVX2_SETALLONES. Possibly fixes PR11750.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 06:12:41 +00:00
Craig Topper
e6cf4a070d
Fix typo in PerformAddCombine that caused any vector type to be checked for horizontal add/sub if AVX2 is enabled. This caused an assert to fail for non 128/256-bit vectors when done before type legalizing. Fixes PR11749.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148096 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 05:04:25 +00:00
Jakob Stoklund Olesen
8dd6f0c835
Delete CodeInit and CodeRecTy from TableGen.
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The code type was always identical to a string anyway. Now it is simply
a synonym. The code literal syntax [{...}] is still valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 03:38:34 +00:00
Jakob Stoklund Olesen
ebaf92c67d
Use uniqued StringInit pointers for lookups.
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This avoids a gazillion StringMap and dynamic_cast calls, making
TableGen run 3x faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148091 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 03:16:35 +00:00
Evan Cheng
c4b527ac06
DAGCombine's logic for forming pre- and post- indexed loads / stores were being
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overly conservative. It was concerned about cases where it would prohibit
folding simple [r, c] addressing modes. e.g.
ldr r0, [r2]
ldr r1, [r2, #4 ]
=>
ldr r0, [r2], #4
ldr r1, [r2]
Change the logic to look for such cases which allows it to form indexed memory
ops more aggressively.
rdar://10674430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 01:37:24 +00:00
Bill Wendling
b4ee5168ab
Fix off-by-one error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148077 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 00:41:53 +00:00
Dan Gohman
79522dc569
Implement proper ObjC ARC objc_retainBlock "escape" analysis, so that
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the optimizer doesn't eliminate objc_retainBlock calls which are needed
for their side effect of copying blocks onto the heap.
This implements rdar://10361249.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 00:39:07 +00:00
Pete Cooper
ddfda5cd16
Added MVT::v2f16
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 23:14:13 +00:00
Bill Wendling
bf5b13d07e
Revert accidental commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148065 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 23:06:28 +00:00
Bill Wendling
86b1a7d614
Fix the code that was WRONG.
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The registers are placed into the saved registers list in the reverse order,
which is why the original loop was written to loop backwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148064 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 23:05:03 +00:00
Pete Cooper
d578b905de
Added FPOW, FEXP, FLOG to PromoteNode so that custom actions can be set to Promote for those operations.
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Sorry, no test case yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148050 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 21:46:18 +00:00
Elena Demikhovsky
16db710898
Fixed a bug in LowerVECTOR_SHUFFLE caused assertion failure
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lc: X86ISelLowering.cpp:6480: llvm::SDValue llvm::X86TargetLowering::LowerVECTOR_SHUFFLE(llvm::SDValue, llvm::SelectionDAG&) const: Assertion `V1.getOpcode() != ISD::UNDEF&& "Op 1 of shuffle should not be undef"' failed.
Added a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 20:33:10 +00:00
Evan Cheng
c16c25fbc3
When hoisting common code, watch out for uses which are marked "kill". If the
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killed registers are needed below the insertion point, then unset the kill
marker.
Sorry I'm not able to find a reduced test case.
rdar://10660944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 20:31:24 +00:00
Rafael Espindola
0577c59196
Add error-reporting tests for platforms that don't support segmented stacks.
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Patch by Brian Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148042 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 20:26:13 +00:00
Rafael Espindola
85b9d43d4c
Support segmented stacks on 64-bit FreeBSD.
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This patch uses tcb_spare field in the tcb structure to store info.
Patch by Jyun-Yan You.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 20:24:30 +00:00
Rafael Espindola
e4d18de5d1
Support segmented stacks on win32.
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Uses the pvArbitrary slot of the TIB, which is reserved for applications. We
only support frames with a static size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148040 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 20:22:08 +00:00
Devang Patel
989a681464
Remove test case, as Chris suggested.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 19:54:02 +00:00
Devang Patel
21d3c40fb0
Add test case to check intel syntax parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 18:40:46 +00:00
Evan Cheng
f0a95356d6
Allow targets to select source order pre-RA scheduler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148033 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 18:27:52 +00:00
Devang Patel
dd929fc704
Rename X86ATTAsmParser -> X86AsmParser
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We are using one parser to parse att as well as intel style syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 18:03:40 +00:00
Jakob Stoklund Olesen
b20b518f80
Make SplitAnalysis::UseSlots private.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148031 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 17:53:44 +00:00
Benjamin Kramer
e2eb92578a
After Jakob's r147938 exception handling on i386 was completely broken.
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Restore the (obviously wrong) behavior from before r147938 without relying on
undefined behavior. Add a fat FIXME note.
This should fix nightly tester failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 17:37:18 +00:00
Nadav Rotem
d2070b00ef
Fix a bug in the AVX 256-bit shuffle code in cases where the splat element is on the boundary of two 128-bit vectors.
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The attached testcase was stuck in an endless loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 15:31:55 +00:00
Benjamin Kramer
fb418bab97
X86: Generalize the x << (y & const) optimization to also catch masks with more set bits set than 31 or 63.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148024 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 12:41:34 +00:00
Evan Cheng
e5dafc3956
Move Sched::Preference out of TargetMachine.h where it is not referenced.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 02:35:23 +00:00
Devang Patel
c59d9df248
Add predicate method check match memory operand size, if available.
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In att style asm syntax memory operand size is derived from suffix attached with mnemonic. In intel style asm syntax it is part of memory operand hence predicate method check is required to select appropriate instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148006 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 01:51:42 +00:00
Bill Wendling
805e2247fc
A DenseMap of a std::map isn't a very good idea because the "grow()" method will
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need to make a deep copy of each of the std::maps. Use a std::map of the
std::map instead. This improves the compile time of sqlite3 by ~2%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148003 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 01:41:03 +00:00
Devang Patel
0a338868b7
Add intel style operand parser skeleton.
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This is a work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12 01:36:43 +00:00