Commit Graph

100703 Commits

Author SHA1 Message Date
Zoran Jovanovic
2a80d7db79 Fixed operand of SC microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202526 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:22:56 +00:00
Rafael Espindola
0164f27742 Drop libtool from llvm.
We were only using it so find the shared library extension and nm. There are
simpler ways to do those things :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202524 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:17:54 +00:00
Zoran Jovanovic
5d945dbe5e Fixed encoding of SYSCALL microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202523 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:17:08 +00:00
Zoran Jovanovic
8f883ae9d3 Revert revision 202518 because of wrong commit message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202521 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:14:16 +00:00
Zoran Jovanovic
60f8980545 Fix operand of SC instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202518 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:02:17 +00:00
Rafael Espindola
fc6cc0edd6 With rpaths being set correctly, SHLIBPATH_VAR is not needed anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202510 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 16:16:51 +00:00
Rafael Espindola
128237d0c7 Correctly set rpath for unittests.
This lets us run the unittest from the command line without setting
LD_LIBRARY_PATH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202509 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 16:11:03 +00:00
Rafael Espindola
37c04a0d4d Centralize the handling of install_name and rpath.
This centralizes the Makefile handling of -install_name and -rpath. It also
moves the cmake build to using @rpath. The reason being that libclang needs it,
and it works for everything else.

A followup patch will move clang to using this and then there will be a single
point to edit to support other systems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202499 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 13:48:03 +00:00
Chandler Carruth
2dc637fce3 [docs] Add a section to the coding standards about languages and such.
A lot of this is writing down common knowledge and things often
communicated on mailing lists and in discussions. It could live in the
Programmer's Manual alternatively, but that felt slightly less
well-fitting.

It also includes (and was motivated by) the section on the relevant
language standards for LLVM and the specific features that will be
enabled with the switch to C++11.

With this, all of the documentation for the C++11 switch is, I think, in
place. I plan to flip the switch RSN. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202497 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 13:35:54 +00:00
Evgeniy Stepanov
2c4b1c4853 X86Operand is extracted into individual header.
X86Operand is extracted into individual header, because it allows to create an
arbitrary memory operand and append it to MCInst. It'll be reused in X86 inline
assembly instrumentation.

Patch by Yuri Gorshenin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202496 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 12:28:07 +00:00
Chandler Carruth
72667d1447 [docs] A slight tweak to the intro for the golden rule in the coding
standards.

It claims the document intentionally doesn't give fixed standards for
brace placement or spacing, and then the document goes on to do
precisely that in several places. Instead, try to highlight that even
these rules are simply *guidance* which may be trumped by some other
circumstance or the local conventions of code.

I'm not trying to change the thrust of this part of the document, and if
folks think this does so, I'm happy to re-wordsmith it. I just don't
want it to be so self-contradicting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202495 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 12:24:18 +00:00
Chandler Carruth
345ca696e7 [docs] Tweak the example to match what is apparantly the desired form
for the style templates we're using.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202494 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 12:14:56 +00:00
Chandler Carruth
a20d48d01a [docs] Switch to external hyperlink references. Much more readable and
hopefully easier to get the formatting right for ReST.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202493 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 12:09:14 +00:00
Chandler Carruth
9447b54039 [docs] Fix my links to use the correct ReST syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202490 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 11:12:14 +00:00
Chandler Carruth
ed0b862022 [docs] Fix 80-column wrap that I messed up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202489 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 11:11:41 +00:00
Chandler Carruth
67814df2c3 [docs] Tweak discussion of BSDs based on feedback from Roman Divacky.
FreeBSD 10.0 and newer have a modern Clang toolchain that should work
well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202488 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 11:09:33 +00:00
Chandler Carruth
baed825f97 [docs] Add a big section with details about how to go about acquiring
a more modern host C++ toolchain for Linux distros where folks sometimes
don't have a good option to get one as part of their system.

This is a first cut, so feedback, testing, and suggestions are very,
very welcom. This is one of the last real documentation changes that was
specifically requested prior to switching LLVM and Clang to build in
C++11 mode by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202486 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 10:56:57 +00:00
NAKAMURA Takumi
bec8cee981 Reorder Mips/MCTargetDesc/CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202483 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 10:18:21 +00:00
Sasa Stankovic
99e493f16f [mips] Add MipsNaClELFStreamer.cpp to CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202482 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 10:14:12 +00:00
Sasa Stankovic
068a8c145a [mips] Implement NaCl sandboxing of indirect jumps:
* Align targets of indirect jumps to instruction bundle boundaries (in MI layer).
  * Add masking instructions before indirect jumps (in MC layer).

Differential Revision: http://llvm-reviews.chandlerc.com/D2847


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202479 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 10:00:38 +00:00
Tobias Grosser
72c42d9341 Add 'remark' diagnostic type in LLVM
A 'remark' is information that is not an error or a warning, but rather some
additional information provided to the user. In contrast to a 'note' a 'remark'
is an independent diagnostic, whereas a 'note' always depends on another
diagnostic.

A typical use case for remark nodes is information provided to the user, e.g.
information provided by the vectorizer about loops that have been vectorized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202474 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 09:08:45 +00:00
Alexey Samsonov
6e2a50ea0a Turn static inline functions to inline, following Rafael's suggestion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202473 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 08:23:09 +00:00
Hal Finkel
3d2ce7a5a7 Swap PPC isel operands to allow for 0-folding
The PPC isel instruction can fold 0 into the first operand (thus eliminating
the need to materialize a zero-containing register when the 'true' result of
the isel is 0). When the isel is fed by a bit register operation that we can
invert, do so as part of the bit-register-operation peephole routine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202469 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 06:11:16 +00:00
Rui Ueyama
49c76560f3 llvm-objdump: Fix crash bug with printing unwind info on stripped file.
The current COFF unwind printer tries to print SEH handler function names,
assuming that it can always find function names in string table. It crashes
if file being read has no symbol table (i.e. executable).

With this patch, llvm-objdump prints SEH handler's RVA if there's no symbol
table entry for that RVA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202466 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 05:21:29 +00:00
Rui Ueyama
6738a1ba7a Style fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202465 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 05:21:26 +00:00
Rafael Espindola
0ff25b31d8 Now that it is possible, use the mangler in IRObjectFile.
A really simple patch marks the end of a lot of yak shaving :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202463 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 02:17:23 +00:00
Rui Ueyama
5de0f3d6da Rename coff_pdata_x64 -> coff_runtime_function_x64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202460 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 01:18:58 +00:00
Hal Finkel
b7a2ea7228 Trying to unbreak the darwin11 builder
The CR bit tracking code broke PPC/Darwin; trying to get it working again...

(the darwin11 builder, which defaults to the darwin ABI when running PPC tests,
asserted when running test/CodeGen/PowerPC/inverted-bool-compares.ll)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 01:17:25 +00:00
Hal Finkel
ff455c0954 Try to unbreak the C++11 build
Cannot use negative numbers in case statements without running afoul of -Wc++11-narrowing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202455 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 00:45:27 +00:00
NAKAMURA Takumi
d477e841dc [CMake] llvm_add_library(SHARED|STATIC): Fix broken OUTPUT_NAME for *_static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202454 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 00:28:13 +00:00
Hal Finkel
36e1825e68 Add CR-bit tracking to the PowerPC backend for i1 values
This change enables tracking i1 values in the PowerPC backend using the
condition register bits. These bits can be treated on PowerPC as separate
registers; individual bit operations (and, or, xor, etc.) are supported.
Tracking booleans in CR bits has several advantages:

 - Reduction in register pressure (because we no longer need GPRs to store
   boolean values).

 - Logical operations on booleans can be handled more efficiently; we used to
   have to move all results from comparisons into GPRs, perform promoted
   logical operations in GPRs, and then move the result back into condition
   register bits to be used by conditional branches. This can be very
   inefficient, because the throughput of these CR <-> GPR moves have high
   latency and low throughput (especially when other associated instructions
   are accounted for).

 - On the POWER7 and similar cores, we can increase total throughput by using
   the CR bits. CR bit operations have a dedicated functional unit.

Most of this is more-or-less mechanical: Adjustments were needed in the
calling-convention code, support was added for spilling/restoring individual
condition-register bits, and conditional branch instruction definitions taking
specific CR bits were added (plus patterns and code for generating bit-level
operations).

This is enabled by default when running at -O2 and higher. For -O0 and -O1,
where the ability to debug is more important, this feature is disabled by
default. Individual CR bits do not have assigned DWARF register numbers,
and storing values in CR bits makes them invisible to the debugger.

It is critical, however, that we don't move i1 values that have been promoted
to larger values (such as those passed as function arguments) into bit
registers only to quickly turn around and move the values back into GPRs (such
as happens when values are returned by functions). A pair of target-specific
DAG combines are added to remove the trunc/extends in:
  trunc(binary-ops(binary-ops(zext(x), zext(y)), ...)
and:
  zext(binary-ops(binary-ops(trunc(x), trunc(y)), ...)
In short, we only want to use CR bits where some of the i1 values come from
comparisons or are used by conditional branches or selects. To put it another
way, if we can do the entire i1 computation in GPRs, then we probably should
(on the POWER7, the GPR-operation throughput is higher, and for all cores, the
CR <-> GPR moves are expensive).

POWER7 test-suite performance results (from 10 runs in each configuration):

SingleSource/Benchmarks/Misc/mandel-2: 35% speedup
MultiSource/Benchmarks/Prolangs-C++/city/city: 21% speedup
MultiSource/Benchmarks/MiBench/automotive-susan: 23% speedup
SingleSource/Benchmarks/CoyoteBench/huffbench: 13% speedup
SingleSource/Benchmarks/Misc-C++/Large/sphereflake: 13% speedup
SingleSource/Benchmarks/Misc-C++/mandel-text: 10% speedup

SingleSource/Benchmarks/Misc-C++-EH/spirit: 10% slowdown
MultiSource/Applications/lemon/lemon: 8% slowdown

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202451 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 00:27:01 +00:00
Hal Finkel
c72cf87285 Add an OutPatFrag TableGen class
Unfortunately, it is currently impossible to use a PatFrag as part of an output
pattern (the part of the pattern that has instructions in it) in TableGen.
Looking at the current implementation, this was clearly intended to work (there
is already code in place to expand patterns in the output DAG), but is
currently broken by the baked-in type-checking assumption and the order in which
the pattern fragments are processed (output pattern fragments need to be
processed after the instruction definitions are processed).

Fixing this is fairly simple, but requires some way of differentiating output
patterns from the existing input patterns. The simplest way to handle this
seems to be to create a subclass of PatFrag, and so that's what I've done here.

As a simple example, this allows us to write:

def crnot : OutPatFrag<(ops node:$in),
                       (CRNOR $in, $in)>;

def       : Pat<(not i1:$in),
                (crnot $in)>;

which captures the core use case: handling of repeated subexpressions inside
of complicated output patterns.

This will be used by an upcoming commit to the PowerPC backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202450 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 00:26:56 +00:00
Hal Finkel
1a13499abf Fix visitTRUNCATE for legal i1 values
This extract-and-trunc vector optimization cannot work for i1 values as
currently implemented, and so I'm disabling this for now for i1 values. In the
future, this can be fixed properly.

Soon I'll commit support for i1 CR bit tracking in the PowerPC backend, and
this will be covered by one of the existing regression tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202449 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 00:26:45 +00:00
Rui Ueyama
64e9de348b Remove unnecessary temporary variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202445 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 00:06:20 +00:00
Rui Ueyama
8594ec6570 Object/COFF: Add a struct for the function table in .pdata.
This is the data structure listed on Microsoft PE/COFF Spec Revision 8.3, p. 80.
The name of the struct is not mentioned in the Microsoft PE/COFF spec, so I made
it up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202438 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 22:20:07 +00:00
Andrew Trick
4c34f71b81 Provide a target override for the latest regalloc heuristic.
This is a temporary workaround for native arm linux builds:
PR18996: Changing regalloc order breaks "lencod" on native arm linux builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202433 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 21:37:33 +00:00
Andrew Trick
594e2aa61e Drive-by comment fix. This regalloc comment was not accurate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202432 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 21:37:30 +00:00
Chandler Carruth
d76403be1d [docs] Stop advertising 'make update'. It isn't implemented in CMake and
seems unlikely to be added. It also doesn't seem like it should be part
of the build system at all (consider out-of-tree builds).

We should probably add nice, easy tool for this that works both for svn
client trees and git-svn client trees, but it probably won't be spelled
"make update".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202430 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 21:19:42 +00:00
Roman Divacky
14551f041b Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding
expensive libcall. Also, Qp_neg is not implemented on at least
FreeBSD. This is also what gcc is doing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 19:26:29 +00:00
Matheus Almeida
3e31a5684a Add getter method to access Reloc::Model.
Some MC components like Target Streamers or Assembly Parsers
may need to access the relocation model in order to expand
some directives and/or assembly macros.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202418 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 18:39:53 +00:00
Eric Christopher
e6a9693ab1 Revert r201751 and solve the const problem a different way - by
making the cache mutable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202417 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 18:36:10 +00:00
Adrian Prantl
4bd26ae070 Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now
scan the register file for sub- and super-registers.
No functionality change intended.

(Tests are updated because the comments in the assembler output are
different.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202416 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 17:56:08 +00:00
Richard Osborne
cc331c8f40 [XCore] Support functions returning more than 4 words.
If a function returns a large struct by value return the first 4 words
in registers and the rest on the stack in a location reserved by the
caller. This is needed to support the xC language which supports
functions returning an arbitrary number of return values. This is
r202397 reapplied with a fix to avoid an uninitialized read of a member.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202414 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 17:47:54 +00:00
Richard Osborne
870d997d8c [XCore] Make LowerCallResult a static function.
No functionality change. This is r202396 reapplied with no changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202413 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 17:47:48 +00:00
Rafael Espindola
b9e06b97ce Remove MCPureStreamer.
We moved MCJIT to use native object formats a long time ago and R600
now uses ELF, so it was dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202408 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 16:17:34 +00:00
Alexander Kornienko
106a28c770 Re-apply r200853, which should not crash after Clang plugins were converted to loadable modules in r201256.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202404 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 14:47:37 +00:00
Richard Osborne
e4db795a4c Revert r202396, r202397.
These are causing test failures, revert for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202398 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 14:24:13 +00:00
Richard Osborne
ad4ffce35f [XCore] Support functions returning more than 4 words.
Summary:
If a function returns a large struct by value return the first 4 words
in registers and the rest on the stack in a location reserved by the
caller. This is needed to support the xC language which supports
functions returning an arbitrary number of return values.

Reviewers: robertlytton

Reviewed By: robertlytton

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2889

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202397 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 14:00:40 +00:00
Richard Osborne
6257ef8732 [XCore] Make LowerCallResult a static function.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202396 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 14:00:34 +00:00
Richard Osborne
c26292d4dc [XCore] Target optimized library function __memcpy_4()
Summary:
If the src, dst and size of a memcpy are known to be 4 byte aligned we
can call __memcpy_4() instead of memcpy().

Reviewers: robertlytton

Reviewed By: robertlytton

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2871

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202395 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 13:39:07 +00:00