Commit Graph

23906 Commits

Author SHA1 Message Date
Tom Stellard
2a90e446c0 R600/SI: Only select SALU instructions in the entry or exit block
SALU instructions ignore control flow, so it is not always safe to use
them within branches.  This is a partial solution to this problem
until we can come up with something better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207590 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 23:12:48 +00:00
Tom Stellard
19a970b2da R600: optimize the UDIVREM 64 algorithm
This is a squash of several optimization commits:
 - calculate DIV_Lo and DIV_Hi separately
 - use BFE_U32 if we are operating on 32bit values
 - use precomputed constants instead of shifting in UDVIREM
 - skip the first 32 iterations of udivrem

v2: Check whether BFE is supported before using it

Patch by: Jan Vesely

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207589 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 23:12:46 +00:00
Rafael Espindola
2259a26a5d Also handle ConstantAggregateZero when optimizing vpermilvar*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207582 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 22:20:40 +00:00
Rafael Espindola
984f2fc09e Two fixes to the vpermilvar optimization.
The instcomine logic to handle vpermilvar's pd and 256 variants was incorrect.
The _256 variants have indexes into the individual 128 bit lanes and in all
cases it also has to mask out unused bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207577 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 20:41:54 +00:00
Diego Novillo
55deff895d Fix vectorization remarks.
This patch changes the vectorization remarks to also inform when
vectorization is possible but not beneficial.

Added tests to exercise some loop remarks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207574 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 20:06:10 +00:00
Yi Jiang
bbea6143f2 Continue slp vectorization even the BB already has vectorized store radar://16641956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207572 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 19:37:20 +00:00
Reed Kotler
52c03fbb3b Add Simple return instruction to Mips fast-isel
Reviewers: dsanders

Reviewed by: dsanders

Differential Revision: http://reviews.llvm.org/D3430



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207565 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 17:57:50 +00:00
Tilmann Scheller
e26c8c2d82 [ARM64] Disable regression tests for the old JIT.
Since the ARM64 backend doesn't implement support for the old JIT those tests are failing when the regression tests are run on an AArch64 host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207530 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 15:02:40 +00:00
Daniel Sanders
4551e311c6 [mips][msa] Use CHECK-LABEL in basic_operations*.ll
Differential Revision: http://reviews.llvm.org/D3536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207529 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 14:28:58 +00:00
Joerg Sonnenberger
edc4595472 Parse and create GOT_PREL relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207526 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 13:42:02 +00:00
Daniel Sanders
285c5693b8 [mips][msa] Fix element extraction where the index is variable.
Summary:
This isn't supported directly so we splat the vector element and extract
the most convenient copy.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://reviews.llvm.org/D3530

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207524 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 13:31:37 +00:00
Rafael Espindola
1c5f439f41 Centralize the handling of the thumb bit.
This patch centralizes the handling of the thumb bit around
MCStreamer::isThumbFunc and makes isThumbFunc handle aliases.

This fixes a corner case, but the main advantage is having just one
way to check if a MCSymbol is thumb or not. This should still be
refactored to be ARM only, but at least now it is just one predicate
that has to be refactored instead of 3 (isThumbFunc,
ELF_Other_ThumbFunc, and SF_ThumbFunc).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207522 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 12:46:50 +00:00
Tim Northover
65baf804ba ARM: fix test after change to indirect symbol emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207519 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 10:13:10 +00:00
Tim Northover
d5d3e188f0 X86: emit hidden stubs into a proper non_lazy_symbol_pointer section.
rdar://problem/16660411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207518 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 10:06:10 +00:00
Tim Northover
8ea9566fee ARM: emit hidden stubs into a proper non_lazy_symbol_pointer section.
rdar://problem/16660411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207517 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 10:06:05 +00:00
Benjamin Kramer
43705683fd AArch64: Mark vector long multiplication as expand.
There are no patterns for this. This was already fixed for ARM64 but I forgot
to apply it to AArch64 too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207515 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 09:37:54 +00:00
Elena Demikhovsky
e3e08acd09 AVX-512: optimized a shuffle pattern to VINSERTI64x4.
Added intrinsics for VPERMT2PS/PD/D/Q instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207513 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 09:09:15 +00:00
Zinovy Nis
c5e41aed09 [OPENMP][LV][D3423] Respect Hints.Force meta-data for loops in LoopVectorizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207512 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 08:55:11 +00:00
Hao Liu
5bbe6121c3 [ARM64]Fix a bug about incorrect operand order in an EXT instruction, which is introduced by r207485.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207500 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 07:51:19 +00:00
Hao Liu
270f09d712 [ARM64]Fix a bug when lowering shuffle vector to an EXT instruction.
E.g. Mask like <-1, -1, 1, ...> will generate incorrect EXT index.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207485 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 01:50:36 +00:00
Chandler Carruth
af09fb613f Revert r207271 for now. This commit introduced a test case that ran
clang directly from the LLVM test suite! That doesn't work. I've
followed up on the review thread to try and get a viable solution sorted
out, but trying to get the tree clean here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207462 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 23:07:49 +00:00
Rafael Espindola
1c509556ee Add an option for evaluating past symbols.
When evaluating an assembly expression for a relocation, we want to
stop at MCSymbols that are in the symbol table, even if they are variables.
This is needed since the semantics may require that the relocation use them.

That is not the case when computing the value of a symbol in the symbol table.
There are no relocations in this case and we have to keep going until we hit
a section or find out that the expression doesn't have an assembly time
value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207445 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 20:53:11 +00:00
David Blaikie
becd8e75b8 DwarfDebug: Omit DW_AT_object_pointer on inlined_subroutines
While refactoring out constructScopeDIE into two functions I realized we
were emitting DW_AT_object_pointer in the inlined subroutine when we
didn't need to (GCC doesn't, and the abstract subprogram definition has
the information already).

So here's the refactoring and the bug fix. This is one step of
refactoring to remove some subtle memory ownership semantics. It turns
out the original constructScopeDIE returned ownership in its return
value in some cases and not in others. The split into two functions now
separates those two semantics - further cleanup (unique_ptr, etc) will
follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207441 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 20:27:02 +00:00
Duncan P. N. Exon Smith
96837f7232 Reapply "blockfreq: Approximate irreducible control flow"
This reverts commit r207287, reapplying r207286.

I'm hoping that declaring an explicit struct and instantiating
`addBlockEdges()` directly works around the GCC crash from r207286.
This is a lot more boilerplate, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207438 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 20:02:29 +00:00
Hans Wennborg
6426666f65 InstCombine: don't drop 'inalloca' in PromoteCastOfAllocation (PR19569)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207426 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 17:40:03 +00:00
Chad Rosier
2f3691eb61 [ARM64] Fix an issue where we were always assuming a copy was coming from a D subregister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207423 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 16:21:50 +00:00
Rafael Espindola
0af058ff9c Don't include an invalid symbol in the symbol table.
The symbol table itself has no relocations, so it is not possible to represent
things like

a = undefined + 1

With the patch we just omit these variables. That matches the behaviour of the
gnu assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207419 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 13:39:57 +00:00
Rafael Espindola
086e9aaa55 List the entire symbol table in this test.
This will allow us to extend this test to show that other symbols don't
show up in the symbol table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207418 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 13:26:35 +00:00
Rafael Espindola
c074b096d5 Produce an error instead of a crash in an expr we cannot represent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207414 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 12:40:50 +00:00
Tim Northover
16aac4387f ARM64: diagnose use of v16-v31 in certain indexed NEON instructions.
Someone couldn't bear to have a completely orthogonal set of floating-point
registers, so we've got some instructions that only accept v0-v15 (coming in
ARMv9, V128_prime: you're allowed v2, v3, v5, v7, ...).

Anyway, we were permitting even the out of range registers during assembly
(CodeGen handled it correctly). This adds a diagnostic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207412 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 11:27:43 +00:00
Chandler Carruth
d6d57bc3fb [inliner] Significantly improve the compile time in cases like PR19499
by avoiding inlining massive switches merely because they have no
instructions in them. These switches still show up where we fail to form
lookup tables, and in those cases they are actually going to cause
a very significant code size hit anyways, so inlining them is not the
right call. The right way to fix any performance regressions stemming
from this is to enhance the switch-to-lookup-table logic to fire in more
places.

This makes PR19499 about 5x less bad. It uncovers a second compile time
problem in that test case that is unrelated (surprisingly!).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207403 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 08:52:44 +00:00
Hao Liu
0ddc7447d9 [ARM64]Fix a bug cannot select UQSHL/SQSHL with constant i64 shift amount.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 07:34:27 +00:00
Chandler Carruth
7a36912a9d Update tests to use the new format of printing a TimeValue. It's a bit
odd to have the output of 'llvm-ar tv' depend on the format of
TimeValue::str(), but that's what we have today. If anyone needs the
output to remain compatible with GNU ar or old versions of llvm-ar, just
shout and I'll switch the code to manually format its times.

Note that there isn't a portable format -- Mac and GNU have different
formats at least (thanks Rafael!) so...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207387 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-28 01:24:32 +00:00
Rafael Espindola
2dc04b4604 Add emitThumbSet to the arm target streamer.
This fixes the asm printer implementation and lets the parser be unaware of
what .thumb_set is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 20:23:58 +00:00
Benjamin Kramer
3551384ae2 X86TTI: Adjust sdiv cost now that we can lower it on plain SSE2.
Includes a fix for a horrible typo that caused all SDIV costs to be
slightly off :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207371 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 18:47:54 +00:00
Benjamin Kramer
ad1f916eaf X86: If SSE4.1 is missing lower SMUL_LOHI of v4i32 to pmuludq and fix up the high parts.
This is more expensive than pmuldq but still cheaper than scalarizing the whole thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207370 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 18:47:41 +00:00
Saleem Abdulrasool
189a2a91c7 MC: duplicate .file test for WoA (SVN r207341)
Since the COFF tests are dependent on X86, duplicate the test for ARM.  Use the
default check prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207365 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 16:10:57 +00:00
NAKAMURA Takumi
1d7595a123 Revert r206989, "Mark llvm/test/BugPoint/compile-custom.ll as XFAIL:vg_leak." It has been fixed since r207265.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 11:59:33 +00:00
Benjamin Kramer
3fd5902758 Update test not to check for a shuffle of an all-zero vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207354 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 11:54:45 +00:00
Benjamin Kramer
55e03c1992 SelectionDAG: Aggressively fold shuffles of constant splats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207352 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 11:41:06 +00:00
Saleem Abdulrasool
b7c41fe882 tests: Windows ARM now supports object emission
Update lit.cfg with the fact that LLVM can now generate WoA PE/COFF objects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207347 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 04:29:36 +00:00
Saleem Abdulrasool
86e4b7dadb COFF: move ARM COFF test to ARM directory
The COFF tests all assume X86.  Just move the new COFF tests under ARM to
appease the build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207346 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 04:29:32 +00:00
Saleem Abdulrasool
2d0d7fd085 Add WoA object file emission support
Introduce support for WoA PE/COFF object file emission from LLVM.  Add the new
target specific PE/COFF Streamer (ARMWinCOFFStreamer) that handles the ARM
specific behaviour of PE/COFF object emission.  ARM exception information is not
yet emitted and is a TODO item.

The ARM specific object writer (ARMWinCOFFObjectWriter) handles the ARM specific
relocation handling in conjunction with the WinCOFFObjectWriter in the MC layer.
The MC layer needs to be updated to deal with the relocation adjustments.
Branch relocations are adjusted by 4 bytes (unlikely their ELF counterparts).

Minor tweaks to switch multiple conditional checks into equivalent switch
statements.  The ObjectFileInfo is updated to relax the object file setup for
Windows COFF.  Move the architecture checks into an assertion.  Windows COFF is
currently only supported on x86, x86_64, and ARM (thumb).  Rather than
defaulting to ELF, we will refuse to generate an object file.  This is better
though as you do not get an (arbitrary) object file which is different from the
request.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207345 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-27 03:48:22 +00:00
Benjamin Kramer
eb3430cfbd DAGCombiner: Simplify code a bit, make more transforms work with vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207338 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-26 23:09:49 +00:00
David Blaikie
5fc870ddf5 DebugInfo: Fix and test a regression caused by r207263 causing the DW_AT_object_pointer to go missing on blocks
Noticed by inspection. Test coverage added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207333 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-26 22:12:18 +00:00
David Blaikie
d7d65435f7 Include C++ source for debug info test case committed in r207323
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207324 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-26 18:25:07 +00:00
David Blaikie
4f18a81aba DWARF Type Units: Avoid emitting type units under fission if the type requires an address.
Since there's no way to ensure the type unit in the .dwo and the type
unit skeleton in the .o are correlated, this cannot work.

This implementation is a bit inefficient for a few reasons, called out
in comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-26 17:27:38 +00:00
Benjamin Kramer
d9ced7112e X86TTI: i16/i32 vector div with a constant (splat) divisor are reasonably cheap now.
Turn vectorization back on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207320 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-26 14:53:05 +00:00
Benjamin Kramer
9f2c21871c X86: Lower SMUL_LOHI of v4i32 to pmuldq when SSE4.1 is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207318 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-26 14:12:19 +00:00
Benjamin Kramer
fb625eadf9 X86: Add patterns for MULHU/MULHS of v8i16 and v16i16.
This gets us pretty code for divs of i16 vectors. Turn the existing
intrinsics into the corresponding nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207317 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-26 13:01:03 +00:00