Commit Graph

3431 Commits

Author SHA1 Message Date
Dan Gohman
2dad0250f6 Prune a few dependencies on MachineFunction.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52976 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 18:15:35 +00:00
Evan Cheng
4576f6d7a9 Do not use computationally expensive scheduling heuristics with -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52971 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 18:05:03 +00:00
Duncan Sands
d9ad8abc8e Highlight that getMergeValues optimization is
being suppressed here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52952 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 08:00:49 +00:00
Dan Gohman
4406604047 Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 00:05:16 +00:00
Dan Gohman
d19a53ba1d std::ostream and std::string microoptimizations for asm printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52929 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 22:03:41 +00:00
Dan Gohman
87060f55f2 Update comments to new-style syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52925 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 21:00:56 +00:00
Dan Gohman
7f460203b0 Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect its
purpose, and give it a custom SDNode subclass so that it doesn't
need to have line number, column number, filename string, and
directory string, all existing as individual SDNodes to be the
operands.

This was the only user of ISD::STRING, StringSDNode, etc., so
remove those and some associated code.

This makes stop-points considerably easier to read in
-view-legalize-dags output, and reduces overhead (creating new
nodes and copying std::strings into them) on code containing
debugging information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52924 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 20:59:49 +00:00
Evan Cheng
db8d56b825 Split scheduling from instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52923 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 20:45:06 +00:00
Duncan Sands
f9516208e5 Revert the SelectionDAG optimization that makes
it impossible to create a MERGE_VALUES node with
only one result: sometimes it is useful to be able
to create a node with only one result out of one of
the results of a node with more than one result, for
example because the new node will eventually be used
to replace a one-result node using ReplaceAllUsesWith,
cf X86TargetLowering::ExpandFP_TO_SINT.  On the other
hand, most users of MERGE_VALUES don't need this and
for them the optimization was valuable.  So add a new
utility method getMergeValues for creating MERGE_VALUES
nodes which by default performs the optimization.
Change almost everywhere to use getMergeValues (and
tidy some stuff up at the same time).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 10:19:09 +00:00
Anton Korobeynikov
4d580651b3 Unbreak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52866 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:10:06 +00:00
Anton Korobeynikov
f0302cd1ae Temporary rever invalid commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52865 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:09:48 +00:00
Anton Korobeynikov
e51ab444f4 Move printing of module-level GVs into dedicated helper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52864 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:09:32 +00:00
Anton Korobeynikov
31f98154a7 Use common naming convention
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52863 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:09:17 +00:00
Anton Korobeynikov
1ecf0eedc4 Factor out stuff into helper function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52862 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:09:01 +00:00
Anton Korobeynikov
36a5701ad7 Cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52861 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:08:44 +00:00
Anton Korobeynikov
75b6882d3c Remove X86SharedAsmPrinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52860 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:08:27 +00:00
Anton Korobeynikov
9136438b08 whitespace cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52859 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:08:09 +00:00
Anton Korobeynikov
1c4b5eaa46 Make intel asmprinter child of generic asmprinter, not x86 shared asm printer. This leads to some code duplication, which will be resolved later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52858 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:07:54 +00:00
Anton Korobeynikov
271329af24 Cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52857 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:07:35 +00:00
Anton Korobeynikov
b131b44443 Whitespace cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52856 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28 11:07:18 +00:00
Anton Korobeynikov
8573986f30 Use StringSet instead of std::set<std::string>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52836 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-27 21:22:49 +00:00
Dale Johannesen
b5dae00325 Fixes the last x86-64 test failure in compat.exp:
<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code.  The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing.  This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52750 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-26 01:51:13 +00:00
Evan Cheng
ab26227c8c - Fix a x86 vector isel bug: illegal transformation of a vector_shuffle into a
shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
  awful codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52740 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 20:52:59 +00:00
Dan Gohman
fd4418fc9b Remove the OrigVT member from AtomicSDNode, as it is redundant with
the base SDNode's VTList.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52722 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 16:07:49 +00:00
Mon P Wang
2887310630 Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 08:15:39 +00:00
Evan Cheng
601ca4b434 Enable two-address remat by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52701 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 01:16:38 +00:00
Dale Johannesen
a68f9013f2 Add v2f32 (MMX) type to X86. Support is primitive:
load,store,call,return,bitcast.  This is enough to
make call and return work.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52691 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 22:01:44 +00:00
Evan Cheng
9ef4ca2e81 If it's determined safe, remat MOV32r0 (i.e. xor r, r) and others as it is instead of using the longer MOV32ri instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52670 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 07:10:51 +00:00
Dan Gohman
2d0d59380a Add a note about a potential PIC optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 00:53:07 +00:00
Dan Gohman
db7991de75 Fixes for being compiled PIC on Linux. This isn't the most
general solution possible, but it's a fairly simple one.
Based on a patch from the OpenGTL project!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52662 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 00:50:01 +00:00
Dan Gohman
09d3fdc254 Remove unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52613 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-22 19:21:26 +00:00
Eli Friedman
2c8e64d3e4 Fix a bug with <8 x i16> shuffle lowering on X86 where parts of the
shuffle could be skipped.  The check is invalid because the loop index i 
doesn't correspond to the element actually inserted. The correct check is
already done a few lines earlier, for whether the element is already in 
the right spot, so this shouldn't have any effect on the codegen for 
code that was already correct.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52486 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 06:09:51 +00:00
Evan Cheng
359e9371b9 XOR32rr, etc. are not AsCheapAsMove, but MOV32ri, etc. are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52454 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-18 08:13:07 +00:00
Evan Cheng
fab8387384 Unbreak DECLARE isel in pic mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52439 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-18 02:48:27 +00:00
Evan Cheng
851bc04533 Rather than avoiding to wrap ISD::DECLARE GV operand in X86ISD::Wrapper, simply handle it at dagisel time with x86 specific isel code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52377 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 02:01:22 +00:00
Evan Cheng
4e444436f2 Horizontal-add instructions are not commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52363 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 21:16:24 +00:00
Evan Cheng
35b9a7790e mpsadbw is commutable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52352 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 20:25:59 +00:00
Evan Cheng
58dcb0e0cd Add option to commuteInstruction() which forces it to create a new (commuted) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52308 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 07:33:11 +00:00
Andrew Lenharth
507a58ac9b add missing atomic intrinsic from gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52270 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-14 05:48:15 +00:00
Duncan Sands
d4b9c17fb7 Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores.  In fact this
is almost all of them!  There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access.  These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used.  Consider
loading an i32 but only using the lower 8 bits.  It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes.  It
is also unwise to make a load/store wider.  For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects.  (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware.  (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several.  For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores).  In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic.  My policy here is
to say that the number of processor operations for
an illegal operation is undefined.  So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok.  It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal!  That is because
operations are marked legal by default, regardless of
whether the type is legal or not.  In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation.  However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal.  So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before.  This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-13 19:07:40 +00:00
Anton Korobeynikov
096b461b2e Properly lower DYNAMIC_STACKALLOC - bracket all black magic with
CALLSEQ_BEGIN & CALLSEQ_END.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52225 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-11 20:16:42 +00:00
Rafael Espindola
d674b4e87d add support for PIC on linux x86-64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 09:52:31 +00:00
Duncan Sands
8e4eb09b1e Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits.  Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 20:54:56 +00:00
Duncan Sands
83ec4b6711 Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 12:08:01 +00:00
Evan Cheng
1b022cf688 Don't break strict aliasing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-05 22:59:21 +00:00
Dale Johannesen
428ac54894 Add StringConstantPrefix to control what the
assembler names of string constants look like.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51909 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-03 18:09:06 +00:00
Rafael Espindola
da5860fa8b Don't use the GOT for symbols that are not externally visible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51865 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 07:52:43 +00:00
Dan Gohman
e4c67cdab4 Teach the DAGISelEmitter to not compute the variable_ops operand
index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51808 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 02:11:25 +00:00
Bill Wendling
37a6134165 Add the "AsCheapAsAMove" flag to some 64-bit xor instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51761 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-30 06:47:04 +00:00
Dan Gohman
b4106170dd Add patterns for CALL32m and CALL64m. They aren't matched in most
cases due to an isel deficiency already noted in
lib/Target/X86/README.txt, but they can be matched in this fold-call.ll
testcase, for example.

This is interesting mainly because it exposes a tricky tblgen bug;
tblgen was incorrectly computing the starting index for variable_ops
in the case of a complex pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51706 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 21:50:34 +00:00