Commit Graph

85241 Commits

Author SHA1 Message Date
Andrew Trick
2f1d5d44c0 Cortex-A9 latency fixes (w/ -schedmodel only).
Quick review against the manual revealed a few obvious mistakes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164361 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 05:06:40 +00:00
Michael Liao
fe87c302aa Add missing i8 max/min/umax/umin support
- Fix PR5145 and turn on test 8-bit atomic ops



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164358 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 03:18:52 +00:00
Michael Liao
0838249a6a Revise td of X86 atomic instructions
- Rewirte most atomic instructions in templates for both better
  maintenance and future extensions, such as HLE in TSX.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164357 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 03:00:17 +00:00
Sean Silva
258aeb5762 docs: Fix Sphinx warning over Atomics.rst.
Atomics.rst was not linked into the toctree.

Docs now build warning-free!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164356 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 02:46:32 +00:00
Sean Silva
5cc1e23247 docs: Fix Sphinx warning over yaml2obj.rst.
yaml2obj.rst was not included in the toctree

Input from Michael Spencer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164355 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 02:46:30 +00:00
NAKAMURA Takumi
b377635592 Mips16FrameLowering.cpp: Remove unused TII introduced in r164349. [-Wunused-variable]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164354 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 02:21:30 +00:00
NAKAMURA Takumi
df03a28990 llvm/test/CodeGen/ARM/fast-isel.ll: Fix possible typos, s/@unaligned_i16_store/@unaligned_i16_load/g.
I guess this had apparently passed in +Asserts possibly due to verborsity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164350 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 01:15:05 +00:00
Akira Hatanaka
0fdf3b029b Properly save and restore RA and Mips16 callee save registers S0,S1
Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164349 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 01:08:16 +00:00
Chad Rosier
3ca380d8d7 Testcase does not need to be this strict.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:47:08 +00:00
Chad Rosier
ba6aec2cf3 Add newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164346 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:43:18 +00:00
Chad Rosier
d70c98e884 [fast-isel] Fallback to SelectionDAG isel if we require strict alignment for
non-halfword-aligned i16 loads/stores.
rdar://12304911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164345 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:41:42 +00:00
Jim Grosbach
d314ab525d Tidy up. Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164344 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:36:42 +00:00
Jim Grosbach
1f9f599e70 Tidy up. Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164343 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:26:53 +00:00
Jim Grosbach
ced674e470 ARM: Use a dedicated intrinsic for vector bitwise select.
The expression based expansion too often results in IR level optimizations
splitting the intermediate values into separate basic blocks, preventing
the formation of the VBSL instruction as the code author intended. In
particular, LICM would often hoist part of the computation out of a loop.

rdar://11011471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:18:20 +00:00
Jakob Stoklund Olesen
e6e2d8cd90 Ignore PHI-defs for -new-coalescer interference checks.
A PHI can't create interference on its own. If two live ranges interfere
at a PHI, they must also interfere when leaving one of the PHI
predecessors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 23:08:42 +00:00
Jakob Stoklund Olesen
2df8ac84ae Extend -new-coalescer SSA update to handle mapped values as well.
The old-fashioned many-to-one value mapping doesn't always work when
merging vector lanes. A value can map to multiple different values, and
it can even be necessary to insert new PHIs.

When a value number is defined by a copy from a value number that
required SSa update, include the live range of the copied value number
in the SSA update as well. It is not necessarily a copy of the original
value number any longer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 23:08:39 +00:00
Eric Christopher
d57ae39a88 Only emit DW_AT_object_pointer if this is a definition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164326 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 22:51:57 +00:00
Manman Ren
554da1a222 SimplifyCFG: sink common codes from IF, ELSE blocks down to END block.
We already have HoistThenElseCodeToIf, this patch implements
SinkThenElseCodeToEnd. When END block has only two predecessors and each
predecessor terminates with unconditional branches, we compare instructions in
IF and ELSE blocks backwards and check whether we can sink the common
instructions down.

rdar://12191395


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 22:37:36 +00:00
Evan Cheng
2dad6b501b Try to make these tests more portable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 21:35:21 +00:00
Benjamin Kramer
902ba576fd Fix broken check lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164317 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 19:54:13 +00:00
Andrew Trick
e9f59888d4 Fix function names in coding style examples
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164311 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 17:02:04 +00:00
Bill Wendling
4aa189909a Revert r164308 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 16:59:57 +00:00
Bill Wendling
f2e89e00b4 Make the 'get*AlignmentFromAttr' functions into member functions within the Attributes class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 16:27:05 +00:00
Bill Wendling
342cea9a0a Remove more bare uses of the different Attribute enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 15:20:36 +00:00
Roman Divacky
c1611d8d10 Specify cpu to get the correct instruction ordering. Remove XFAIL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 14:59:42 +00:00
Bill Wendling
8ce1e432d1 Make the 'getAsString' function a method of the Attributes class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164305 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 14:44:42 +00:00
Nadav Rotem
6dfabb6cc7 Fix 80-col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164297 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 08:53:31 +00:00
Tim Northover
a668b46733 Make sure lli compiles all code before invalidating instruction caches.
Patch from Amara Emerson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 08:46:30 +00:00
Craig Topper
aa258442b9 Change enum type in a static table to uint8_t instead. Saves about 700 hundred bytes of static data. Change unsigned char in same table to uint8_t for explicitness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164285 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 06:14:08 +00:00
Michael Liao
85fb261a55 Specify CPu to prevent failure on ATOM due to different code scheduling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164283 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 03:34:04 +00:00
Sean Silva
f5b69f630c Fix Sphinx warnings.
Toctree was not being interlinked properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164282 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 03:20:53 +00:00
Michael Liao
b118a073d7 Re-work X86 code generation of atomic ops with spin-loop
- Rewrite/merge pseudo-atomic instruction emitters to address the
  following issue:
  * Reduce one unnecessary load in spin-loop

    previously the spin-loop looks like

        thisMBB:
        newMBB:
          ld  t1 = [bitinstr.addr]
          op  t2 = t1, [bitinstr.val]
          not t3 = t2  (if Invert)
          mov EAX = t1
          lcs dest = [bitinstr.addr], t3  [EAX is implicit]
          bz  newMBB
          fallthrough -->nextMBB

    the 'ld' at the beginning of newMBB should be lift out of the loop
    as lcs (or CMPXCHG on x86) will load the current memory value into
    EAX. This loop is refined as:

        thisMBB:
          EAX = LOAD [MI.addr]
        mainMBB:
          t1 = OP [MI.val], EAX
          LCMPXCHG [MI.addr], t1, [EAX is implicitly used & defined]
          JNE mainMBB
        sinkMBB:

  * Remove immopc as, so far, all pseudo-atomic instructions has
    all-register form only, there is no immedidate operand.

  * Remove unnecessary attributes/modifiers in pseudo-atomic instruction
    td

  * Fix issues in PR13458

- Add comprehensive tests on atomic ops on various data types.
  NOTE: Some of them are turned off due to missing functionality.

- Revise tests due to the new spin-loop generated.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 03:06:15 +00:00
Sean Silva
1141b5227e Sphinxify DebuggingJITedCode
LGTM by Michael Spencer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164280 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 03:05:26 +00:00
Andrew Trick
331e8fb760 Fix static function names in CodingStandards examples.
Try not to violate conventions immediately before explaining them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164278 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 02:01:06 +00:00
Bill Wendling
e603fe4664 Convert some attribute existence queries over to use the predicate methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164268 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 23:54:18 +00:00
Jim Grosbach
f5958e9dea ARM: Tidy up IntrinsicsARM.td a bit.
Make the TargetPrefix setting one big setting instead of being spread out
everywhere. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164265 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 23:39:03 +00:00
Bill Wendling
e853d2e250 Add predicates for queries on whether an attribute exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164264 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 23:35:21 +00:00
Micah Villmow
3e9b6db60f Add in new data types that are used by AMDIL/ANL among others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 22:47:07 +00:00
Owen Anderson
eb79b545fc Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164256 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 22:15:06 +00:00
Owen Anderson
cdac1be34a Implement a correct copy constructor for Record. Now that we're using the ID number as a key in maps (for determinism), it is imperative that ID numbers be globally unique, even when we copy construct a Record.
This fixes some obscure failure cases involving registers defined inside multiclasses or foreach constructs that would not receive a unique ID, and would end up being omitted from the AsmMatcher tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 21:34:18 +00:00
Jakob Stoklund Olesen
d40d4c34f7 Resolve conflicts involving dead vector lanes for -new-coalescer.
A common coalescing conflict in vector code is lane insertion:

  %dst = FOO
  %src = BAR
  %dst:ssub0 = COPY %src

The live range of %src interferes with the ssub0 lane of %dst, but that
lane is never read after %src would have clobbered it. That makes it
safe to merge the live ranges and eliminate the COPY:

  %dst = FOO
  %dst:ssub0 = BAR

This patch teaches the new coalescer to resolve conflicts where dead
vector lanes would be clobbered, at least as long as the clobbered
vector lanes don't escape the basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 21:29:18 +00:00
Andrew Kaylor
bbf628b6ce This patch adds memory support functions which will later be used to implement section-specific protection handling in MCJIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 20:46:12 +00:00
Preston Gurd
7b6f2034ac Add support for macro parameters/arguments delimited by spaces,
to improve compatibility with GNU as.

Based on a patch by PaX Team.

Fixed assertion failures on non-Darwin and added additional test cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 20:36:12 +00:00
Duncan Sands
4caf5281bf Add support for accessing an MDNode's operands via the C binding. Patch by
Anthony Bryant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 20:29:39 +00:00
Preston Gurd
6c9176aeec Support default parameters/arguments for assembler macros.
This patch is based on the one by PaX Team.

Patch by Andy Zhang!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164246 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 20:29:04 +00:00
Preston Gurd
6579eea90d Enhance unmatched '.endr' directive error message in assembler.
The directive can be matched with directives other than '.rept'

Patch by Andy Zhang!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 20:23:43 +00:00
Michael Liao
cd9ede9fc0 Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArith
- Merge the processing of LOAD_ADD with other atomic load-arith
  operations
- Separate the logic getting target constant for atomic-load-op and add
  an optimization for atomic-load-add on i16 with negative value
- Optimize a minor case for atomic-fetch-add i16 with negative operand. Test
  case is revised.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 19:36:58 +00:00
Michael Ilseman
fc879791f2 Renaming functions to match coding style guidelines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164238 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 18:14:45 +00:00
Jordan Rose
3856b07276 Really XFAIL test/CodeGen/PowerPC/structsinregs.ll.
XFAIL needs a trailing colon. Hopefully this will get the buildbots
happy again while Bill works on getting it passing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 17:03:11 +00:00
Michael Ilseman
dcc5212aaf Doxygen-ify comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164235 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 16:25:57 +00:00