Commit Graph

19 Commits

Author SHA1 Message Date
Daniel Sanders
68138dc9a8 [mips][msa] Fix invalid generated code when lowering FrameIndex involving unaligned offsets.
Summary:
The MSA ld.[bhwd] and st.[bhwd] instructions scale the immediate by the
element size before use as an offset. The offset must therefore be a
multiple of the element size to be valid in these instructions. However,
an unaligned base address is valid in MSA.

This commit causes the compiler to emit valid code when the calculated
offset is not a multiple of the element size by accounting for the offset
using addiu and using a zero offset in the load/store.

Depends on D2338

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196777 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 12:47:12 +00:00
Daniel Sanders
897268d931 [mips][msa] Fix suboptimal FrameIndex lowering for ld.[hwd] and st.[hwd]
Summary:
The immediate in these instructions is scaled before use as an offset.
They therefore have a wider reach than ld.b/st.b.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196775 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 11:50:16 +00:00
Daniel Sanders
6fdef5ecd7 [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.
This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 13:47:57 +00:00
Daniel Sanders
c7ff23aa67 [mips][msa] A small refactor to reduce patch noise in my next commit
No functional change. An if-statement has been split into two nested if-statements.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195972 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 13:15:21 +00:00
Akira Hatanaka
1858786285 [mips] Rename register classes CPURegs and CPU64Regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187832 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 23:08:38 +00:00
Bill Wendling
41e632d9e1 Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183493 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 07:04:14 +00:00
Akira Hatanaka
5114226c18 [mips] Define a function which returns the GPR register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178359 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-29 19:17:42 +00:00
Eli Bendersky
700ed80d3d Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.

There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.

The refactoring was OK'd by Anton Korobeynikov on llvmdev.

Note: this touches the target interfaces, so out-of-tree targets may
be affected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 20:05:00 +00:00
Akira Hatanaka
544cc21cf4 [mips] Lower EH_RETURN.
Patch by Sasa Stankovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173862 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-30 00:26:49 +00:00
Chandler Carruth
0b8c9a80f2 Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 11:36:10 +00:00
Chandler Carruth
d04a8d4b33 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 16:50:05 +00:00
Akira Hatanaka
11a45c214c [mips] Stop reserving register AT and use register scavenger when a scratch
register is needed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03 00:05:43 +00:00
Akira Hatanaka
173192fa71 [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive
"set .noat" so that the assembler doesn't issue warnings when register $AT is
used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167310 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02 20:56:25 +00:00
Akira Hatanaka
c878f3899c Delete member MipsFunctionInfo::OutArgFIRange and code that accesses it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164718 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 19:18:19 +00:00
Akira Hatanaka
fc4eafa0f4 Make function loadImmediate a member of MipsSEInstrInfo and change it to return
the temporary register that was used to load the immediate. Currently, it always
returns register $at, but this will change if, in the future, we decide to use 
another register.

No changes in functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162417 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23 00:21:05 +00:00
Akira Hatanaka
91a35f03da Add a member of type Mips16InstrInfo/MipsSEInstrInfo to class
Mips16RegisterInfo/MipsSERegisterInfo. 

No changes in functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162413 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22 23:58:53 +00:00
Akira Hatanaka
fa566d02cc Remove unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01 00:37:53 +00:00
Akira Hatanaka
71746220d3 Implement MipsSERegisterInfo::eliminateCallFramePseudoInstr. The function emits
instructions that decrement and increment the stack pointer before and after a
call when the function does not have a reserved call frame.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 23:52:55 +00:00
Akira Hatanaka
8589010e3d Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo and
MipsSERegisterInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 23:41:32 +00:00