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231 Commits

Author SHA1 Message Date
Brian Gaeke
9b8c2911d9 Implement replaceMachineCodeForFunction() for x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9204 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-17 18:27:46 +00:00
Chris Lattner
c58c169eda Instead of hacking in custom support for Invoke/Unwind, use the LowerInvoke pass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8871 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-05 19:15:47 +00:00
Alkis Evlogimenos
7237ecef13 Moved enum and command-line option in separate file. Also added function that returns the user selected register allocator to the caller. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8819 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-02 16:57:49 +00:00
Alkis Evlogimenos
eed462b685 Change llc command line for register allocators 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8815 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-02 06:13:19 +00:00
Alkis Evlogimenos
77e78d050a Revert previous change. For some reason this went into the main branch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8805 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-01 19:40:13 +00:00
Alkis Evlogimenos
6ac2c8c673 Added command line option for linear scan allocator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8804 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-01 19:38:10 +00:00
Chris Lattner
bb144a892b Targets should configure themselves based on a Module, not some wierd flags 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8132 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-24 19:49:48 +00:00
Chris Lattner
7540565863 Fix ABI issue: Longs really do need to be only 4 byte aligned on X86. 
This bug caused miscompilation of programs using 'struct stat', but only if
compiled with support for 64-bit filesystems.  This could in theory effect
other things, but only if the LLVM code shared data structures with native code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7928 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-17 23:20:40 +00:00
Brian Gaeke
b428654076 addPassesToJITCompile now takes a FunctionPassManager, to support 
function-at-a-time compilation and emission of code.
Separate addPassesToEmitAssembly from addPassesToJITCompile, because
 the latter requires you to use FunctionPasses, and the former might
 diverge anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7817 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-13 18:15:52 +00:00
Chris Lattner
ac0c8680ad Add support for a pattern matching instruction selector. This is still in 
the early implementation phases, so it is disabled by default


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7719 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-11 14:59:22 +00:00
Chris Lattner
c9bbfbc04e Factor shared code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7600 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-05 16:34:44 +00:00
Chris Lattner
d281de2181 Rename function to be more consistent with filename 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7352 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-07-26 23:49:58 +00:00
Brian Gaeke
de420aee32 Printer.cpp: Ditch addRequired/getAnalysis, because they leave 
Printer::doFinalization() out in the cold.  Now we pass in a TargetMachine
  to Printer's constructor and get the TargetData from the TargetMachine.
 Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
 Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7275 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-07-23 20:25:08 +00:00
Brian Gaeke
de3aa4f77f lib/Target/X86/X86TargetMachine.{cpp,h}: Add initial version 
(non-working) of llc guts for X86, and add a prototype for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6779 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-18 21:43:21 +00:00
Chris Lattner
10daaa1416 Remove two fields from TargetData which are target specific. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5963 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-04-26 20:11:09 +00:00
Chris Lattner
98938f83d5 Fix compatibility bug: X86 aligns doubles to 4 bytes, not 8! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5935 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-04-25 06:05:57 +00:00
Chris Lattner
155e68feea Add support for the Switch instruction by running the lowerSwitch pass first 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5867 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-04-23 16:24:55 +00:00
Chris Lattner
ddd5b417c6 Rename -no-* to -disable-* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5642 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-02-26 20:00:41 +00:00
Chris Lattner
f158da2f78 Implement code to keep the stack pointer aligned to an 8 byte boundary. 
This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5320 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-16 02:20:12 +00:00
Chris Lattner
d91d86f3a6 * No longer need lowerallocation pass 
* Add X86 Stackifier pass
* Add peephole optimizer pass


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5233 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-13 00:51:23 +00:00
Chris Lattner
d282cfef61 * Initialize new FrameInfo member 
* most pass ctors no longer take TM arguments
* New prolog/epilog insertion pass


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5188 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-28 20:33:32 +00:00
Chris Lattner
430cda7452 Free machine code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5146 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-25 05:06:21 +00:00
Chris Lattner
5bcd95c57f Changes to allow for a configurable target machine that allows big endian and/or long pointer operation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5131 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-24 00:04:01 +00:00
Chris Lattner
14322cd337 Local register allocator is now stable enough for use, it passes all tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5094 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-17 02:51:15 +00:00
Chris Lattner
439a27ac42 Add mechanism to select register allocator to use 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5079 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 16:15:51 +00:00
Chris Lattner
1a45626c4c Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5071 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 14:38:13 +00:00
Misha Brukman
b8ead9dc22 Make function code generation printing debug-only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5023 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 13:16:14 +00:00
Brian Gaeke
e48ec018a5 brg 
InstSelectSimple.cpp: Add stub implementation of visitFreeInst.
 Add comments that mention how we are failing to implement malloc/free.
 Add initial implementation of visitAllocaInst.

X86TargetMachine.cpp: Include llvm/Transforms/Scalar.h.
 Add LowerAllocations pass before instruction selection.

jello/Makefile: Add scalaropts.a.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4994 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 06:46:31 +00:00
Misha Brukman
f88a2853c8 Enable the register allocator pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4829 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 22:45:07 +00:00
Chris Lattner
3dffa7953f Print machine code after instruction selection 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4434 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-30 00:47:49 +00:00
Chris Lattner
b4f68ed32e Convert backend to use passes, implement X86TargetMachine 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4421 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-29 22:37:54 +00:00