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17101 Commits

Author SHA1 Message Date
Jim Grosbach
d092a87ba3 Rename t2 TBB and TBH instructions to reference that they encode the jump table 
data. Next up, pseudo-izing them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120320 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 21:28:32 +00:00
Owen Anderson
5404c2b36e Improving the factoring of several instruction encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120317 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 20:38:48 +00:00
Bob Wilson
86c6d80a7a Add support for NEON VLD3-dup instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120312 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 19:35:29 +00:00
Bob Wilson
2fcda63763 Fix copy-and-paste errors in VLD2-dup scheduling itineraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120311 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 19:35:23 +00:00
Jim Grosbach
f1aa47dc1a ARM Pseudo-ize tBR_JTr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 19:32:47 +00:00
Owen Anderson
00a035f74f Thumb2 encodings for MSR and MRS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120309 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 19:29:15 +00:00
Owen Anderson
d18a9c9b9d Thumb2 encodings for system instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120307 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 19:22:08 +00:00
Owen Anderson
05bf595122 Thumb2 encodings for branches and IT blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120306 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 18:54:38 +00:00
Jim Grosbach
11fbff8085 The ARM BR_JT* pseudos don't need to use the printer jtblock_operand node to 
get the pretty-printer. That's handled explicityly by the MC lowering now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120305 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 18:53:24 +00:00
Michael J. Spencer
3cc52ea33c I swear I did a make clean and make before committing all this... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120304 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 18:47:54 +00:00
Jim Grosbach
2dc7768d73 Switch ARM BR_JTm and BR_JTr instructions to be MC-expanded pseudos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120303 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 18:37:44 +00:00
Michael J. Spencer
1f6efa3996 Merge System into Support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120298 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 18:16:10 +00:00
Kalle Raiskila
9363f739cd Handle lshr for i128 correctly on SPU also when 
shiftamount > 7.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120288 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 14:44:28 +00:00
Kalle Raiskila
c2ebfd454c Enable PostRA scheduling for SPU. 
This speeds up selected test cases with up to
5% - no slowdowns observed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120286 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 10:30:25 +00:00
Kalle Raiskila
b00f24b13c Allow machine LICM to do its job on SPU. 
-return a sensible value for register pressure
-add pattern to 'ila' instrucion


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120285 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 10:08:09 +00:00
Kalle Raiskila
11edd0cedc Add missing i128 case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120284 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 09:36:26 +00:00
Bill Wendling
2f17bf2a44 Add more Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120279 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 01:07:48 +00:00
Bill Wendling
5cbbf68e35 More Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120278 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 01:00:43 +00:00
Bill Wendling
d19ac0c75a Add Thumb encodings for REV instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 00:42:50 +00:00
Bill Wendling
849f2e381e Add more Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120272 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 00:18:15 +00:00
Rafael Espindola
ec0b428398 Make EmitIntValue non virtual. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120271 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 23:22:44 +00:00
Rafael Espindola
d652dbe720 Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120263 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 21:16:39 +00:00
Chris Lattner
d8f717911d fix PR8686, accepting a 'b' suffix at the end of all the setcc 
instructions.  I choose to handle this with an asmparser hack,
though it could be handled by changing all the instruction definitions
to allow be "setneb" instead of "setne".  The asm parser hack is
better in this case, because we want the disassembler to produce
setne, not setneb.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120260 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 20:23:50 +00:00
Nicolas Geoffray
7509ccda93 When emitting a single function with cppgen=function, you don't want to emit 
initializers of global variables used in the function.
Also make sure to emit the operands of a constant.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120253 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 18:00:53 +00:00
Rafael Espindola
a484f2c405 Move the PTXMCAsmStreamer class to the .cpp file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 14:48:34 +00:00
Rafael Espindola
e04ed7e45f Define generic 1, 2 and 4 byte pc relative relocations. They are common 
and at least the 4 byte one will be needed to implement the .cfi_* directives.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120240 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 14:17:56 +00:00
Bob Wilson
b1dfa7a8e0 Add support for NEON VLD2-dup instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120236 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 06:51:26 +00:00
Bob Wilson
f3d2f9d4be Another minor refactoring for VLD1DUP instructions. 
The op11_8 field is the same for all of them so put it in the instruction
classes instead of specifying it separately for each instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120234 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 06:51:15 +00:00
Bob Wilson
364a72a8e5 Add entry in getTargetNodeName() for ARMISD::VBICIMM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120233 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 06:51:11 +00:00
Anton Korobeynikov
94c5ae0875 Move more PEI-related hooks to TFI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120229 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 23:05:25 +00:00
Anton Korobeynikov
cd775ceff0 Move callee-saved regs spills / reloads to TFI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120228 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 23:05:03 +00:00
Rafael Espindola
5bf7c534cf Lower TLS_addr32 and TLS_addr64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120225 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 20:43:02 +00:00
Rafael Espindola
bfd2d26159 Implement the data16 prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 20:29:45 +00:00
Bob Wilson
bce55776af Refactor. Set alignment bit in VLD1-dup instruction classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120197 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 07:12:02 +00:00
Bob Wilson
2a0e97431e Add NEON VLD1-dup instructions (load 1 element to all lanes). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120194 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 06:35:16 +00:00
Bob Wilson
8d41294664 Fix incorrect scheduling itineraries for NEON vld1/vst1 instructions. 
I added these instructions recently but I have no idea where these "1"
values in the NextCycles field came from.  As far as I can tell now,
these instruction stages are clearly intended to overlap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 06:35:09 +00:00
Daniel Dunbar
36d76a8dbc MC/Mach-O: Switch to using MachOFormat.h. 
- I'm leaving MachO.h, because I believe it has external consumers, but I would really like to eliminate it (we have stylistic disagreements with one another).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120187 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 04:38:36 +00:00
Rafael Espindola
fd46797d0d Remove the unused TheTarget member. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120168 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-26 04:24:21 +00:00
Rafael Espindola
2ace1b68ac Use multiple 0x66 prefixes so that all nops up to 15 bytes are a single instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120147 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-25 17:14:16 +00:00
Benjamin Kramer
c62feda741 Namespacify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120146 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-25 16:42:51 +00:00
Wesley Peck
42e75a3cf1 Updating MBlaze .mask and .frame directives to match GCC's output and fixing regression introduced in 120095 by checking MCStreamer::hasRawTextSupport. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120097 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 16:32:35 +00:00
Wesley Peck
82dc040d06 1. Fixing error where basic block labels were not being printed out when they need to be for the MBlaze backend because AsmPrinter::isBlockOnlyReachableByFallthrough does not take into account delay slots. 
2. Re-adding .mask and .frame directives in printed assembly.
3. Adding .ent and .end directives in printed assembly.
4. Minor cleanups to MBlaze backend.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120095 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 15:39:32 +00:00
Kalle Raiskila
7de8101668 Use i8 as SETCC result type for i1 in SPU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120092 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 12:59:16 +00:00
Kalle Raiskila
702a4046a9 Allow for 'fcmp ogt' in SPU. 
Fix by Visa Putkinen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120090 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 11:42:17 +00:00
Benjamin Kramer
c21a821e9f The srem -> urem transform is not safe for any divisor that's not a power of two. 
E.g. -5 % 5 is 0 with srem and 1 with urem.

Also addresses Frits van Bommel's comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120049 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 20:33:57 +00:00
Jason W Kim
13534672de Move the ARM reloc constants to Support/ELF.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120035 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 19:40:36 +00:00
Bob Wilson
626613d5e8 Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations. 
We need to check if the individual vector elements are sign/zero-extended
values.  For now this only handles constants values.  Radar 8687140.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120034 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 19:38:38 +00:00
Benjamin Kramer
b70ebd2aa3 InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. 
This allows to transform the rem in "1 << ((int)x % 8);" to an and.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120028 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 18:52:42 +00:00
Kalle Raiskila
0cc5b1f60e Division by pow-of-2 is not cheap on SPU, do it with 
shifts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120022 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 13:27:59 +00:00
Rafael Espindola
beb6898df8 Implement the rex64 prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120017 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 11:23:24 +00:00