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391271f3bb
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23214 Commits

Author SHA1 Message Date
Benjamin Kramer
391271f3bb Add MCInstBuilder, a utility class to simplify MCInst creation similar to MachineInstrBuilder. 
Simplify some repetitive code with it. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168587 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-26 13:34:22 +00:00
Benjamin Kramer
d3022b8946 PPC: Reinstate the fatal error when trying to emit a macho file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168543 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-24 15:23:49 +00:00
Benjamin Kramer
cb4028b91d ARM: Share applyFixup between ELF and Darwin. 
The implementations already diverged a bit, merge them back together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168542 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-24 14:36:43 +00:00
Benjamin Kramer
915558e775 PPC: MCize most of the darwin PIC emission. 
The last remaining bit is "bcl 20, 31, AnonSymbol", which I couldn't find the
instruction definition for. Only whitespace changes in assembly output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168541 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-24 13:18:25 +00:00
Benjamin Kramer
e8ca482c97 PPC: Share applyFixup between ELF and Darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168540 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-24 13:18:17 +00:00
Benjamin Kramer
8f2dce0cda PPC: Simplify code with Twines. 
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168539 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-24 13:18:11 +00:00
Bill Wendling
b46702c800 Update call to the new syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168512 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-23 11:05:35 +00:00
Meador Inge
6098c6b56b Add more functions to the target library information. 
I discovered a few more missing functions while migrating optimizations
from the simplify-libcalls pass to the instcombine (I already added some
in r167659).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168501 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-22 15:36:42 +00:00
Jack Carter
198ad916d7 Mips direct object xgot support 
This patch provides support for the MIPS relocations:

    *)  R_MIPS_GOT_HI16
    *)  R_MIPS_GOT_LO16
    *)  R_MIPS_CALL_HI16
    *)  R_MIPS_CALL_LO16

These are used for large GOT instruction sequences.

Contributer: Jack Carter


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168471 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 23:38:59 +00:00
Akira Hatanaka
f09a03776d [mips] Generate big GOT code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168460 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 20:40:38 +00:00
Akira Hatanaka
d43e06de59 [mips] Simplify lowering functions in MipsISelLowering.cpp by using the helper 
functions added in r168456.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168458 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 20:30:40 +00:00
Akira Hatanaka
6b28b80791 [mips] Add helper functions that create nodes for computing address. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168456 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 20:26:38 +00:00
Akira Hatanaka
81784cb374 [mips] Add command line option "-mxgot". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168455 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 20:21:11 +00:00
Akira Hatanaka
59be760f61 [mips] When a node which loads from a GOT is created, pass a MachinePointerInfo 
referring to a GOT entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168453 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 20:16:34 +00:00
Jyotsna Verma
b546d5a30d Add new predicates for the immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168451 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 20:05:09 +00:00
Akira Hatanaka
26e6ad7b29 [mips] Add target operand flag enums for big GOT relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168450 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 19:59:51 +00:00
Jyotsna Verma
81081b16ef Use one common 'let' expression to set PrintMethod for all immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168449 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 19:53:42 +00:00
Anton Korobeynikov
0ae6124034 Add support for varargs functions for msp430. 
Patch by Job Noorman!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168440 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 17:28:27 +00:00
Anton Korobeynikov
6cbeb4d839 Add support for byval args. Patch by Job Noorman! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168439 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 17:23:03 +00:00
Rafael Espindola
6ee1e0867d Finish the renaming. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168437 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 16:56:33 +00:00
Jyotsna Verma
24d5025d8d Renamed HexagonImmediates.td -> HexagonOperands.td. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168434 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 16:28:18 +00:00
Craig Topper
9648782552 Fix execution domain for packed FMA4 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168417 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 08:08:21 +00:00
Craig Topper
3dcefc864e Mark ISD::FMA as Legal instead of custom for x86 with FMA3/FMA4. Needed so that llvm.muladd can be converted to ISD::FMA for fp_contract. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168413 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 05:36:24 +00:00
Jakub Staszak
e845cedf4d Make calcLiveInMask method static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168409 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 00:59:34 +00:00
Jakub Staszak
6f05f21857 Make isScratchReg and isFPCopy methods static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168407 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 00:50:57 +00:00
Jakub Staszak
8c67c03b0c Add obvious constantness. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168396 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-20 23:32:32 +00:00
Jyotsna Verma
7d1b42a842 Removing some unused instruction definitions from the Hexagon backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168388 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-20 22:14:23 +00:00
Elena Demikhovsky
4fe5405bdd Intel OCL built-ins calling conventions now support MacOS 32-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168359 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-20 09:37:57 +00:00
Eli Friedman
43147afd71 Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete Couperus. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168240 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-17 01:52:46 +00:00
Akira Hatanaka
94e472832f Initial implementation of MipsTargetLowering::isLegalAddressingMode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168230 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-17 00:25:41 +00:00
Weiming Zhao
8b149cbfc6 Rename methods like PairSRegs() to createSRegpairNode() to meet our coding 
style requirement.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168229 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-17 00:23:35 +00:00
Weiming Zhao
e56764bad1 Remove hard coded registers in ARM ldrexd and strexd instructions 
This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168207 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 21:55:34 +00:00
Anton Korobeynikov
b1a392e7c5 Make sure FABS on v2f32 and v4f32 is legal on ARM NEON 
This fixes PR14359


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168200 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 21:15:20 +00:00
Richard Osborne
ccc015d431 Fix handling of aliases to functions. 
An alias to a function should use pc relative addressing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168199 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 21:12:38 +00:00
Justin Holewinski
2085d00d09 [NVPTX] Order global variables in def-use order before emiting them in the final assembly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168198 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 21:03:51 +00:00
Joe Abbey
48f63be368 Using const cast to alleviate a warning. 
A PR is being filed to address some code issues here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168185 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 19:38:42 +00:00
Duncan Sands
dc7f174b5e Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168166 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 12:36:39 +00:00
Craig Topper
d577552c66 Use roundps/pd for llvm.ceil, llvm.trunc, llvm.rint, and llvm.nearbyint of vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168141 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 06:37:56 +00:00
Akira Hatanaka
a032dbd62f [mips] Fix delay slot filler so that instructions with register operand $1 are 
allowed in branch delay slot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168131 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-16 02:39:34 +00:00
Eli Friedman
846ce8ea67 Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missing 
case to vector legalization so this actually works.

Patch by Pete Couperus.  Fixes PR12540.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168107 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 22:44:27 +00:00
Akira Hatanaka
0301bc54ad [mips] Add predicate HasFPIdx for floating-point indexed load instruction 
support and use it in place of HasMips32r2Or64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168089 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 21:17:13 +00:00
Adhemerval Zanella
e95ed2b7af PowerPC: Lowering floor intrinsic for Altivec 
This patch lowers the llvm.floor, llvm.ceil, llvm.trunc, and
llvm.nearbyint to Altivec instruction when using 4 single-precision
float vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168086 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 20:56:03 +00:00
Akira Hatanaka
c984657c74 Add assertions in MipsLongBranch which check the size of basic blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168078 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 20:05:11 +00:00
Jakub Staszak
1c1c49372c Return 0 instead of false. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168076 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 19:40:29 +00:00
Jakub Staszak
eaf77254d4 Simplify code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168064 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 19:05:23 +00:00
Dmitri Gribenko
79c07d2a36 Use empty parens for empty function parameter list instead of '(void)'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168049 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 16:51:49 +00:00
Craig Topper
116bd168e1 Revert changing FNEG of v4f32 to Expand. It's legal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168030 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 08:09:46 +00:00
Craig Topper
b916904e68 Make FNEG and FABS of v4f32 Expand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168029 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 08:06:12 +00:00
Craig Topper
44e394cf61 Make a bunch of floating point operations on vectors Expand so that instruction selection won't fail. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168028 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 08:02:19 +00:00
Craig Topper
490104720d Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168025 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 06:51:10 +00:00