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Author SHA1 Message Date
Chris Lattner
39b248b79e update a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25918 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 23:50:22 +00:00
Chris Lattner
cd81639d2e Fix a deficiency in the spiller that Evan noticed. In particular, consider 
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25917 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 23:29:36 +00:00
Nate Begeman
3b478b31e2 add 64b gpr store to the possible list of isStoreToStackSlot opcodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25916 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 21:07:50 +00:00
Chris Lattner
1c07e7286d fix operand numbers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25915 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:38:12 +00:00
Chris Lattner
6524287c53 implement isStoreToStackSlot for PPC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25914 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:16:12 +00:00
Chris Lattner
4083960147 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:12:32 +00:00
Chris Lattner
af9fa2bd0c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo, 
a far more logical place.  Other methods should also be moved if anyone
is interested. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25912 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:11:55 +00:00
Chris Lattner
9c8dd970f7 implement isStoreToStackSlot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:00:41 +00:00
Chris Lattner
1d6ecd03ea add a method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25910 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 19:57:16 +00:00
Chris Lattner
679836360a add a new isStoreToStackSlot method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25909 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 19:55:29 +00:00
Chris Lattner
d395d0984f more notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25908 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 19:43:28 +00:00
Chris Lattner
9acddcd07e add a note, I have no idea how important this is. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 19:16:34 +00:00
Chris Lattner
c8c0bb00a3 %fcc is not an alias for %fcc0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25906 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 08:02:20 +00:00
Chris Lattner
4032cf049d correct an opcode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25905 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 07:56:15 +00:00
Chris Lattner
275b8846d5 new example 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25903 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 07:37:11 +00:00
Nate Begeman
93c740bbbb Update the README 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25902 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 07:27:56 +00:00
Chris Lattner
3603cd62ae Turn any_extend nodes into zero_extend nodes when it allows us to remove an 
and instruction.  This allows us to compile stuff like this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

to this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        ret

instead of this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

This occurs quite a bit with the X86 backend.  For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel,  70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25901 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 07:17:31 +00:00
Chris Lattner
9a06cce0f2 Implement MaskedValueIsZero for ANY_EXTEND nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25900 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 06:43:15 +00:00
Chris Lattner
1bac941019 implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25899 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 06:36:48 +00:00
Chris Lattner
b3ddfc42af add two dag combines: 
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25898 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 06:36:13 +00:00
Chris Lattner
29dd2d7d15 new testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25897 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 06:35:38 +00:00
Evan Cheng
8b6e4e6e3e Update. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25896 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 02:40:17 +00:00
Chris Lattner
1e8791d790 make -debug output less newliney 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25895 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:38:08 +00:00
Evan Cheng
d25e9e8294 Fix a erroneous comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25894 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:28:23 +00:00
Chris Lattner
2223aea6ed Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25893 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:25:23 +00:00
Chris Lattner
2f0eec6520 validate matching constraints and remember when we see them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25892 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:23:53 +00:00
Chris Lattner
ab77f73aee add an instance var and argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25891 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:23:12 +00:00
Chris Lattner
4d7db40ab1 more notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25890 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:38:08 +00:00
Evan Cheng
bda54cdd47 Tell codegen MOVAPSrr and MOVAPDrr are copies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:03:16 +00:00
Evan Cheng
b1b4e86a02 Added SSE entries to foldMemoryOperand(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25888 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:02:25 +00:00
Evan Cheng
78376d59ab Rearrange code to my liking. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25887 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:01:57 +00:00
Chris Lattner
6609913b7d Implement smart printing of inline asm strings, handling variants and 
substituted operands.  For this testcase:

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

we now emit:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz r2, r2, r3  ;; look here
        or r3, r2, r2
        blr

... note the substituted operands. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25886 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 22:41:11 +00:00
Chris Lattner
47cf4eda9f add a new PrintAsmOperand method, move some stuff around for ease of reading. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25885 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 22:39:30 +00:00
Chris Lattner
588732748b add a method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25884 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 22:38:46 +00:00
Chris Lattner
3e2b94a171 another note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25883 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 21:44:48 +00:00
Andrew Lenharth
77f0885fa3 Add immediate forms of cmov and remove some cruft 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25882 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 19:37:33 +00:00
Andrew Lenharth
10d7f9a33f test cmov immediate form 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25881 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 19:36:52 +00:00
Chris Lattner
1cf9d961b2 add a note, ya knoe 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 19:12:23 +00:00
Nate Begeman
da06e9e665 *** empty log message *** 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25879 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 19:05:15 +00:00
Chris Lattner
4e4b576e2e Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 18:59:47 +00:00
Chris Lattner
20ea062192 Finegrainify namespacification 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25877 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 18:10:56 +00:00
Chris Lattner
5a7efc9d4f add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25876 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 17:54:23 +00:00
Nate Begeman
750ac1bdfa Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 07:19:44 +00:00
Chris Lattner
1f7c6302be add a note, I'll take care of this after nate commits his big patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25873 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 06:40:32 +00:00
Evan Cheng
3c55c54a87 - Use xor to clear integer registers (set R, 0). 
- Added a new format for instructions where the source register is implied
  and it is same as the destination register. Used for pseudo instructions
  that clear the destination register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25872 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 06:13:50 +00:00
Evan Cheng
214a79423f Remove another entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25871 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 06:08:48 +00:00
Evan Cheng
657416cfba If a pattern's root node is a constant, its size should be 3 rather than 2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25870 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 06:06:31 +00:00
Jeff Cohen
09f0bd39b1 Fix VC++ compilation error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25869 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 04:37:04 +00:00
Chris Lattner
faa60106f1 new testcase for the 'ret double folding with load' opzn 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25868 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:45:02 +00:00
Chris Lattner
3e1d5e5ea3 Another regression from the pattern isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25867 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:44:25 +00:00