Bruno Cardoso Lopes
3abd75bf1d
Fix the encoding of mrrc and mcrr family of instructions. Also add testcases for mcr and mrc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19 16:56:52 +00:00
Daniel Dunbar
ec91d52a77
ARM/ISel: Factor out isScaledConstantInRange() helper.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123823 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19 15:12:16 +00:00
Andrew Trick
32cec0a756
For ARM subtargets with useNEONForSinglePrecisionFP, double count uses
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of the floating point types less than 64-bits. It's somewhat of a temporary
hack but forces more accurate modeling of register pressure and results
in fewer spills.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19 02:35:27 +00:00
Andrew Trick
7fa75ce11d
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19 02:26:13 +00:00
Evan Cheng
fc8475bde9
Don't forget to emit the load from indirect symbol when using movw + movt to materialize GA indirect symbols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19 02:16:49 +00:00
Bruno Cardoso Lopes
61505907f5
Create two new generic classes to represent the following VMRS/VMSR variations:
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vmrs reg, fpexc
vmrs reg, fpsid
vmsr fpexc, reg
vmsr fpsid, reg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123783 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 21:58:20 +00:00
Bruno Cardoso Lopes
e7255a80e3
Fix MRS encoding for arm and thumb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 21:31:35 +00:00
Bruno Cardoso Lopes
892fc6d7b6
Fix the encoding of t2ISB by using the right class and also parse it correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123776 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 21:17:09 +00:00
Bruno Cardoso Lopes
fdcee77887
Follow the current hack set and enable the correct parsing of bkpt while in thumb mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123772 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 20:55:11 +00:00
Bruno Cardoso Lopes
a461d42228
Add support for parsing and encoding ARM's official syntax for the BFI instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123770 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 20:45:56 +00:00
Jim Grosbach
ff12a8bd99
Add a FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123769 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 19:59:19 +00:00
Bruno Cardoso Lopes
fb67faa661
Ensure Mips::GP is properly reloaded after a function call. Patch by Sasa Stankovic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 19:50:18 +00:00
Bruno Cardoso Lopes
6b9028251c
Negative zero is not legal on mips. Patch by Sasa Stankovic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123766 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 19:41:41 +00:00
Bruno Cardoso Lopes
b1fce0a016
Handle (i32,i32) => f64 in a cleaner way. Patch by Sasa Stankovic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123763 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 19:38:25 +00:00
Bruno Cardoso Lopes
8be7611245
Add support for mips32 madd and msub instructions. Patch by Akira Hatanaka
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123760 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 19:29:17 +00:00
Chris Lattner
908d8e82b5
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123752 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 07:47:48 +00:00
Venkatraman Govindaraju
687ae9606b
SPARC backend: Modified LowerCall and LowerFormalArguments so that they use CallingConv assignments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123749 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 06:09:55 +00:00
Daniel Dunbar
4b462672d2
McARM: Use accessors where appropriate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:55:27 +00:00
Daniel Dunbar
6ec56204f3
McARM: Fill in ASMOperand::dump() for memory operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:55:21 +00:00
Daniel Dunbar
2637dc9a25
McARM: Make ARMOperand use a union where appropriate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:55:15 +00:00
Daniel Dunbar
05d8b71424
McARM: Unify ParseMemory() successfull return.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123740 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:34:24 +00:00
Daniel Dunbar
0571093f4c
McARM: Early exit on failure (NEFC).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:34:17 +00:00
Daniel Dunbar
d3df5f32c0
McARM: Always keep an offset expression, if used (instead of assuming == 0 if used but not present), and simplify logic.
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Also, clean up various non-sensicalisms in isMemModeRegThumb() and isMemModeImmThumb().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123738 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:34:11 +00:00
Daniel Dunbar
023835d51b
McARM: Add a variety of asserts on the sanity of memory operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123737 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:34:05 +00:00
Daniel Dunbar
81f453c4b9
McARM: Use a consistent marker for not-set OffsetRegNum.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123736 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:33:57 +00:00
Daniel Dunbar
2e3cea3153
McARM: Start marking T2 address operands as such, for the benefit of the parser.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123722 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 03:06:03 +00:00
Eric Christopher
cdfe3c359b
The stub routine that we're calling uses test and so clobbers
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the flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123712 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 01:37:20 +00:00
Chris Lattner
32899199c0
minor change to rafael's recent patches: if something is
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constant but requires a unique address, we can still put it in a
readonly section, just not a mergable one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 01:23:44 +00:00
Jeffrey Yasskin
955ed73d12
Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 00:51:23 +00:00
Douglas Gregor
e735882224
Add a missing <cctype> include, from Joerg Sonnenberger!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17 19:17:01 +00:00
Kalle Raiskila
9dcb98cbe7
Split up RotateShift itinerary in SPU.
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'rotq*' and 'shlq*' instructions go to the odd pipeline,
wheras the inter-vector equivalents 'rot*', 'shl*' go
to the even.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17 13:33:19 +00:00
Kalle Raiskila
8702e8be8d
Don't crash SPU BE with memory accesses with big alignmnet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123620 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17 11:59:20 +00:00
Evan Cheng
5de5d4b6d0
Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.
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movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4))
movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4))
LPC0_0:
add r0, pc, r0
It's not yet enabled by default as some tests are failing. I suspect bugs in
down stream tools.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17 08:03:18 +00:00
Anton Korobeynikov
1d8334eabc
Provide instruction sizes for ARMv5 variants of MUL instructions.
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This fixes PR8987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 21:28:33 +00:00
Anders Carlsson
5822b86e4d
Update README.txt to remove the DAE enhancement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123597 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 21:26:15 +00:00
Rafael Espindola
7010401c6b
Only put unnamed_addr constants in mergeable sections. Fixes PR8297.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123585 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 17:19:34 +00:00
Chris Lattner
dec28ceb02
fix PR8514, a bug where the "heroic" transformation of shift/and
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into and/shift would cause nodes to move around and a dangling pointer
to happen. The code tried to avoid this with a HandleSDNode, but
got the details wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 08:48:11 +00:00
Chris Lattner
b0daffc609
add some commentary
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 06:39:44 +00:00
Evan Cheng
df55fea807
Spill R4 if it's going to be used to restore SP from FP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 05:14:33 +00:00
Venkatraman Govindaraju
c1a62834a2
Implement AnalyzeBranch in Sparc Backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 03:15:11 +00:00
Chris Lattner
9cd3da47f9
fix PR8981, a crash trying to form a conditional inc with a floating point compare.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 02:56:53 +00:00
Chris Lattner
b99fdee325
reapply my fix for PR8961 with a tweak to properly handle
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multi-instruction sequences like calls. Many thanks to Jakob for
finding a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 02:27:38 +00:00
Chandler Carruth
cad33c624e
Simplify a README.txt entry significantly to expose the core issue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 01:40:23 +00:00
Eric Christopher
a0f720f500
80-col.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-15 00:25:09 +00:00
Bob Wilson
ca3f06963c
Fix a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-15 00:09:18 +00:00
Eric Christopher
41262da6cc
Fix 80-cols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 23:50:53 +00:00
Ted Kremenek
d7f696edec
'HiReg' is written but never read. Nuke its
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declaration and its assignments.
Found by clang static analyzer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 22:34:13 +00:00
Anton Korobeynikov
3965b5e974
Add a possibility to switch between CFI directives- and table-based frame description emission. Currently all the backends use table-based stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 21:58:08 +00:00
Anton Korobeynikov
e749911372
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123475 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 21:57:58 +00:00
Chris Lattner
d357e88740
revert my fastisel patch again which apparently still gives the
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llvm-gcc-i386-linux-selfhost buildbot heartburn...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 06:14:33 +00:00