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3ad21bef92
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21997 Commits

Author SHA1 Message Date
Akira Hatanaka
3ad21bef92 Fix predicate HasStandardEncoding in MipsInstrInfo.td per suggestion of 
Benjamin Kramer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157504 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 22:15:15 +00:00
Akira Hatanaka
06a2f42d11 Delete MipsExpandPseudo.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157496 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:54:48 +00:00
Akira Hatanaka
564f69072c Move the code in MipsExpandPseudo to MipsInstrInfo::expandPostRAPseudo. 
Delete MipsExpandPseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157495 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:52:52 +00:00
Akira Hatanaka
8951abd993 Remove the code that expands MIPS' .cpload directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157494 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:46:52 +00:00
Akira Hatanaka
6a1a2b1395 Remove the code that emits MIPS' .cprestore directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157493 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:42:55 +00:00
Akira Hatanaka
65d5629065 Remove pseudo instructions that are no longer used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157492 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:37:40 +00:00
Justin Holewinski
d2ea0e10cb Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall 
to pass around a struct instead of a large set of individual values.  This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.

NV_CONTRIB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 16:35:28 +00:00
Eli Friedman
2db0e9ebb6 Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157446 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 00:09:29 +00:00
Jakob Stoklund Olesen
b1ebd6981f Shrink. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157433 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 22:17:44 +00:00
Justin Holewinski
42a0b48dd3 Remove the PTX back-end and all of its artifacts (triple, etc.) 
This back-end was deprecated in favor of the NVPTX back-end.

NV_CONTRIB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157417 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 21:38:21 +00:00
Akira Hatanaka
c784395a79 Turn on mips16 pseudo op when compiling for mips16. 
Expand test case for this.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157410 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 18:37:43 +00:00
Akira Hatanaka
4a5a8949cd Enable Mips16 compiler to compile a null program. 
First code from the Mips16 compiler. Includes trivial test program.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157408 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 18:32:33 +00:00
Craig Topper
6366361998 Convert assert(0) to llvm_unreachable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157380 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 07:02:50 +00:00
Craig Topper
c5ce4d1d52 Use uint16_t to store registers in static tables. Matches other tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157375 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 06:09:56 +00:00
Craig Topper
53146a29bc Use uint16_t to store register number in static tables to match other tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157374 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 05:55:47 +00:00
Craig Topper
51f50c1106 Make some opcode tables static and const. Allows code to avoid making copies to pass the tables around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157373 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 05:17:00 +00:00
Craig Topper
6fcf129cf5 Mark a couple arrays as static and const. Use array_lengthof instead of sizeof/sizeof. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157369 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 04:22:05 +00:00
Craig Topper
032f441afc Mark a static array as const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157368 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 04:11:15 +00:00
Craig Topper
cd2859eef8 Mark a static table as const. Shrink opcode size in static tables to uint16_t. Simplify loop iterating over one of those tables. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157367 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 03:59:11 +00:00
Chad Rosier
3fb6eca0cd Tidy up naming for consistency and other cleanup. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157358 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-23 23:45:10 +00:00
Chad Rosier
1c8fccbc12 [arm-fast-isel] Add support for non-global callee. 
Patch by Jush Lu <jush.msn@gmail.com>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157336 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-23 18:38:57 +00:00
Craig Topper
88097819fc Tidy up spacing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157313 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-23 05:44:51 +00:00
Craig Topper
82dd67a1c8 Fix indentation of wrapped line for readability. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157309 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-23 03:59:53 +00:00
NAKAMURA Takumi
dd051a0414 ARMDisassembler.cpp: Fix utf8 char in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157292 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-22 21:47:02 +00:00
Craig Topper
85b9e56bac Fix constant used for pshufb mask when lowering v16i8 shuffles. Bug introduced in r157043. Fixes PR12908. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157236 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-22 06:09:38 +00:00
Akira Hatanaka
18f3c78092 This patch adds a predicate to existing mips32 and mips64 so that those 
instruction encodings can be excluded during mips16 processing.

This revision fixes the issue raised by Jim Grosbach.

bool hasStandardEncoding() const { return !inMips16Mode(); }

When micromips is added it will be

bool StandardEncoding() const { return !inMips16Mode()&&  !inMicroMipsMode(); }

No additional testing is needed other than to assure that there is no regression
from this patch.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157234 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-22 03:10:09 +00:00
Jim Grosbach
b3a119a257 ARM: .end_data_region mismatch in Thumb2. 
32-bit offset jump tables just use real branch instructions and so aren't
marked as data regions. We were still emitting the .end_data_region
marker though, which assert()ed.

rdar://11499158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157221 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-21 23:34:42 +00:00
Jim Grosbach
b551f0cc78 Thumb2: RSB source register should be rGRP not GPRnopc. 
t2RSB defined the operand correctly, but tRSBS didn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157200 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-21 17:57:17 +00:00
Craig Topper
8ae97baef2 Allow 256-bit shuffles to still be split even if only half of the shuffle comes from two 128-bit pieces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157175 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-21 06:40:16 +00:00
Jakob Stoklund Olesen
53df9259e9 Make the global base reg GR32_NOSP. 
It can sometimes be used in addressing modes that don't support %ESP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157165 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-20 18:43:00 +00:00
Hal Finkel
2e8e5c0eca Add a missing PPC 64-bit stwu pattern. 
This seems to fix the remaining compile-time failures on PPC64 when
compiling with -enable-ppc-preinc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157159 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-20 17:11:24 +00:00
Jakob Stoklund Olesen
027c32a14e Use the right register class for LDRrs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157152 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-20 06:38:47 +00:00
Jakob Stoklund Olesen
6e6269a976 Transfer memory operands to the right instruction. 
They need to go on the PICLDR as the verifier points out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157151 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-20 06:38:42 +00:00
Hal Finkel
b8f2f29467 Add a FIXME about access to negative stack-pointer offsets on PPC32. 
The current code will generate a prologue which starts with something like:
        mflr 0
        stw 31, -4(1)
        stw 0, 4(1)
        stwu 1, -16(1)

But under the PPC32 SVR4 ABI, access to negative offsets from R1 is not allowed.

This was pointed out by Peter Bergner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157133 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-19 21:52:55 +00:00
Nadav Rotem
87d35e8c71 On Haswell, perfer storing YMM registers using a single instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157129 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-19 20:30:08 +00:00
Nadav Rotem
4fc8a5de44 Add support for additional in-reg vbroadcast patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157127 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-19 19:57:37 +00:00
Craig Topper
5084c6b0a2 Tidy up some spacing and inconsistent use of pre/post increment. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157122 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-19 19:14:18 +00:00
Stepan Dyatkovskiy
f4c261b137 Ordinary PR1255 patch: DifferenceEngine and CPPBackend adopted to the new SwitchInst methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157112 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-19 13:14:30 +00:00
Craig Topper
769237bb92 Copy some AVX support from MCJIT to JIT. Maybe will fix PR12748. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157109 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-19 08:28:17 +00:00
Eric Christopher
75f89b54b5 Add support for the 'd' mips inline asm output modifier. 
Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157093 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-19 00:51:56 +00:00
Jim Grosbach
3e96531186 Refactor data-in-code annotations. 
Use a dedicated MachO load command to annotate data-in-code regions.
This is the same format the linker produces for final executable images,
allowing consistency of representation and use of introspection tools
for both object and executable files.

Data-in-code regions are annotated via ".data_region"/".end_data_region"
directive pairs, with an optional region type.

data_region_directive := ".data_region" { region_type }
region_type := "jt8" | "jt16" | "jt32" | "jta32"
end_data_region_directive := ".end_data_region"

The previous handling of ARM-style "$d.*" labels was broken and has
been removed. Specifically, it didn't handle ARM vs. Thumb mode when
marking the end of the section.

rdar://11459456

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157062 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-18 19:12:01 +00:00
Eric Christopher
550c25e974 Add support for the mips 'x' inline asm modifier. 
Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157057 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-18 17:39:35 +00:00
Craig Topper
be97ae9e89 Simplify code a bit. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157044 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-18 07:07:36 +00:00
Craig Topper
b82b5abf78 Simplify handling of v16i8 shuffles and fix a missed optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157043 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-18 06:42:06 +00:00
Kevin Enderby
0fd4f3c8de Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing 
the 0b10 mask encoding bits.  Make MSR APSR writes without a _<bits> qualifier
an alias for MSR APSR_nzcvq even though ARM as deprecated it use.  Also add
support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions.  Some FIXMEs in
the code for better error checking when versions shouldn't be used.
rdar://11457025


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157019 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-17 22:18:01 +00:00
Tim Northover
44600d7081 Remove incorrect pattern for ARM SMML instruction. 
Patch by Meador Inge.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156989 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-17 13:12:13 +00:00
Akira Hatanaka
66e19c3e9d This patch adds the register class for MIPS16 as well as the ability for 
llc to recognize MIPS16 as a MIPS ASE extension. -mips16 will mean the
mips16 ASE for mips32 by default.

As part of fixing of adding this we discovered some small changes that
need to be made to MipsInstrInfo::storeRegToStackSLot and
MipsInstrInfo::loadRegFromStackSlot. We were using some "==" equality tests
where in fact we should have been using Mips::<regclas>.hasSubClassEQ instead,
per suggestion of Jakob Stoklund Olesen.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156958 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-16 22:19:56 +00:00
Benjamin Kramer
ab53f8ea6a Hexagon: Remove unused command line option. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156917 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-16 15:03:55 +00:00
Evan Cheng
6100366c2f Avoid creating a cycle when folding load / op with flag / store. PR11451474. rdar://11451474 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156896 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-16 01:54:27 +00:00
Jim Grosbach
918f55fe23 Allow MCCodeEmitter access to the target MCRegisterInfo. 
Add the MCRegisterInfo to the factories and constructors.

Patch by Tom Stellard <Tom.Stellard@amd.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156828 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-15 17:35:52 +00:00