Commit Graph

20240 Commits

Author SHA1 Message Date
Craig Topper
418eb3df74 Changed register names (and pointer keywords) to be lower case when using Intel X86 assembler syntax.
Patch by Richard Mitton.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187476 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 02:47:52 +00:00
Owen Anderson
605b3427a9 Preserve fast-math flags when folding (fsub x, (fneg y)) to (fadd x, y).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187462 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 23:53:17 +00:00
David Majnemer
36850ad779 isKnownToBeAPowerOfTwo: Strengthen isKnownToBeAPowerOfTwo's analysis on add instructions
Call into ComputeMaskedBits to figure out which bits are set on both add
operands and determine if the value is a power-of-two-or-zero or not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 21:01:36 +00:00
Matt Arsenault
f34dc428fa Change behavior of calling bitcasted alias functions.
It will now only convert the arguments / return value and call
the underlying function if the types are able to be bitcasted.
This avoids using fp<->int conversions that would occur before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:45:05 +00:00
Andrew Trick
e4049f66a4 This test may have been sensitive to the ARM ABI...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187442 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:34:59 +00:00
Andrew Trick
1e46fcd989 MI Sched fix: assert "Disconnected LRG within the scheduling region."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187435 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 19:59:08 +00:00
Tom Stellard
e3d60ac334 R600/SI: Expand vector fp <-> int conversions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187421 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 14:31:03 +00:00
Vladimir Medic
b67775df0c This patch implements parsing of mips FCC register operands. The example instructions have been added to test files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187410 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 10:12:14 +00:00
Saleem Abdulrasool
f7f22a64df [ARM] check bitwidth in PerformORCombine
When simplifying a (or (and B A) (and C ~A)) to a (VBSL A B C) ensure that the
bitwidth of the second operands to both ands match before comparing the negation
of the values.

Split the check of the value of the second operands to the ands.  Move the cast
and variable declaration slightly higher to make it slightly easier to follow.

Bug-Id: 16700
Signed-off-by: Saleem Abdulrasool <compnerd@compnerd.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187404 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 04:43:08 +00:00
Quentin Colombet
15d1b85094 [R600] Replicate old DAGCombiner behavior in target specific DAG combine.
build_vector is lowered to REG_SEQUENCE, which is something the register
allocator does a good job at optimizing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:27:16 +00:00
Quentin Colombet
75c9433b49 [DAGCombiner] insert_vector_elt: Avoid building a vector twice.
This patch prevents the following combine when the input vector is used more
than once.
insert_vector_elt (build_vector elt0, ..., eltN), NewEltIdx, idx
=>
build_vector elt0, ..., NewEltIdx, ..., eltN 

The reasons are:
- Building a vector may be expensive, so try to reuse the existing part of a
  vector instead of creating a new one (think big vectors).
- elt0 to eltN now have two users instead of one. This may prevent some other
  optimizations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187396 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:24:09 +00:00
Eric Christopher
3466fb11b7 Move file to X86 and add a triple to fix darwin bots for now.
The problem is due to the section name being explicitly mentioned in
the IR and differing between the two platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:20:06 +00:00
Eric Christopher
86aa03d5f9 Fix a truly egregious thinko in anonymous namespace check,
update testcase to make sure we generate debug info for walrus
by adding a non-trivial constructor and verify that we don't
emit an ODR signature for the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 23:53:08 +00:00
Eric Christopher
944aa2b784 Make sure we don't emit an ODR hash for types with no name and make
sure the comments for each testcase are a bit easier to distinguish.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 23:53:05 +00:00
Eric Christopher
407ec1422a Clarify comments for types contained in anonymous namespaces and
odr hashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 23:53:01 +00:00
Manman Ren
096880b590 Debug Info: enable verifier for testing cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 20:18:19 +00:00
Nadav Rotem
1aaa5cbab9 Add the C source code to the test to make it easier to update when debug info changes.
Thanks Eric.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187368 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 18:47:36 +00:00
Nadav Rotem
79c6bee7a9 SLPVectorier: update the debug location for the new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 18:18:46 +00:00
Manman Ren
d513b4033f Debug Info: update testing cases to pass verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 18:12:58 +00:00
Nico Rieck
fdbea5107b Use proper section suffix for COFF weak symbols
32-bit symbols have "_" as global prefix, but when forming the name of
COMDAT sections this prefix is ignored. The current behavior assumes that
this prefix is always present which is not the case for 64-bit and names
are truncated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 13:58:39 +00:00
Nico Rieck
944061c4e1 Proper va_arg/va_copy lowering on win64
Win64 uses CharPtrBuiltinVaList instead of X86_64ABIBuiltinVaList like
other 64-bit targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 13:07:06 +00:00
Rafael Espindola
cf48cf23de Add support for the 's' operation to llvm-ar.
If no other operation is specified, 's' becomes an operation instead of an
modifier. The s operation just creates a symbol table. It is the same as
running ranlib.

We assume the archive was created by a sane ar (like llvm-ar or gnu ar) and
if the symbol table is present, then it is current. We use that to optimize
the most common case: a broken build system that thinks it has to run ranlib.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187353 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 12:40:31 +00:00
Nico Rieck
c63dce3c59 MC: Support larger COFF string tables
Single-slash encoded entries do not require a terminating null. This bumps
the maximum table size from ~1MB to ~9.5MB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 12:30:12 +00:00
Silviu Baranga
fd79485dfa Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patch also adds the VFP4 feature to Cortex-A15 and fixes the DontUseFusedMAC predicate so that we can still generate vmla.f32 instructions on non-darwin targets with VFP4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187349 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 09:25:50 +00:00
Nadav Rotem
3202f6cdb9 Don't vectorize when the attribute NoImplicitFloat is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187340 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 05:13:00 +00:00
Benjamin Kramer
1faea8f086 DwarfDebug: MD5 is always little endian, bswap on big endian platforms.
This makes LLVM emit the same signature regardless of host and target endianess.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187304 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 14:14:43 +00:00
Tom Stellard
20f5541e01 SimplifyCFG: Add missing tests from r187278
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187291 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 02:54:44 +00:00
Manman Ren
2d69cc4bae Debug Info Verifier: verify SPs in llvm.dbg.sp.
Also always add DIType, DISubprogram and DIGlobalVariable to the list
in DebugInfoFinder without checking them, so we can verify them later
on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187285 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 01:26:08 +00:00
Nadav Rotem
67a38a2875 SLP Vectorier: Don't vectorize really short chains because they are already handled by the SelectionDAG store-vectorizer, which does a better job in deciding when to vectorize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187267 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 23:07:55 +00:00
Nadav Rotem
a629c3a4f0 SLP Vectorizer: Disable the vectorization of non power of two chains, such as <3 x float>, because we dont have a good cost model for these types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:53:11 +00:00
Rafael Espindola
c1bb2d4325 Use pipefail when available.
This change makes test with RUN lines like
RUN: opt ... | FileCheck

fail if opt fails, even if it prints what FileCheck wants. Enabling this
found some interesting cases of broken tests that were not being noticed
because opt (or some other tool) was crashing late.

Pipefail is used when the shell supports it or when using the internal
python based tester.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187261 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:32:58 +00:00
Rafael Espindola
e7e612f22f next batch of -disable-debug-info-verifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187260 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:31:26 +00:00
Owen Anderson
0c326f07ca When InstCombine tries to fold away (fsub x, (fneg y)) into (fadd x, y), it is
also worthwhile for it to look through FP extensions and truncations, whose
application commutes with fneg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 21:40:29 +00:00
Akira Hatanaka
9758562aa7 [mips] Implement llvm.trap intrinsic.
Patch by Sasa Stankovic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187244 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:58:55 +00:00
Akira Hatanaka
407883b69b [mips] Fix FP conditional move instructions to have explicit FP condition code
register operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187242 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:51:20 +00:00
Akira Hatanaka
83d8ef133b [mips] Fix FP branch instructions to have explicit FP condition code register
operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187238 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:13:47 +00:00
Manman Ren
ce0a12399c Debug Info Verifier: enable verification of DICompileUnit.
We used to call Verify before adding DICompileUnit to the list, and now we
remove the check and always add DICompileUnit to the list in DebugInfoFinder,
so we can verify them later on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187237 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:04:30 +00:00
Akira Hatanaka
9b06dd6ca2 [mips] Print instructions "beq", "bne" and "or" using assembler pseudo
instructions "beqz", "bnez" and "move", when possible.

beq $2, $zero, $L1 => beqz $2, $L1
bne $2, $zero, $L1 => bnez $2, $L1
or  $2, $3, $zero  => move $2, $3



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 18:34:25 +00:00
Eric Christopher
2dd272f896 Move this to the X86 directory, unfortunately the hashes are not
endian independent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:35:47 +00:00
Eric Christopher
3dee575b8d Add preliminary support for hashing DIEs and breaking them into
type units.

Initially this support is used in the computation of an ODR checker
for C++. For now we're attaching it to the DIE, but in the future
it will be attached to the type unit.

This also starts breaking out types into the separation for type
units, but without actually splitting the DIEs.

In preparation for hashing the DIEs this adds a DIEString type
that contains a StringRef with the string contained at the label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187213 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:02:41 +00:00
Rafael Espindola
16a0de5b4a Next batch of -disable-debug-info-verifier.
These tests fail without it if pipefail is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187205 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 14:16:30 +00:00
Justin Holewinski
320185fa5f Add a target legalize hook for SplitVectorOperand (again)
CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.

This also adds a test case for NVPTX that depends on this custom
legalization.

Differential Revision: http://llvm-reviews.chandlerc.com/D1195

Attempt to fix the buildbots by making the X86 test I just added platform independent

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187202 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 13:28:29 +00:00
Rafael Espindola
c735c1c2ae Revert "Add a target legalize hook for SplitVectorOperand"
This reverts commit 187198. It broke the bots.

The soft float test probably needs a -triple because of name differences.
On the hard float test I am getting a "roundss $1, %xmm0, %xmm0", instead of
"vroundss $1, %xmm0, %xmm0, %xmm0".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187201 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 13:18:16 +00:00
Justin Holewinski
5a24ed951b Add a target legalize hook for SplitVectorOperand
CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.

This also adds a test case for NVPTX that depends on this custom
legalization.

Differential Revision: http://llvm-reviews.chandlerc.com/D1195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187198 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 12:46:39 +00:00
Chandler Carruth
8d93d41027 Re-implement the analysis of uses in mem2reg to be significantly more
robust. It now uses an InstVisitor and worklist to actually walk the
uses of the Alloca transitively and detect the pattern which we can
directly promote: loads & stores of the whole alloca and instructions we
can completely ignore.

Also, with this new implementation teach both the predicate for testing
whether we can promote and the promotion engine itself to use the same
code so we no longer have strange divergence between the two code paths.

I've added some silly test cases to demonstrate that we can handle
slightly more degenerate code patterns now. See the below for why this
is even interesting.

Performance impact: roughly 1% regression in the performance of SROA or
ScalarRepl on a large C++-ish test case where most of the allocas are
basically ready for promotion. The reason is because of silly redundant
work that I've left FIXMEs for and which I'll address in the next
commit. I wanted to separate this commit as it changes the behavior.
Once the redundant work in removing the dead uses of the alloca is
fixed, this code appears to be faster than the old version. =]

So why is this useful? Because the previous requirement for promotion
required a *specific* visit pattern of the uses of the alloca to verify:
we *had* to look for no more than 1 intervening use. The end goal is to
have SROA automatically detect when an alloca is already promotable and
directly hand it to the mem2reg machinery rather than trying to
partition and rewrite it. This is a 25% or more performance improvement
for SROA, and a significant chunk of the delta between it and
ScalarRepl. To get there, we need to make mem2reg actually capable of
promoting allocas which *look* promotable to SROA without have SROA do
tons of work to massage the code into just the right form.

This is actually the tip of the iceberg. There are tremendous potential
savings we can realize here by de-duplicating work between mem2reg and
SROA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187191 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 08:20:39 +00:00
Craig Topper
6ee1464ba5 Add test cases for the various instruction alias and Intel syntax fixes that have gone in lately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187188 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 05:39:33 +00:00
Tobias Grosser
e7bc5bb862 Make .bc en/decoding of AttrKind stable
The bitcode representation attribute kinds are encoded into / decoded from
should be independent of the current set of LLVM attributes and their position
in the AttrKind enum. This patch explicitly encodes attributes to fixed bitcode
values.

With this patch applied, LLVM does not silently misread attributes written by
LLVM 3.3. We also enhance the decoding slightly such that an error message is
printed if an unknown AttrKind encoding was dected.

Bonus: Dropping bitcode attributes from AttrKind is now easy, as old AttrKinds
       do not need to be kept to support the Bitcode reader.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 04:16:55 +00:00
Roman Divacky
6ebf55d811 PPC32 va_list is an actual structure so va_copy needs to copy the whole
structure not just a pointer. This implements that and thus fixes va_copy
on PPC32. Fixes #15286. Both bug and patch by Florian Zeitz!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187158 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 21:36:47 +00:00
Rafael Espindola
1a9e24844f Remove dead code from the makefile build system.
Back in r140220 we removed the autoconf code that would set LLVMCC_OPTION
since it was only used by the test-suite. This patch now removes code
that would only be used if LLVMCC_OPTION was set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187154 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 20:25:31 +00:00
Manman Ren
cb420a4bc0 Debug Info: improve the verifier to check field types.
Make sure the context field of DIType is MDNode.
Fix testing cases to make them pass the verifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187150 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 19:33:30 +00:00