Commit Graph

87493 Commits

Author SHA1 Message Date
Dmitri Gribenko
44581afacc Documentation: cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 16:58:13 +00:00
Rafael Espindola
b09c146b11 The TargetData is not used for the isPowerOfTwo determination. It has never
been used in the first place.  It simply was passed to the function and to the
recursive invocations.  Simply drop the parameter and update the callers for the
new signature.

Patch by Saleem Abdulrasool!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169988 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 16:52:40 +00:00
Alexey Samsonov
1afbb51796 Improve debug info generated with enabled AddressSanitizer.
When ASan replaces <alloca instruction> with
<offset into a common large alloca>, it should also patch
llvm.dbg.declare calls and replace debug info descriptors to mark
that we've replaced alloca with a value that stores an address
of the user variable, not the user variable itself.

See PR11818 for more context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 14:31:53 +00:00
Dmitri Gribenko
cd5eb17be6 Documentation: use a 'console' highlighter for terminal output examples. This
gives a nicer output than 'bash'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169981 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 14:23:14 +00:00
Dmitri Gribenko
527036d5ff Documentation: use a 'console' highlighter for terminal output examples. This
gives a nicer output than 'bash'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 13:56:37 +00:00
NAKAMURA Takumi
bd85f1004d llvm/test/CodeGen/X86/atom-bypass-slow-division.ll: Fix possible typo(s) in CHECK-NOT lines.
Found by Alexander Zinenko, thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 13:34:20 +00:00
NAKAMURA Takumi
1a7b4a967d llvm/test/CodeGen/X86/atom-bypass-slow-division.ll: Rename symbols, s/test_/Test/g, not to mismatch "CHECK(-NOT): test".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169977 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 13:34:14 +00:00
Logan Chien
37c7461fc3 Add ARM NONE and PREL31 relocation types.
Add R_ARM_NONE and R_ARM_PREL31 relocation types
to MCExpr.  Both of them will be used while
generating .ARM.extab and .ARM.exidx sections.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169965 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 07:14:46 +00:00
Rafael Espindola
9ee68e3f72 Remove some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169963 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 06:18:15 +00:00
NAKAMURA Takumi
c34ccb7b68 [CMake] Fixup R600.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169962 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 03:34:26 +00:00
Evan Cheng
946a3a9f22 Sorry about the churn. One more change to getOptimalMemOpType() hook. Did I
mention the inline memcpy / memset expansion code is a mess?

This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset.
The first indicates whether it is expanding a memset or a memcpy / memmove.
The later is whether the memset is a memset of zero. It's totally possible
(likely even) that targets may want to do different things for memcpy and
memset of zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169959 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 02:34:41 +00:00
NAKAMURA Takumi
2ab2421a4e llvm/test/CodeGen/X86/store_op_load_fold.ll: Fix typo, s/CHECK_NEXT/CHECK-NEXT/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169957 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:41:01 +00:00
NAKAMURA Takumi
87de1e72cb llvm/test/CodeGen/X86/store_op_load_fold.ll: Add explicit triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:40:56 +00:00
Nadav Rotem
db65ff39fa Fix the ascii drawing that was ruined when I split the H and CPP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169955 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:33:47 +00:00
Evan Cheng
7d34267df6 - Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term.
Also added more comments to explain why it is generally ok to return true.
- Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to
be true for loaded source (memcpy) or zero constants (memset). The poor name
choice is probably some kind of legacy issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:32:07 +00:00
Nadav Rotem
6c645a35cc fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169953 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:31:10 +00:00
Manman Ren
981b96376a DAGCombine: clamp hi bit in APInt::getBitsSet to avoid assertion
rdar://12838504


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:13:50 +00:00
Nadav Rotem
5da804150d LoopVectorizer: When -Os is used, vectorize only loops that dont require a tail loop. There is no testcase because I dont know of a way to initialize the loop vectorizer pass without adding an additional hidden flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169950 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:11:46 +00:00
Evan Cheng
61f4dfe369 Avoid using lossy load / stores for memcpy / memset expansion. e.g.
f64 load / store on non-SSE2 x86 targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169944 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:42:09 +00:00
Michael Ilseman
d0a0d221da Have SimplifyBinOp call the new FAdd/FSub/FMul helpers, with fast-math flags off
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169943 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:29:16 +00:00
Shuxin Yang
5f70c2e934 - Fix a problematic way in creating all-the-1 APInt.
- Propagate "exact" bit of [l|a]shr instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169942 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:29:03 +00:00
Michael Ilseman
c244f38176 Remove redunant optimizations from InstCombine, instead call the appropriate functions from SimplifyInstruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169941 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:28:32 +00:00
Michael Ilseman
09ee250e72 Added a slew of SimplifyInstruction floating-point optimizations, many of which take advantage of fast-math flags. Test cases included.
fsub X, +0 ==> X
  fsub X, -0 ==> X, when we know X is not -0
  fsub +/-0.0, (fsub -0.0, X) ==> X
  fsub nsz +/-0.0, (fsub +/-0.0, X) ==> X
  fsub nnan ninf X, X ==> 0.0
  fadd nsz X, 0 ==> X
  fadd [nnan ninf] X, (fsub [nnan ninf] 0, X) ==> 0
    where nnan and ninf have to occur at least once somewhere in this expression
  fmul X, 1.0 ==> X



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169940 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:27:46 +00:00
Michael Ilseman
1d4b150704 Pattern matchers for floating point values
m_ConstantFP - match and bind a float constant
m_SpecificConstantFP - match a specific floating point value or vector of floats of that value
m_FPOne - match a floating point 1.0 or vector of 1.0s
m_NegZero - match -0.0
m_AnyZero - match 0 or -0.0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169939 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:23:43 +00:00
Michael Ilseman
08b25ce0a1 Remove FIXMEs surrounding Constant[Data]Vectors, instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169938 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:21:43 +00:00
Jim Grosbach
e202f8c3ee Trim unneeded header #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169933 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 23:39:51 +00:00
Dmitri Gribenko
8f69121d85 Documentation: cleanup: remove useless anchors and write :ref:s explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169932 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 23:35:23 +00:00
Jim Grosbach
c8cd8aa9d8 ARM: Remove old testing option.
Pre-regalloc frame allocation and referencing has been on by default
for ages. No need for the testing option that disables it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169931 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 23:31:12 +00:00
Jim Grosbach
48aa2cf76d ARM: Remove old testing options.
Base pointer referencing has been enabled for ages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169930 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 23:31:10 +00:00
Evan Cheng
e07f85eb76 Replace TargetLowering::isIntImmLegal() with
ScalarTargetTransformInfo::getIntImmCost() instead. "Legal" is a poorly defined
term for something like integer immediate materialization. It is always possible
to materialize an integer immediate. Whether to use it for memcpy expansion is
more a "cost" conceern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169929 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 23:26:14 +00:00
Dmitri Gribenko
76a130b361 Documentation: Lexicon.rst: add 'SLP' acronym
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169928 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 23:13:23 +00:00
Nadav Rotem
655d2c5354 PR14574. Fix a bug in the code that calculates the mask the converted PHIs in if-conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169916 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 21:30:14 +00:00
Tom Stellard
f98f2ce29e Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 21:25:42 +00:00
Bill Schmidt
57ac1f458a This patch implements the general dynamic TLS model for 64-bit PowerPC.
Given a thread-local symbol x with global-dynamic access, the generated
code to obtain x's address is:

     Instruction                            Relocation            Symbol
  addis ra,r2,x@got@tlsgd@ha           R_PPC64_GOT_TLSGD16_HA       x
  addi  r3,ra,x@got@tlsgd@l            R_PPC64_GOT_TLSGD16_L        x
  bl __tls_get_addr(x@tlsgd)           R_PPC64_TLSGD                x
                                       R_PPC64_REL24           __tls_get_addr
  nop
  <use address in r3>

The implementation borrows from the medium code model work for introducing
special forms of ADDIS and ADDI into the DAG representation.  This is made
slightly more complicated by having to introduce a call to the external
function __tls_get_addr.  Using the full call machinery is overkill and,
more importantly, makes it difficult to add a special relocation.  So I've
introduced another opcode GET_TLS_ADDR to represent the function call, and
surrounded it with register copies to set up the parameter and return value.

Most of the code is pretty straightforward.  I ran into one peculiarity
when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like
BL8_NOP_ELF except that it takes another parameter to represent the symbol
("x" above) that requires a relocation on the call.  Something in the 
TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated
identically during the emit phase, so this second operand was never
visited to generate relocations.  This is the reason for the slightly
messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding().

Two new tests are included to demonstrate correct external assembly and
correct generation of relocations using the integrated assembler.

Comments welcome!

Thanks,
Bill


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 20:30:11 +00:00
Eric Christopher
0b944ee36f Update some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169907 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 19:42:09 +00:00
Nadav Rotem
5e9efa10fc Loop Vectorize: optimize the vectorization of trunc(induction_var). The truncation is now done on scalars.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 18:58:10 +00:00
Eli Bendersky
37a9830d20 Remove the RelaxAll overrule in MCAssembler::fixupNeedsRelaxation,
because that method is only getting called for MCInstFragment. These
fragments aren't even generated when RelaxAll is set, which is why the
flag reference here is superfluous. Removing it simplifies the code
with no harmful effects.

An assertion is added higher up to make sure this path is never
reached.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169886 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 17:16:00 +00:00
Rafael Espindola
0439f3e0cf Use an ArrayRef instead of a std::vector&.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169881 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 16:36:02 +00:00
Joel Jones
8293b7b8b1 Add comment for load folding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 16:10:25 +00:00
Dmitri Gribenko
e4b3e9445f Documentation: convert Passes.html to reST.
Since now we have an autogenerated TOC, a manually written table of all passes
was removed.

Patch by Anthony Mykhailenko with small fixes by me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169867 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 15:29:37 +00:00
NAKAMURA Takumi
f38833c7ad llvm/test/TableGen: Remove XFAIL:vg_leak in dozen of tests, according to llvm-x86_64-linux-vg_leak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169862 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 13:14:16 +00:00
Evgeniy Stepanov
7fa2240485 [msan] Use explicitely aligned stores and loads with function argument shadow.
Use explicitely aligned store and load instructions to deal with argument and
retval shadow. This matters when an argument's alignment is higher than
__msan_param_tls alignment (which is the case with __m128i).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169859 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 12:34:09 +00:00
Patrik Hagglund
34525f9ac0 Revert EVT->MVT changes, r169836-169851, due to buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 11:14:33 +00:00
Chandler Carruth
7550f96b2f Holding my nose and moving the accumulation routine to GEPOperator
instead of the instruction. I've left a forwarding wrapper for the
instruction so users with the instruction don't need to create
a GEPOperator themselves.

This lets us remove the copy of this code in instsimplify.

I've looked at most of the other copies of similar code, and this is the
only one I've found that is actually exactly the same. The one in
InlineCost is very close, but it requires re-mapping non-constant
indices through the cost analysis value simplification map. I could add
direct support for this to the generic routine, but it seems overly
specific.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169853 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 11:05:15 +00:00
Chandler Carruth
4ced4ee94b Hoist the GEP constant address offset computation to a common home on
the GEP instruction class.

This is part of the continued refactoring and cleaning of the
infrastructure used by SROA. This particular operation is also done in
a few other places which I'll try to refactor to share this
implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 10:29:10 +00:00
Patrik Hagglund
05749cff9b Change RegVT in BitTestBlock and RegsForValue, to contain MVTs,
instead of EVTs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169851 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 10:24:48 +00:00
Patrik Hagglund
47fd10f2fc Change TargetLowering::getTypeForExtArgOrReturn to take and return
MVTs, instead of EVTs.

Accordingly, add bitsLT (and similar) to MVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169850 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 10:20:51 +00:00
Patrik Hagglund
1d367e9bcc Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169849 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 10:16:19 +00:00
Patrik Hagglund
2d916231ff Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169848 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 10:09:23 +00:00
Patrik Hagglund
235c75cc21 Change TargetLowering::TransformToType to contain MVTs, instead of
EVTs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169847 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 10:05:04 +00:00