Commit Graph

2859 Commits

Author SHA1 Message Date
Dale Johannesen
71d1bf55a2 Remove misuse of ReplaceNodeResults for atomics with
valid types.  No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56808 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-29 22:25:26 +00:00
Dan Gohman
a43abd102f Fix FastISel to not initialize the PIC-base register multiple times
in functions with PIC references from more than one basic block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-29 21:55:50 +00:00
Bill Wendling
d5d8191b20 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition  -isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 22:10:44 +00:00
Dan Gohman
7810bfed55 Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 21:54:37 +00:00
Evan Cheng
36a55023c1 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 19:48:35 +00:00
Dale Johannesen
86098bd6a6 Add "inreg" field to CallSDNode (doesn't increase
its size).  Adjust various lowering functions to
pass this info through from CallInst.  Use it to
implement sseregparm returns on X86.  Remove
X86_ssecall calling convention.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 19:31:26 +00:00
Devang Patel
0598866c05 Large mechanical patch.
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56622 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 21:00:45 +00:00
Dale Johannesen
c9c6da61ac Accept 'inreg' attribute on x86 functions as
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0).  Update documentation
to reflect reality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56619 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 20:47:45 +00:00
Dan Gohman
5dd9c2e9ae Support for i1 XOR in FastISel. It is actually safe because
i1 operands are assumed to already by zero-extended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56615 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 17:22:52 +00:00
Dan Gohman
77ca41e5c3 Don't print fast-isel debug messages by default. Thanks Chris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56614 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 17:21:42 +00:00
Dan Gohman
2c442eda74 Don't forget the newline in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56613 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 17:17:27 +00:00
Dan Gohman
33134c4a75 FastISel support for debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56610 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 17:05:24 +00:00
Richard Pennington
4b052dc63d bug 2812: Segmentation fault on a big emdiam processor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56609 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 16:15:10 +00:00
Dan Gohman
dceffe66b9 Fix a recent fast-isel coverage regression - don't bail out before
giving the target a chance to materialize constants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56605 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 01:28:51 +00:00
Dan Gohman
2c4bf119be Enable DeadMachineInstructionElim when Fast-ISel is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 01:14:49 +00:00
Evan Cheng
aa765b8c35 <rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56597 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 00:14:04 +00:00
Dale Johannesen
8e3455ba17 Remove SelectionDag early allocation of registers
for earlyclobbers.  Teach Local RA about earlyclobber,
and add some tests for it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56592 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 23:13:09 +00:00
Bill Wendling
f3cbca279d Reapplying r56550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 10:25:02 +00:00
Bill Wendling
688d1c4ccf Forgot this part with my last patch. Sorry about the breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 10:16:24 +00:00
Eric Christopher
83e05c48de Temporarily revert r56550 until missing commit can be added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 08:30:44 +00:00
Bill Wendling
df0c7bc52d Refactor the constant folding code into it's own function. And call it from both
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.

This is *not* in response to a bug, so there isn't a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56550 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 07:11:26 +00:00
Dale Johannesen
86b49f8e2d Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 01:07:17 +00:00
Evan Cheng
da43bcf624 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 00:05:32 +00:00
Devang Patel
eaf42abab6 s/ParameterAttributes/Attributes/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56513 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23 23:03:40 +00:00
Dan Gohman
d57dd5f4e6 Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23 21:53:34 +00:00
Dan Gohman
086ec9976f Replace the LiveRegs SmallSet with a simple counter that keeps
track of the number of live registers, which is all the set was
being used for.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56498 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23 18:50:48 +00:00
Dan Gohman
87a0f10dc7 Fix the alignment of loads from constant pool entries when the
load address has an offset from the base of the constant pool
entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56479 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22 22:40:08 +00:00
Dale Johannesen
0bb41608e9 Make log, log2, log10, exp, exp2 use Expand by
default.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22 21:57:32 +00:00
Evan Cheng
242ebd145d Per review feedback: Only perform
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56452 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22 18:19:24 +00:00
Oscar Fuentes
3d01fc7de8 Initial support for the CMake build system.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56419 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22 01:08:49 +00:00
Bill Wendling
cd4c73aa70 Add helper function to get a 32-bit floating point constant. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56418 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22 00:44:35 +00:00
Chris Lattner
ca19a3fd11 don't print GlobalAddressSDNode's with an offset of zero as "foo0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56399 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-21 18:38:31 +00:00
Dan Gohman
2ff7fd1461 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 22:16:54 +00:00
Dan Gohman
ee2e403545 Add a new "fast" scheduler. This is currently basically just a
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 16:26:26 +00:00
Dale Johannesen
91aac1015e Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 21:13:11 +00:00
Dan Gohman
59932584a8 Don't worry about clobbering physical register defs that aren't used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 15:25:49 +00:00
Evan Cheng
1cd332725f When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 23:12:11 +00:00
Dan Gohman
50284d81f8 Change SelectionDAG::getConstantPool to always set the alignment of the
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.

In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.

This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)

Patch by Paul Redmond!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56253 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 22:05:41 +00:00
Bill Wendling
056292fd73 Reverting r56249. On further investigation, this functionality isn't needed.
Apologies for the thrashing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 21:48:12 +00:00
Dan Gohman
aed48bfee8 Include the alignment value when displaying ConstantPoolSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 21:18:22 +00:00
Bill Wendling
9468a9b6be - Change "ExternalSymbolSDNode" to "SymbolSDNode".
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 21:12:30 +00:00
Dan Gohman
1937e2f6ca Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
are not enabled. Instead just omit the tail call flag when calls are
created.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56235 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 01:42:28 +00:00
Dan Gohman
5eb0cecbc5 Re-enable SelectionDAG CSE for calls. It matters in the case of
libcalls, as in this testcase on ARM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56226 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15 19:46:03 +00:00
Dan Gohman
095cc29f32 Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:54:27 +00:00
Dan Gohman
4fbd796a12 Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 18:08:03 +00:00
Dale Johannesen
913d3dfac4 Pass "earlyclobber" bit through to machine
representation; coalescer and RA need to know
about it.  No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56161 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 17:49:03 +00:00
Dan Gohman
f5aeb1a8e4 Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 16:56:44 +00:00
Dale Johannesen
e2f2083f9c The sequence for ppcf128 compares was not IEEE
safe in the presence of NaNs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56136 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 00:30:56 +00:00
Dan Gohman
74321abb4f FastISel support for i1 PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56069 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 21:01:31 +00:00
Dan Gohman
8211648757 FastISel support for i1 constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56068 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 21:01:08 +00:00