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19 Commits

Author SHA1 Message Date
Evan Cheng
4db3cffe94 Hide the call to InitMCInstrInfo into tblgen generated ctor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-01 17:57:27 +00:00
Anton Korobeynikov
cd775ceff0 Move callee-saved regs spills / reloads to TFI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120228 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 23:05:03 +00:00
Jakob Stoklund Olesen
78e6e00922 Remove the isMoveInstr() hook. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108567 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-16 22:35:46 +00:00
Jakob Stoklund Olesen
41ce3cfd1b Replace copyRegToReg with copyPhysReg for MSP430. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108080 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 06:53:30 +00:00
Stuart Hastings
3bf9125933 Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This 
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.

This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-17 22:43:56 +00:00
Evan Cheng
2457f2c661 Implement @llvm.returnaddress. rdar://8015977. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 01:47:14 +00:00
Dan Gohman
34dcc6fadc Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 
doesn't have to guess.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-06 20:33:48 +00:00
Evan Cheng
746ad69e08 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-06 19:06:44 +00:00
Anton Korobeynikov
702adaba6d Add branch relaxation pass (shamelessly stolen from PPC). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93554 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:19:05 +00:00
Dan Gohman
864e2efce2 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of 
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90634 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-05 00:44:40 +00:00
Anton Korobeynikov
90593d2e1f Implement branch folding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84774 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 19:17:18 +00:00
Anton Korobeynikov
3926fb63c2 Cosmetic changes, no functionality changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84773 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 19:16:49 +00:00
Anton Korobeynikov
8644af3690 Add InsertBranch() hook for tail mergeing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70754 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:15:22 +00:00
Anton Korobeynikov
8b528e52ee Lower select with custom inserted and make condjumps generic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70744 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:23 +00:00
Anton Korobeynikov
ed1a51af37 Add first draft for conditions, conditional branches, etc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70743 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:12:06 +00:00
Anton Korobeynikov
d5047cb9f7 Add code for save/restore of callee-saved registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70739 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:11:04 +00:00
Anton Korobeynikov
aa29915b58 First draft of stack slot loads / stores lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70735 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:09:57 +00:00
Anton Korobeynikov
1df221f2bb Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 13:02:04 +00:00
Anton Korobeynikov
f2c3e179ec Dummy MSP430 backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70694 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-03 12:57:15 +00:00