Commit Graph

98563 Commits

Author SHA1 Message Date
David Blaikie
08e03ce70f DwarfDebug: Walk skeletons during fission pubtypes/pubnames emission
This more accurately represents the actual walk - pubnames/pubtypes are
emitted into the .o, not the .dwo, and reference the skeletons not the
full units.

Use the newly established ID->index invariant to lookup the underlying
full unit to retrieve its public names and types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196601 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 19:38:49 +00:00
David Blaikie
5877a5b8a2 DebugInfo: Ensure unit IDs (for non-skeletal units) match thein index in the list
This simplifies reasoning about the code and enables simple navigation
from a skeleton to its full unit. (currently there are no type unit
skeletons, so the skeleton list doesn't have the same ID == index
property)

Eventually we should get rid of this ID and just store the labels we
need as the IDs are allowing this code to create difficult to
manage/understand associations (loops over non-skeletal units are
implicitly referencing their skeletal units during pub* emission, for
example). It may be necessary to have some kind of skeleton->full unit
association and a more direct pointer or similar device would be
preferable than an index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196600 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 19:38:46 +00:00
Weiming Zhao
1c6611db44 Bug 18149: [AArch32] VSel instructions has no ARMCC field
The current peephole optimizing for compare inst assumes an instr that
uses CPSR has an MO for ARM Cond code.However, for VSEL instructions
(vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do
they support the modification of Cond Code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196588 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 17:56:48 +00:00
Andrew Trick
c008152a39 comment grammar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196585 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 17:19:20 +00:00
Cameron McInally
febc28b529 Update AVX512 vector blend intrinsic names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196581 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 13:35:35 +00:00
Richard Sandiford
9f9758935a [SystemZ] Use LOAD AND TEST for comparisons with -0
...since it os equivalent to comparison with +0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196580 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 09:59:12 +00:00
Richard Sandiford
8bf51dc72b [SystemZ] Extend the use of C(L)GFR
instcombine prefers to put extended operands first, so this patch
handles that case for C(L)GFR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196579 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 09:56:50 +00:00
Richard Sandiford
e3a804ba21 [SystemZ] Optimize selects between 0 and -1
Since z has no setcc instruction as such, the choice of setBooleanContents
is a bit arbitrary.  Currently it's set to ZeroOrOneBooleanContent,
so we produced a branch-free form when selecting between 0 and 1,
but not when selecting between 0 and -1.  This patch handles the latter
case too.

At some point I'd like to measure whether it's better to use conditional
moves for constant selects on z196, but that's future work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196578 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 09:53:09 +00:00
Kostya Serebryany
5aafde2d5a [asan] fix ndebug build with strict warnings (-Wunused-variable)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196574 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 09:26:09 +00:00
Kostya Serebryany
daa1bf3b74 [asan] rewrite asan's stack frame layout
Summary:
Rewrite asan's stack frame layout.
First, most of the stack layout logic is moved into a separte file
to make it more testable and (potentially) useful for other projects.
Second, make the frames more compact by using adaptive redzones
(smaller for small objects, larger for large objects).
Third, try to minimized gaps due to large alignments (this is hypothetical since
today we don't see many stack vars aligned by more than 32).

The frames indeed become more compact, but I'll still need to run more benchmarks
before committing, but I am sking for review now to get early feedback.

This change will be accompanied by a trivial change in compiler-rt tests
to match the new frame sizes.

Reviewers: samsonov, dvyukov

Reviewed By: samsonov

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2324

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196568 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 09:00:17 +00:00
Daniel Jasper
21c34931e8 Fix bug introduced in r196517.
Not only does it trigger -Wparentheses, I think the assert actually
relies on incorrect operator precedence.

Also, the grammar as questionable, but I might not know enough about the
problem at hand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196567 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 08:58:22 +00:00
Eric Christopher
23b773836c Fix an index array check.
Patch by Marius Wachtler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196561 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 02:45:24 +00:00
Eric Christopher
a6000643d9 Fix a pair of array index checks.
Patch by Marius Wachtler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196560 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 02:33:38 +00:00
Rui Ueyama
f8edf9fca9 Object/COFF: Add export table entry structs.
Differential Revision: http://llvm-reviews.chandlerc.com/D2335

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196556 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 01:06:04 +00:00
Juergen Ributzka
fca7695903 [Stackmap] Update stackmap unit test to use AnyRegCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196552 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 00:28:54 +00:00
Reed Kotler
dee63f414d Delete dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196551 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-06 00:13:50 +00:00
Yi Jiang
ab906d0048 Apply transformation on OS X 10.9+ and iOS 7.0+: pow(10, x) ―> __exp10(x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196544 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 22:42:50 +00:00
Yuchen Wu
7d3a11fd9f llvm-cov: Further improved error messages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196542 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 22:02:33 +00:00
Yuchen Wu
298c76540e llvm-cov: Conformed headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196541 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 22:02:29 +00:00
Renato Golin
3a6ea481a1 Move test to X86 dir
Test is platform independent, but I don't want to force vector-width, or
that could spoil the pragma test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196539 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 21:45:39 +00:00
Renato Golin
07d9471bc5 Add #pragma vectorize enable/disable to LLVM
The intended behaviour is to force vectorization on the presence
of the flag (either turn on or off), and to continue the behaviour
as expected in its absence. Tests were added to make sure the all
cases are covered in opt. No tests were added in other tools with
the assumption that they should use the PassManagerBuilder in the
same way.

This patch also removes the outdated -late-vectorize flag, which was
on by default and not helping much.

The pragma metadata is being attached to the same place as other loop
metadata, but nothing forbids one from attaching it to a function
(to enable #pragma optimize) or basic blocks (to hint the basic-block
vectorizers), etc. The logic should be the same all around.

Patches to Clang to produce the metadata will be produced after the
initial implementation is agreed upon and committed. Patches to other
vectorizers (such as SLP and BB) will be added once we're happy with
the pass manager changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196537 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 21:20:02 +00:00
Aditya Nandakumar
226e3eab9b Check hint registers for interference only once before evictions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196536 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 21:18:40 +00:00
Ana Pazos
32cbcf2295 Implemented vget/vset_lane_f16 intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196533 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 21:07:49 +00:00
Yuchen Wu
54dfc2a2be llvm-cov: Changed extension from .llcov to .gcov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196530 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 20:45:36 +00:00
Matt Arsenault
d4deecd3c7 Revert part of GCC warning fix to fix debug build.
The typedef is used inside the DEBUG(), and apparently can't be moved
inside of it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196528 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 20:02:18 +00:00
Matt Arsenault
5024536352 Fix minor GCC warnings.
Unused typedefs and unused variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196526 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 19:37:36 +00:00
Michael Gottesman
f3f9cff0fb Change std::deque => std::vector. No functionality change.
There is no reason to use std::deque here over std::vector. Thus given the
performance differences inbetween the two it makes sense to change deque to
vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196524 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 18:42:12 +00:00
Yunzhong Gao
9477d57763 Document that dllexported symbols are preserved by optimization passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196523 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 18:37:54 +00:00
Rafael Espindola
3bb1184a1a Fix non-deterministic behavior.
We use CSEBlocks to initialize a worklist:

SmallVector<BasicBlock *, 8> CSEWorkList(CSEBlocks.begin(), CSEBlocks.end());

so it must have a deterministic order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196520 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 18:28:01 +00:00
Eric Christopher
60e5b16f41 Rename DwarfUnits to DwarfFile to help avoid some naming confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196519 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 18:06:10 +00:00
Andrew Trick
6606ef0e98 MI-Sched: Model "reserved" processor resources.
This allows a target to use MI-Sched as an in-order scheduler that
will model strict resource conflicts without defining a processor
itinerary. Instead, the target can now use the new per-operand machine
model and define in-order resources with BufferSize=0. For example,
this would allow restricting the type of operations that can be formed
into a dispatch group. (Normally NumMicroOps is sufficient to enforce
dispatch groups).

If the intent is to model latency in in-order pipeline, as opposed to
resource conflicts, then a resource with BufferSize=1 should be
defined instead.

This feature is only casually tested as there are no in-tree targets
using it yet. However, Hal will be experimenting with POWER7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196517 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 17:56:02 +00:00
Andrew Trick
573931394f MI-Sched: handle latency of in-order operations with the new machine model.
The per-operand machine model allows the target to define "unbuffered"
processor resources. This change is a quick, cheap way to model stalls
caused by the latency of operations that use such resources. This only
applies when the processor's micro-op buffer size is non-zero
(Out-of-Order). We can't precisely model in-order stalls during
out-of-order execution, but this is an easy and effective
heuristic. It benefits cortex-a9 scheduling when using the new
machine model, which is not yet on by default.

MI-Sched for armv7 was evaluated on Swift (and only not enabled because
of a performance bug related to predication). However, we never
evaluated Cortex-A9 performance on MI-Sched in its current form. This
change adds MI-Sched functionality to reach performance goals on
A9. The only remaining change is to allow MI-Sched to run as a PostRA
pass.

I evaluated performance using a set of options to estimate the performance impact once MI sched is default on armv7:
-mcpu=cortex-a9 -disable-post-ra -misched-bench -scheditins=false

For a simple saxpy loop I see a 1.7x speedup. Here are the llvm-testsuite results:
(min run time over 2 runs, filtering tiny changes)

Speedups:
| Benchmarks/BenchmarkGame/recursive         |  52.39% |
| Benchmarks/VersaBench/beamformer           |  20.80% |
| Benchmarks/Misc/pi                         |  19.97% |
| Benchmarks/Misc/mandel-2                   |  19.95% |
| SPEC/CFP2000/188.ammp                      |  18.72% |
| Benchmarks/McCat/08-main/main              |  18.58% |
| Benchmarks/Misc-C++/Large/sphereflake      |  18.46% |
| Benchmarks/Olden/power                     |  17.11% |
| Benchmarks/Misc-C++/mandel-text            |  16.47% |
| Benchmarks/Misc/oourafft                   |  15.94% |
| Benchmarks/Misc/flops-7                    |  14.99% |
| Benchmarks/FreeBench/distray               |  14.26% |
| SPEC/CFP2006/470.lbm                       |  14.00% |
| mediabench/mpeg2/mpeg2dec/mpeg2decode      |  12.28% |
| Benchmarks/SmallPT/smallpt                 |  10.36% |
| Benchmarks/Misc-C++/Large/ray              |   8.97% |
| Benchmarks/Misc/fp-convert                 |   8.75% |
| Benchmarks/Olden/perimeter                 |   7.10% |
| Benchmarks/Bullet/bullet                   |   7.03% |
| Benchmarks/Misc/mandel                     |   6.75% |
| Benchmarks/Olden/voronoi                   |   6.26% |
| Benchmarks/Misc/flops-8                    |   5.77% |
| Benchmarks/Misc/matmul_f64_4x4             |   5.19% |
| Benchmarks/MiBench/security-rijndael       |   5.15% |
| Benchmarks/Misc/flops-6                    |   5.10% |
| Benchmarks/Olden/tsp                       |   4.46% |
| Benchmarks/MiBench/consumer-lame           |   4.28% |
| Benchmarks/Misc/flops-5                    |   4.27% |
| Benchmarks/mafft/pairlocalalign            |   4.19% |
| Benchmarks/Misc/himenobmtxpa               |   4.07% |
| Benchmarks/Misc/lowercase                  |   4.06% |
| SPEC/CFP2006/433.milc                      |   3.99% |
| Benchmarks/tramp3d-v4                      |   3.79% |
| Benchmarks/FreeBench/pifft                 |   3.66% |
| Benchmarks/Ptrdist/ks                      |   3.21% |
| Benchmarks/Adobe-C++/loop_unroll           |   3.12% |
| SPEC/CINT2000/175.vpr                      |   3.12% |
| Benchmarks/nbench                          |   2.98% |
| SPEC/CFP2000/183.equake                    |   2.91% |
| Benchmarks/Misc/perlin                     |   2.85% |
| Benchmarks/Misc/flops-1                    |   2.82% |
| Benchmarks/Misc-C++-EH/spirit              |   2.80% |
| Benchmarks/Misc/flops-2                    |   2.77% |
| Benchmarks/NPB-serial/is                   |   2.42% |
| Benchmarks/ASC_Sequoia/CrystalMk           |   2.33% |
| Benchmarks/BenchmarkGame/n-body            |   2.28% |
| Benchmarks/SciMark2-C/scimark2             |   2.27% |
| Benchmarks/Olden/bh                        |   2.03% |
| skidmarks10/skidmarks                      |   1.81% |
| Benchmarks/Misc/flops                      |   1.72% |

Slowdowns:
| Benchmarks/llubenchmark/llu                | -14.14% |
| Benchmarks/Polybench/stencils/seidel-2d    |  -5.67% |
| Benchmarks/Adobe-C++/functionobjects       |  -5.25% |
| Benchmarks/Misc-C++/oopack_v1p8            |  -5.00% |
| Benchmarks/Shootout/hash                   |  -2.35% |
| Benchmarks/Prolangs-C++/ocean              |  -2.01% |
| Benchmarks/Polybench/medley/floyd-warshall |  -1.98% |
| Polybench/linear-algebra/kernels/3mm       |  -1.95% |
| Benchmarks/McCat/09-vor/vor                |  -1.68% |

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196516 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 17:55:58 +00:00
Andrew Trick
bdbcb4dfbc Machine model comments. Explain a ProcessorUnit's BufferSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196515 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 17:55:53 +00:00
Andrew Trick
c9fc1e7de9 Fix the A9 machine model. VTRN writes two registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196514 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 17:55:49 +00:00
Andrew Trick
0591e2a415 comment typo and reformat
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196513 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 17:55:47 +00:00
Rafael Espindola
6b11950e39 Add a default constructor to get deterministic behavior.
Should fix the msan and valgrind bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196509 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 16:21:17 +00:00
Arnold Schwaighofer
9e0807cb61 SLPVectorizer: An in-tree vectorized entry cannot also be a scalar external use
We were creating external uses for scalar values in MustGather entries that also
had a ScalarToTreeEntry (they also are present in a vectorized tuple). This
meant we would keep a value 'alive' as a scalar and vectorized causing havoc.
This is not necessary because when we create a MustGather vector we explicitly
create external uses entries for the insertelement instructions of the
MustGather vector elements.

Fixes PR18129.

radar://15582184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196508 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 15:14:40 +00:00
Kostya Serebryany
64abf5b441 [tsan] fix PR18146: sometimes a variable written into vptr could have an integer type (after other optimizations)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196507 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 15:03:02 +00:00
Justin Holewinski
7add5421a6 [NVPTX] Fix off-by-one error when creating the VT list for an SDNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196503 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 12:58:00 +00:00
Alexey Samsonov
4012c30ef7 Add forgotten header guards
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196500 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 12:52:32 +00:00
Matheus Almeida
bc7114feab [mips] Small code generation improvement for conditional operator (select)
in case the operands are constants and its difference is |1|.
It should be possible in those cases to rematerialize the result using
MIPS's slt and similar instructions.

The small update to some of the tests in cmov.ll, sel1c.ll and sel2c.ll was needed
otherwise the optimization implemented in this patch would have been triggered
(difference between the operands was 1) and that would have changed the semantic
of the tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196498 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 12:07:05 +00:00
Matheus Almeida
00877e733f [mips] Add some comments related to the optimization performed in performSELECTCombine.
The structure of the code was slightly modified so that the next patch is easier to read/review.

No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196496 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 11:56:56 +00:00
Matheus Almeida
4faa2b38fb [mips][msa] Fix issue with immediate fields of LD/ST instructions
not being correctly encoded/decoded.
In more detail, immediate fields of LD/ST instructions should be
divided/multiplied by the size of the data format before encoding and
after decoding, respectively.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196494 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 11:06:22 +00:00
Tim Northover
52123d1842 ARM: fix yet another stack-folding bug
We were trying to fold the stack adjustment into the wrong instruction in the
situation where the entire basic-block was epilogue code. Really, it can only
ever be valid to do the folding precisely where the "add sp, ..." would be
placed so there's no need for a separate iterator to track that.

Should fix PR18136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196493 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 11:02:02 +00:00
David Blaikie
0d668218e7 DwarfDebug/DwarfUnit: Push abbreviation structures down into DwarfUnits to reduce duplication
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196479 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 07:43:55 +00:00
Matt Arsenault
714ce8ae3e Use isIntrinsic() instead of checking for "llvm."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196473 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 06:05:43 +00:00
Rafael Espindola
fac7a9e644 Remove the isImplicitlyPrivate argument of getNameWithPrefix.
getSymbolWithGlobalValueBase use is to create a name of a new symbol based
on the name of an existing GV. Assert that and then remove the last call
to pass true to isImplicitlyPrivate.

This gives the mangler API a 1:1 mapping from GV to names, which is what we
need to drop the mangler dependency on the target (and use an extended
datalayout instead).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196472 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 05:53:12 +00:00
Alp Toker
087ab613f4 Correct word hyphenations
This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities and contractions in nearby lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196471 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 05:44:44 +00:00
Rafael Espindola
9155b17815 Hide the stub created for MO_ExternalSymbol too.
given

declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1)
declare void @foo()
define void @bar() {
  call void @foo()
  call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 188, i32 1, i1 false)
  ret void
}

We used to produce

L_foo$stub:
        .indirect_symbol        _foo
        .ascii  "\364\364\364\364\364"

_memset$stub:
        .indirect_symbol        _memset
        .ascii  "\364\364\364\364\364"

We not produce a private stub for memset too.

Stubs are not needed with recent linkers, but we still produce them for darwin8.

Thanks to David Fang for confirming that gcc used to do this too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196468 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 05:19:12 +00:00
Matt Arsenault
87234703e8 R600/SI: Add comments for number of used registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196467 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 05:15:35 +00:00