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6828 Commits

Author SHA1 Message Date
Andrew Lenharth
29c277fc2c Preliminary support for inline asm in the cbe. The target specific ugliness 
is still in Writer, but issolated to a single function. This might be split
into something in each target directory.  This is sufficient to get through
archie and an strcpy impl on linux-x86.

Module level asm is not handled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31948 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:50:49 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Reid Spencer
639cf7d380 When truncating to bool, it is necessary to & with 1 for all casts that 
can result in a bool. Previously PtrToInt, FPToUI and FPToSI were missing
this operation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31938 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 18:51:06 +00:00
Reid Spencer
3da59db637 For PR950: 
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31931 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 01:05:10 +00:00
Duraid Madina
f525eb9056 fix storing bools to mem and unordered FP ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31920 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-26 04:34:26 +00:00
Reid Spencer
24652d16f8 Add newline at end of file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31902 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-25 05:41:02 +00:00
Anton Korobeynikov
12c49af81e Refactored *GVRequiresExtraLoad() to Subtarget method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31887 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-21 00:01:06 +00:00
Chris Lattner
e9c9f98f71 in ppc64-mode, don't allocate the 32-bit version of r13 either. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31884 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 20:48:05 +00:00
Chris Lattner
bdc571b7d5 r13 is the thread pointer on darwin/ppc64, don't allocate it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31882 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 19:33:51 +00:00
Chris Lattner
3b6f497873 Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit 
features autodetected.  This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31879 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 18:16:05 +00:00
Anton Korobeynikov
a59868519b We should perform extra load for dllimported calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31874 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 10:46:14 +00:00
Chris Lattner
b1eb987ccd on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots. 
Also, valist should create a pointer RC reg class value, not a GPRC value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 01:57:19 +00:00
Chris Lattner
ff790894bd make sure to safe LR8 in the right stack slot for PPC64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31839 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 01:34:43 +00:00
Chris Lattner
566c1b1a04 Pretty print 'rldicr r2, r2, 2, 61' as 'sldi r2, r2, 2'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31838 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 01:23:56 +00:00
Chris Lattner
54e853b8a6 Rewrite the branch selector to be correct in the face of large functions. 
The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model.  This fixes assembler errors when compiling 403.gcc with
tail merging enabled.

Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion.  Only if branches need expansion are instructions rewritten
and created.  This should make branch select faster, and eliminates the
Bxx instructions from the .td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31837 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 00:32:03 +00:00
Chris Lattner
d5275157b5 add encoding for BCC, after finally wrestling strange ppc/tblgen endianness 
issues to the ground.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31836 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 23:53:28 +00:00
Chris Lattner
18258c6404 convert PPC::BCC to use the 'pred' operand instead of separate predicate 
value and CR reg #.  This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 22:37:34 +00:00
Chris Lattner
289c2d5f45 rename PPC::COND_BRANCH to PPC::BCC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31834 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 22:14:47 +00:00
Chris Lattner
df4ed6350b start using PPC predicates more consistently. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31833 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 22:10:59 +00:00
Evan Cheng
b1409ce7ba For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while 
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31832 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 22:10:14 +00:00
Jim Laskey
9dea41d9e1 Hopefully a good crack at making debugging work on intel -disable-fp-elim. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 21:19:15 +00:00
Jim Laskey
d6fa8c166a Assert unhandled case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31828 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 18:49:39 +00:00
Jim Laskey
2ff5cdb16c 1. Ignore the -disable-fp-elim when the routine is a leaf. 
2. Offsets on 64-bit stores are still in bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31824 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 16:09:31 +00:00
Jim Laskey
c1c2f4b52b Typo. Fix the nightly tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31823 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 14:06:41 +00:00
Bill Wendling
6345d75729 Removed even more std::cerr and #include <iostream> things. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 07:52:03 +00:00
Chris Lattner
280b714cd0 implement a todo: change a map into a vector 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31805 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 01:52:23 +00:00
Chris Lattner
8781466176 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31799 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 00:49:36 +00:00
Chris Lattner
e28a12a3b8 implicit_def_vrrc doesn't generate code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31797 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 23:49:52 +00:00
Evan Cheng
ebf01d63b0 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31795 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 23:33:25 +00:00
Evan Cheng
e23fc60854 Fix a potential bug: MOVPDI2DI, etc. are not copy instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31794 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 23:22:26 +00:00
Jim Laskey
2f616bff7e This is a general clean up of the PowerPC ABI. Address several problems and 
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31792 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 22:43:37 +00:00
Chris Lattner
1b0a2d8370 fix a regression that I introduced. stdu should scale the offset by 4 
before printing it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31791 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 21:45:30 +00:00
Evan Cheng
73b00947e7 Align stubs on 4 byte boundary. This fixes 447.dealII. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31790 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 20:13:34 +00:00
Chris Lattner
cb53595d70 add a statistic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31785 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 18:13:49 +00:00
Chris Lattner
0403862158 fix broken encoding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31778 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 01:01:28 +00:00
Chris Lattner
80df01d2cf add ppc64 r+i stores with update. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31776 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 00:57:19 +00:00
Chris Lattner
74531e49ef add patterns for ppc32 preinc stores. ppc64 next. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31775 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 00:41:37 +00:00
Chris Lattner
ef20fefa65 switch these back to the 'bad old way' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31774 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 00:33:34 +00:00
Chris Lattner
5e797a5b1c Fix ppc64 epilog bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31771 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 23:35:30 +00:00
Chris Lattner
8e28b5c426 Stop using isTwoAddress, switching to operand constraints instead. 
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31770 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 23:24:18 +00:00
Chris Lattner
fa326c709f add a new field needed by the code emitter generator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31768 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 22:55:04 +00:00
Evan Cheng
6ce7dc2a97 Properly transfer kill / dead info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31765 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:58:11 +00:00
Evan Cheng
ddd2a4556a Kill / dead info has been moved to MI's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31764 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:56:39 +00:00
Evan Cheng
ff608a7a69 commuteInstruction should propagate kill / dead info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31763 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:56:03 +00:00
Chris Lattner
0851b4f3ed fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri 
addrmodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31757 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 19:55:13 +00:00
Chris Lattner
b71fd7897f Simplify IntrinsicLowering and clarify that it is only for use by the 
CBE and interpreter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31755 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 18:00:10 +00:00
Chris Lattner
d6842e4e18 Remove unneeded forward decls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31754 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 17:53:13 +00:00
Chris Lattner
5e14b821cd Fix the PPC regressions last night 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 17:40:51 +00:00
Chris Lattner
f8e07f448a Switch loads over to use memri as the operand instead of a reg/imm operand 
pair for cleanliness.  Add instructions for PPC32 preinc-stores with commented
out patterns.  More improvement is needed to enable the patterns, but we're
getting close.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31749 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 02:43:19 +00:00
Evan Cheng
3cdd9f65ed Revert. This wasn't meant to be checked in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31737 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-14 19:20:33 +00:00