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Author SHA1 Message Date
Jim Grosbach
49f2ceddd2 ARM assembly parsing and encoding for UMULL. 
Fix parsing of the 's' suffix for the mnemonic. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136277 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:01:42 +00:00
Devang Patel
0748f83d37 Remove outdated FIXME comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136275 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:00:01 +00:00
Jim Grosbach
71725a099e ARM assembly parsing and encoding for UMLAL. 
Fix parsing of the 's' suffix for the mnemonic. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136274 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:58:11 +00:00
Jim Grosbach
2adba4156b ARM assembly parsing and encoding tests for UMAAL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136272 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:53:42 +00:00
Bill Wendling
91c56a8d8d Refuse to inline two functions which use different personality functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136269 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:44:28 +00:00
Jim Grosbach
f36b0a2ee4 ARM assembly parsing and encoding tests for UHSUB16 and UHSUB8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136267 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:21:59 +00:00
Jim Grosbach
66c8982244 ARM assembly parsing and encoding tests for UHADD16, UHADD8 and UHASX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136266 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:20:45 +00:00
Jim Grosbach
fb8989e640 ARM parsing and encoding of SBFX and UBFX. 
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136264 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:09:25 +00:00
Bill Wendling
c94eefb258 Keep enums stable. Append EH stuff to the end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136263 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:00:28 +00:00
Jim Grosbach
b6854ad2b1 ARM assembly parsing and encoding tests for UADD16, UADD8 and UASX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136261 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:43:44 +00:00
Jim Grosbach
8b3fd56e0f ARM assembly parsing and encoding tests for TST instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136260 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:38:58 +00:00
Jim Grosbach
f1ae78af17 ARM assembly parsing and encoding tests for TEQ instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136259 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:37:36 +00:00
Owen Anderson
06470311c5 Refactor the STRT and STRBT instructions to distinguish between the register-addend and immediate-addend versions. Temporarily XFAIL the asm parsing tests for these instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136255 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:29:48 +00:00
Bill Wendling
772fe17a6d Merge the contents from exception-handling-rewrite to the mainline. 
This adds the new instructions 'landingpad' and 'resume'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136253 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:18:04 +00:00
Jim Grosbach
7e1547ebf7 ARM assembly parsing and encoding for extend instructions. 
Assembly parser handling for extend instruction rotate operands. Add tests
for the sign extend instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136252 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:15:40 +00:00
Nick Lewycky
e511186183 Teach the ConstantMerge pass about alignment. Fixes PR10514! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136250 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 19:47:34 +00:00
Eli Friedman
84e7f7e267 X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any code, and all x86 processors will honor the required semantics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136249 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 19:43:50 +00:00
Eli Friedman
abcd715fdf The numbering of LLVMOpcode is supposed to be stable; revert my earlier change, and append Fence onto the end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136245 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 18:59:19 +00:00
Jakub Staszak
0031b4f74e Add test cases for BlockFrequency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 18:57:40 +00:00
Ted Kremenek
18dceba0bb Add a generic 'capacity_in_bytes' function to allow inspection of memory usage of various data structures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136233 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 18:40:45 +00:00
Jim Grosbach
766c63e78b ARM assembly parsing aliases for extend instructions w/o rotate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136229 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 18:19:32 +00:00
Devang Patel
0a2a306be2 Update document listing DIVariable elements to reflect recent changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136228 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 18:14:50 +00:00
Jim Grosbach
7032741e7b ARM cleanup of remaining extend instructions. 
Refactor the rest of the extend instructions to not artificially distinguish
between a rotate of zero and a rotate of any other value. Replace the by-zero
versions with Pat<>'s for ISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136226 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 17:48:13 +00:00
Jim Grosbach
c5a8c861c9 ARM extend instructions simplification. 
Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not
have an 'r' and an 'r_rot' version, but just a single version with a rotate
that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136225 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 16:47:19 +00:00
Jakub Staszak
ffcc2a542c Optimize 96-bit division a little bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136222 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 16:00:40 +00:00
Jakub Staszak
636a02b57c Move static methods to the anonymous namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136221 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 15:51:51 +00:00
Jakub Staszak
9d9f765519 Edge to itself is backedge as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136219 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 15:42:09 +00:00
Frits van Bommel
a09d514b29 Trim includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136218 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 15:20:06 +00:00
Frits van Bommel
0da49df0b1 Update CMake build for new gtest file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136215 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 10:19:32 +00:00
Jay Foad
c437bd577f Remove some code that is no longer needed now that googletest knows how 
to print STL containers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136213 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 09:26:13 +00:00
Jay Foad
b33f8e3e55 Merge gtest-1.6.0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136212 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 09:25:14 +00:00
Jeffrey Yasskin
a44defeb22 Explicitly cast narrowing conversions inside {}s that will become errors in 
C++0x.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136211 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 06:22:51 +00:00
Dan Gohman
cbdccdeea9 Revert r136156, which broke several buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136206 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 01:10:27 +00:00
Eli Friedman
8a552bb85a Misc mid-level changes for new 'fence' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136205 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 01:08:30 +00:00
Eli Friedman
751bef77d0 Minor simplification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136202 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 01:02:25 +00:00
Bruno Cardoso Lopes
9b4ad12b1e Move some code around to open opportunity for more shuffle matching 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136201 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 00:56:37 +00:00
Bruno Cardoso Lopes
cea34e41fa The vpermilps and vpermilpd have different behaviour regarding the 
usage of the shuffle bitmask. Both work in 128-bit lanes without
crossing, but in the former the mask of the high part is the same
used by the low part while in the later both lanes have independent
masks. Handle this properly and and add support for vpermilpd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136200 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 00:56:34 +00:00
Bruno Cardoso Lopes
cd9e5aed53 Remove more dead code! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136199 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 00:56:27 +00:00
Eli Friedman
6f3ba37ebb Fix AliasSetTracker so that it doesn't make any assumptions about instructions it doesn't know about (like the atomic instructions I'm adding). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136198 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 00:46:46 +00:00
Evan Cheng
bd27f5adbd Support .code32 and .code64 in X86 assembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136197 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 00:38:12 +00:00
Devang Patel
26a92003cd It is quiet possible that inlined function body is split into multiple chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136196 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 00:34:13 +00:00
Eric Christopher
28176195a4 Remove these two directories. The tests can be ported to dragonegg if 
they're still wanted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136193 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 00:07:56 +00:00
Eric Christopher
e927dc654f Remove test/FrontendC, almost all of the tests have been migrated 
to clang now, the rest are in process (6) or have been deleted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136191 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-26 23:49:39 +00:00
Jakob Stoklund Olesen
00005782fa Add support for multi-way live range splitting. 
When splitting global live ranges, it is now possible to split for
multiple destination intervals at once. Previously, we only had the main
and stack intervals.

Each edge bundle is assigned to a split candidate, and splitAroundRegion
will insert copies between the candidate intervals and the stack
interval as needed.

The multi-way splitting is used to split around compact regions when
enabled with -compact-regions. The best candidate register still gets
all the bundles it wants, but everything outside the main interval is
first split around compact regions before we create single-block
intervals.

Compact region splitting still causes some regressions, so it is not
enabled by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136186 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-26 23:41:46 +00:00
Jakob Stoklund Olesen
3b92527885 Print out the MBB live-in registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136178 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-26 23:12:08 +00:00
Jakob Stoklund Olesen
e4709777e3 Eliminate copies of undefined values during coalescing. 
These copies would coalesce easily, but the resulting value would be
defined by a deleted instruction. Now we also remove the undefined value
number from the destination register.

This fixes PR10503.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136174 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-26 23:00:24 +00:00
Benjamin Kramer
25ad783322 Update test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136170 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-26 22:45:39 +00:00
Benjamin Kramer
162ee5c725 Add a neat little two's complement hack for x86. 
On x86 we can't encode an immediate LHS of a sub directly. If the RHS comes from a XOR with a constant we can
fold the negation into the xor and add one to the immediate of the sub. Then we can turn the sub into an add,
which can be commuted and encoded efficiently.

This code is generated for __builtin_clz and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136167 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-26 22:42:13 +00:00
Bruno Cardoso Lopes
4ea496846a Recognize unpckh* masks and match 256-bit versions. The new versions are 
different from the previous 128-bit because they work in lanes.
Update a few comments and add testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136157 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-26 22:03:40 +00:00
Dan Gohman
c680b92460 Delete unnecessarily cautious LastCALLSEQ code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136156 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-26 22:00:59 +00:00