Commit Graph

4324 Commits

Author SHA1 Message Date
NAKAMURA Takumi
4a931eb4c0 llvm/test/CodeGen/X86/legalize-shift-64.ll: Add explicit -mtriple=i686-unknown-unknown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184730 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 13:19:52 +00:00
Andrew Trick
37d002f0a8 Add -mcpu to some unit tests that only fail on certain hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184709 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 09:51:30 +00:00
Andrew Trick
98a9b72e8c Temporarily enable MI-Sched on X86.
Sorry for the unit test churn. I'll try to make the change permanently
next time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184705 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 09:13:20 +00:00
Andrew Trick
f7b5e01636 Fix tail merging to assign the (more) correct BasicBlock when splitting.
This makes it possible to write unit tests that are less susceptible
to minor code motion, particularly copy placement. block-placement.ll
covers this case with -pre-RA-sched=source which will soon be
default. One incorrectly named block is already fixed, but without
this fix, enabling new coalescing and scheduling would cause more
failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184680 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 01:55:01 +00:00
Andrew Trick
0f2eec65fb Add MI-Sched support for x86 macro fusion.
This is an awful implementation of the target hook. But we don't have
abstractions yet for common machine ops, and I don't see any quick way
to make it table-driven.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184664 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-23 09:00:28 +00:00
Michael Liao
72d59c7999 Add '-mcpu=' to prevent breaking on ATOM due to different code schedule
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184591 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-21 20:22:45 +00:00
Andrew Trick
c22e02b1f4 Add missing REQUIRES: asserts in crash.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184576 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-21 18:47:08 +00:00
Michael Liao
2da863984b Fix PR16360
When (srl (anyextend x), c) is folded into (anyextend (srl x, c)), the
high bits are not cleared. Add 'and' to clear off them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184575 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-21 18:45:27 +00:00
Andrew Trick
c12c880998 Update physreg live intervals during remat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184574 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-21 18:33:26 +00:00
David Blaikie
4532c280f5 DebugInfo: don't use location lists when the location covers the whole function anyway
Fix up three tests - one that was relying on abbreviation number,
another relying on a location list in this case (& testing raw asm,
changed that to use dwarfdump on the debug_info now that that's where
the location is), and another which was added in r184368 - exposing a
bug in that fix that is exposed when we emit the location inline rather
than through a location list. Fix that bug while I'm here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184387 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-20 00:25:24 +00:00
Quentin Colombet
a3fb49cd85 During SelectionDAG building explicitly set a node to constant zero when the
value is zero.
This allows optmizations to kick in more easily.
Fix some test cases so that they remain meaningful (i.e., not completely dead
coded) when optimizations apply.

<rdar://problem/14096009> superfluous multiply by high part of zero-extended
value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-18 20:14:39 +00:00
Andrew Trick
ad626132a9 Reenable, improve, and add MI-Sched unit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184134 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-17 21:45:16 +00:00
Benjamin Kramer
4eed756153 Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.
The main advantages here are way better heuristics, taking into account not
just loop depth but also __builtin_expect and other static heuristics and will
eventually learn how to use profile info. Most of the work in this patch is
pushing the MachineBlockFrequencyInfo analysis into the right places.

This is good for a 5% speedup on zlib's deflate (x86_64), there were some very
unfortunate spilling decisions in its hottest loop in longest_match(). Other
benchmarks I tried were mostly neutral.

This changes register allocation in subtle ways, update the tests for it.
2012-02-20-MachineCPBug.ll was deleted as it's very fragile and the instruction
it looked for was gone already (but the FileCheck pattern picked up unrelated
stuff).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184105 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-17 19:00:36 +00:00
David Blaikie
4bb23594f3 DebugInfo: follow up to 184045 to constrain the tests further to ensure they don't contain +0 offsets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184046 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-15 16:02:44 +00:00
David Blaikie
f14b44c71b DebugInfo: print DBG_VALUE MachineInstrs with [] for deref and drop the offset when it's zero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184045 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-15 15:52:58 +00:00
Andrew Trick
b86a0cdb67 Machine Model: Add MicroOpBufferSize and resource BufferSize.
Replace the ill-defined MinLatency and ILPWindow properties with
with straightforward buffer sizes:
MCSchedMode::MicroOpBufferSize
MCProcResourceDesc::BufferSize

These can be used to more precisely model instruction execution if desired.

Disabled some misched tests temporarily. They'll be reenabled in a few commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184032 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-15 04:49:57 +00:00
David Blaikie
702ff96ff3 Debug Info: Don't print the display name and colon prefix for DEBUG_VALUE comments if the display name is empty
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-15 00:33:47 +00:00
Tim Northover
89dbe97442 Mark rematerialized super/sub registers as dead.
When we're rematerializing into a not-quite-right register we already add the
real definition as an imp-def, but we should also be marking the "official"
register as dead, since nothing else is going to use it as a result of this
remat.

Not doing this can affect pressure tracking.

rdar://problem/14158833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184002 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-14 20:22:21 +00:00
Stephen Lin
38103d1012 SelectionDAG: Fix incorrect condition checks in some cases of folding FADD/FMUL combinations; also improve accuracy of comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183993 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-14 18:17:35 +00:00
Derek Schuff
8a0d41e1a6 Make PrologEpilogInserter save/restore all callee saved registers
in functions which call __builtin_unwind_init()

__builtin_unwind_init() is an undocumented gcc intrinsic which has this effect,
and is used in libgcc_eh.

Goes part of the way toward fixing PR8541.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183984 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-14 16:15:29 +00:00
Benjamin Kramer
d25ec760cb X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equivalent.
Give it the right register format so we can also emit it when AVX is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-14 09:31:41 +00:00
Tim Northover
e5609f3732 X86: Stop LEA64_32r doing unspeakable things to its arguments.
Previously LEA64_32r went through virtually the entire backend thinking it was
using 32-bit registers until its blissful illusions were cruelly snatched away
by MCInstLower and 64-bit equivalents were substituted at the last minute.

This patch makes it behave normally, and take 64-bit registers as sources all
the way through. Previous uses (for 32-bit arithmetic) are accommodated via
SUBREG_TO_REG instructions which make the types and classes agree properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183693 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 20:43:49 +00:00
Elena Demikhovsky
40e071c1eb Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183626 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 07:37:10 +00:00
Quentin Colombet
c0cc28301a Reapply r183552. This time, use a standard type for the option to avoid template
instantiation issue with non-standard type.

Add a backend option to warn on a given stack size limit.
Option: -mllvm -warn-stack-size=<limit>
Output (if limit is exceeded):
warning: Stack size limit exceeded (<actual size>) in <functionName>.

The longer term plan is to hook that to a clang warning.
PR:4072
<rdar://problem/13987214>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183595 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 00:07:54 +00:00
Quentin Colombet
95f24fbe4c Revert commits related to stack warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183579 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 22:14:50 +00:00
Quentin Colombet
2e10e8e378 Explicit triple in warn stack size test cases to not depend on OS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183574 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 21:09:42 +00:00
Quentin Colombet
9a6b9bffa5 Add a backend option to warn on a given stack size limit.
Option: -mllvm -warn-stack-size=<limit>
Output (if limit is exceeded):
warning: Stack size limit exceeded (<actual size>) in <functionName>.

The longer term plan is to hook that to a clang warning.
PR:4072
<rdar://problem/13987214>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183552 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 20:18:12 +00:00
Quentin Colombet
fcca6c690c Teach AsmPrinter how to print odd constants.
Fix an assertion when the compiler encounters big constants whose bit width is
not a multiple of 64-bits.
Although clang would never generate something like this, the backend should be
able to handle any legal IR.

<rdar://problem/13363576>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183544 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 18:36:03 +00:00
Rafael Espindola
62ed8d3e35 Support OpenBSD's native frame protection conventions.
OpenBSD's stack smashing protection differs slightly from other
platforms:

  1. The smash handler function is "__stack_smash_handler(const char
     *funcname)" instead of "__stack_chk_fail(void)".

  2. There's a hidden "long __guard_local" object that gets linked
     into each executable and DSO.

Patch by Matthew Dempsky.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183533 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 16:35:57 +00:00
Michael Liao
9a508ef64a [PATCH] Fix VGATHER* operand constraints
Add earlyclobber constaints to prevent input register being allocated as
the output register because, according to Intel spec [1], "If any pair
of the index, mask, or destination registers are the same, this
instruction results a UD fault."

---
[1] http://software.intel.com/sites/default/files/319433-014.pdf



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183327 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 18:12:26 +00:00
Tim Northover
3ba14fab1b Revert r183069: "TMP: LEA64_32r fixing"
Very sorry, it was committed from the wrong branch by mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183070 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 10:23:46 +00:00
Tim Northover
4d3ace4da0 TMP: LEA64_32r fixing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183069 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 10:21:54 +00:00
Tim Northover
85c622d6b6 X86: change MOV64ri64i32 into MOV32ri64
The MOV64ri64i32 instruction required hacky MCInst lowering because it
was allocated as setting a GR64, but the eventual instruction ("movl")
only set a GR32. This converts it into a so-called "MOV32ri64" which
still accepts a (appropriate) 64-bit immediate but defines a GR32.
This is then converted to the full GR64 by a SUBREG_TO_REG operation,
thus keeping everyone happy.

This fixes a typo in the opcode field of the original patch, which
should make the legact JIT work again (& adds test for that problem).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183068 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 09:55:14 +00:00
Eric Christopher
34431085de Temporarily Revert "X86: change MOV64ri64i32 into MOV32ri64" as it
seems to have caused PR16192 and other JIT related failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183059 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 23:30:45 +00:00
Quentin Colombet
5b00f4edcb Modify how the formulae are rated in Loop Strength Reduce.
Namely, check if the target allows to fold more that one register in the
addressing mode and if yes, adjust the cost accordingly.

Prior to this commit, reg1 + scale * reg2 accesses were artificially preferred
to reg1 + reg2 accesses. Indeed, the cost model wrongly assumed that reg1 + reg2
needs a temporary register for the computation, whereas it was correctly
estimated for reg1 + scale * reg2.

<rdar://problem/13973908>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183021 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 17:20:29 +00:00
Tim Northover
43887bf3e6 X86: change MOV64ri64i32 into MOV32ri64
The MOV64ri64i32 instruction required hacky MCInst lowering because it was
allocated as setting a GR64, but the eventual instruction ("movl") only set a
GR32. This converts it into a so-called "MOV32ri64" which still accepts a
(appropriate) 64-bit immediate but defines a GR32. This is then converted to
the full GR64 by a SUBREG_TO_REG operation, thus keeping everyone happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 09:57:13 +00:00
Benjamin Kramer
3a36cb0805 Force a triple so we don't get bitten by windows' different regalloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182935 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-30 15:39:35 +00:00
Benjamin Kramer
051ed0ae2d Force fragile test to the atom scheduler model.
The pattern the test originally checked for doesn't occur on other -mcpu
settings. On atom it's still there though slightly differently scheduled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-30 15:22:28 +00:00
Tim Northover
5b1552548a X86: allow registers 8-15 in test
This test was failing on some hosts when an unexpected register was used for a
variable. This just extends the regexp to allow the new x86-64 registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-30 13:56:32 +00:00
Tim Northover
15983b80a0 X86: use sub-register sequences for MOV*r0 operations
Instead of having a bunch of separate MOV8r0, MOV16r0, ... pseudo-instructions,
it's better to use a single MOV32r0 (which will expand to "xorl %reg, %reg")
and obtain other sizes with EXTRACT_SUBREG and SUBREG_TO_REG. The encoding is
smaller and partial register updates can sometimes be avoided.

Until recently, this sequence was a barrier to rematerialization though. That
should now be fixed so it's an appropriate time to make the change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-30 13:19:42 +00:00
Bill Wendling
8a65e11c9f This testcase tests command line attributes which we don't yet support.
In fact, we're probably going to support these flags in completely different
ways. So this test is no longer valid.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182899 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-30 00:32:04 +00:00
Andrew Trick
6e0b2a0cb0 Order CALLSEQ_START and CALLSEQ_END nodes.
Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.

Patch by Xiaoyi Guo!

This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182885 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-29 22:03:55 +00:00
Preston Gurd
b704d23062 Convert sqrt functions into sqrt instructions when -ffast-math is in effect.
When -ffast-math is in effect (on Linux, at least), clang defines
__FINITE_MATH_ONLY__ > 0 when including <math.h>. This causes the
preprocessor to include <bits/math-finite.h>, which renames the sqrt functions.
For instance, "sqrt" is renamed as "__sqrt_finite". 

This patch adds the 3 new names in such a way that they will be treated
as equivalent to their respective original names.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182739 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-27 15:44:35 +00:00
Rafael Espindola
f594e41ae9 Add a cpu to try to bring back the atom bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182734 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-27 13:22:52 +00:00
Andrew Trick
9edb37feb5 Fix PR16143: Insert DEBUG_VALUE before terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182717 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-26 08:58:50 +00:00
Andrew Trick
81349a7435 Track IR ordering of SelectionDAG nodes 4/4.
Unit test cases for -pre-RA-sched=source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182706 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 03:26:51 +00:00
Andrew Trick
dd0fb018a7 Track IR ordering of SelectionDAG nodes 3/4.
Remove the old IR ordering mechanism and switch to new one.  Fix unit
test failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182704 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 03:08:10 +00:00
Diego Novillo
77226a03dc Add a new function attribute 'cold' to functions.
Other than recognizing the attribute, the patch does little else.
It changes the branch probability analyzer so that edges into
blocks postdominated by a cold function are given low weight.

Added analysis and code generation tests.  Added documentation for the
new attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182638 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 12:26:52 +00:00
Nick Lewycky
fa03ff99b2 Add missing test from r175092.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-23 07:46:13 +00:00
Nadav Rotem
23d1d5eb56 X86: Fix a bug in EltsFromConsecutiveLoads. We can't generate new loads without chains.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182507 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 19:28:41 +00:00