Cameron Esfahani
4af1eaee70
Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 22:35:21 +00:00
Rafael Espindola
59ff3c9134
Avoid some Mach-O specific alignment being done on ELF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114594 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 22:27:05 +00:00
Rafael Espindola
1963572f9d
Correctly align bss.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 17:43:04 +00:00
Mikhail Glushenkov
3724945025
llvmc: Support '-emit-llvm -S' with -opt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 09:00:41 +00:00
Chris Lattner
2c5291b563
fix rdar://8456371 - Handle commutable instructions written backward.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114536 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 06:26:39 +00:00
Chris Lattner
1eb1b68e3a
Fix an inconsistency in the x86 backend that led it to reject "calll foo" on
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x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly
named "callq", so this only impacted x86-32.
This fixes rdar://8456370 - llvm-mc rejects 'calll'
This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 05:49:14 +00:00
Chris Lattner
bc57c6db4a
fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"
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Teaching the code generator about CR8-15, how to rex them up, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114533 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 05:29:50 +00:00
Chris Lattner
f7d4da0c1d
fix rdar://8456417 - llvm-mc can't do basic math
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114532 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 05:05:16 +00:00
Chris Lattner
c2b942acf6
add the missing aliases for fp stack cmovs, rdar://8456391
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:56:20 +00:00
Chris Lattner
f93b90c5df
reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:39:11 +00:00
Chris Lattner
33d60d5e56
Fix rdar://8456364 - llvm-mc rejects '%CS'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114528 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:11:10 +00:00
Chris Lattner
0c289c140e
fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'
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-This line, and those below, will be ignored--
M test/MC/AsmParser/X86/x86_instructions.s
M lib/Target/X86/AsmParser/X86AsmParser.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:04:03 +00:00
Chris Lattner
61129252e4
fix rdar://8456361 - llvm-mc rejects 'rep movsd'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114526 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 03:50:32 +00:00
Chris Lattner
40d66052f4
linux has a different stack alignment than the mac, relax this a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 00:46:26 +00:00
Chris Lattner
8864155a35
give VZEXT_LOAD a memory operand, it now works with segment registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 00:34:38 +00:00
Chris Lattner
0b79cfee15
revert r114386 now that address modes work correctly, we get a nice
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call through gs-relative memory now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 00:11:31 +00:00
Chris Lattner
93c4a5bef7
give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 23:59:42 +00:00
Chris Lattner
b72d53d8ef
filecheckize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 23:57:27 +00:00
Evan Cheng
691e64a54c
OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 23:49:07 +00:00
Owen Anderson
8614167572
Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes
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irrelevant, but add a new test for the new, improved functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114494 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 22:51:46 +00:00
Devang Patel
161f0caaf9
Use FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114475 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:50:32 +00:00
Owen Anderson
c004eec71b
When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
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(sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.
This fixes <rdar://problem/8449754>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 18:41:19 +00:00
Mikhail Glushenkov
46aa524f0d
llvmc: Allow multiple output languages.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 14:59:42 +00:00
Chris Lattner
08bad54baf
fix rdar://8453210, a crash handling a call through a GS relative load.
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For now, just disable folding the load into the call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 03:37:00 +00:00
Rafael Espindola
f7c10a3cff
Implement support for .local and its "interesting" interactions with .comm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114382 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 00:24:38 +00:00
Evan Cheng
44be1a8d66
Enable machine sinking critical edge splitting. e.g.
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define double @foo(double %x, double %y, i1 %c) nounwind {
%a = fdiv double %x, 3.2
%z = select i1 %c, double %a, double %y
ret double %z
}
Was:
_foo:
divsd LCPI0_0(%rip), %xmm0
testb $1, %dil
jne LBB0_2
movaps %xmm1, %xmm0
LBB0_2:
ret
Now:
_foo:
testb $1, %dil
je LBB0_2
divsd LCPI0_0(%rip), %xmm0
ret
LBB0_2:
movaps %xmm1, %xmm0
ret
This avoids the divsd when early exit is taken.
rdar://8454886
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 22:52:00 +00:00
Owen Anderson
765fd9c62d
CombinerAA is now reordering these stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114354 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 20:56:29 +00:00
Owen Anderson
4a9f150926
When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
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CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.
This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 20:39:59 +00:00
Jim Grosbach
1dc335a79f
Simplify ARM callee-saved register handling by removing the distinction
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between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.
For example, previously we would generate code like:
push {r4, r5, r6, r7, lr}
add r7, sp, #12
stmdb sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
push {r4, r5, r6, r7, r8, r10, r11, lr}
add r7, sp, #12
rdar://8445635
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114340 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 19:32:20 +00:00
Rafael Espindola
43779dcfef
Produce a R_X86_64_32 when the value is >=0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114339 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 19:20:47 +00:00
NAKAMURA Takumi
e6af80d11d
test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen.
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r114297 raises 3 failures. They might fail also on mingw.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-19 21:58:55 +00:00
Eric Christopher
50880d08ec
Add the exit instruction to the PTX target.
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Patch by Che-Liang Chiou <clchiou@gmail.com>!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18 18:52:28 +00:00
Rafael Espindola
ad49cf5866
Make sure the STT_FILE symbol is the first one in the symbol table.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18 15:03:21 +00:00
Owen Anderson
14ac1dd2be
Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is
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NO path to the destination containing side effects, not that SOME path contains no side effects.
In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18 04:45:14 +00:00
Rafael Espindola
d3dce16ffe
Add test that was missing in my previous commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114248 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18 00:37:27 +00:00
Dan Gohman
23110b3c16
Attempt to XFAIL this test on arm-linux, which is inexplicably failing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18 00:04:37 +00:00
Benjamin Kramer
92aa1f7123
Fix vmov.f64 disassembly on targets where sizeof(long) != 8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 23:48:07 +00:00
Bob Wilson
75f0288b7d
Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64
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value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert. Radar 8407927.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 22:59:05 +00:00
Jim Grosbach
e6be85e9ff
Teach the (non-MC) instruction printer to use the cannonical names for push/pop,
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and shift instructions on ARM. Update the tests to match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114230 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 22:36:38 +00:00
Evan Cheng
6edb0eac87
Teach machine sink to
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1) Do forward copy propagation. This makes it easier to estimate the cost of the
instruction being sunk.
2) Break critical edges on demand, including cases where the value is used by
PHI nodes.
Critical edge splitting is not yet enabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 22:28:18 +00:00
Jim Grosbach
9ce75625eb
Update tests to handle MC-inst instruction printing of shift operations. The
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legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3 ", while
the MC-instruction printer uses the form "lsl r0, r0, #3 ". The latter mnemonic
is correct and preferred according the ARM documentation (A8.6.98). The former
are pseudo-instructions for the latter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114221 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 21:58:46 +00:00
Jim Grosbach
db664ad71e
FileCheck-ize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114218 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 21:46:16 +00:00
Jim Grosbach
1aaf4cb393
Move thumb2 tests to the thumb2 directory
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:34:09 +00:00
Jim Grosbach
c0911c3b3e
tweak test to check instructions rather than relying on the comment string
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:27:26 +00:00
Dan Gohman
4e51a12ed7
Fix this test to avoid an "inexact" fold.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114202 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:25:43 +00:00
Dan Gohman
d8c0a51362
Avoid emitting a PIC base register if no PIC addresses are needed.
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This fixes rdar://8396318.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:24:24 +00:00
Jim Grosbach
d4ef24344a
tweak test to check instructions rather than relying on the comment string
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114200 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:21:03 +00:00
Jim Grosbach
48afc24274
tweak test to check instructions rather than relying on the comment string
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:17:41 +00:00
Dan Gohman
80d6c96c2a
Fix this test so that folding doesn't depend on a potentially
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"inexact" result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114198 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:15:53 +00:00
Chris Lattner
40cc3f8783
fix rdar://8444631 - encoder crash on 'enter'
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What a weird instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114190 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 18:02:29 +00:00