Commit Graph

18935 Commits

Author SHA1 Message Date
Sriram Murali
4d91232df1 test commit
- fix comments on vector type legalization



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192389 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 20:24:53 +00:00
Matt Arsenault
89dedc1b65 Fix grammar / missing words
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192380 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 18:47:35 +00:00
Manman Ren
b8e48a636e Debug Info: In DIBuilder, the context field of subprogram is updated to use
DIScopeRef.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 18:40:01 +00:00
Hao Liu
6a5a667517 Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:00:52 +00:00
Rafael Espindola
812ddcc50f Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)."
This reverts commit r192352. It broke the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 15:15:17 +00:00
Hao Liu
d622bef31d Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 15:01:24 +00:00
Rui Ueyama
6bba6bb12f Revert "llvm-c: Make target initializer functions external functions in lib."
This reverts commit r192316. The original change introduced circular
dependencies between libTarget and backends. That would broke a build unless
link everything into one big binary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192329 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 23:15:49 +00:00
Manman Ren
b4d9c11f6c Debug Info: In DIBuilder, the context and type fields of template_type and
template_value are updated to use DIRef.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192320 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 19:46:28 +00:00
Anders Waldenborg
9360e64e60 llvm-c: Make target initializer functions external functions in lib.
Making them proper functions defined in the (shared)lib instead of
static inlines defined in the header files makes it possible to
actually distribute a binary compiled against the shared library
without having to worry about getting undefined symbol errors when
calling e.g LLVMInitializeAllTargetInfos because the shared library on
the other system was compiled with different targets.

Differential Revision: http://llvm-reviews.chandlerc.com/D1714



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192316 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 19:02:09 +00:00
Benjamin Kramer
3353c592de Flip the ownership of MCStreamer and MCTargetStreamer.
MCStreamer now owns the target streamer. This prevents leaking the target
streamer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192303 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 17:23:41 +00:00
Rafael Espindola
1a525e8c80 Add a GlobalAlias::isValidLinkage to reduce code duplication.
Thanks to Reid Kleckner for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192298 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 16:07:32 +00:00
Elena Demikhovsky
50dc2ad46c AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192283 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 08:16:14 +00:00
Chad Rosier
c976500793 [AArch64] Add support for NEON scalar floating-point reciprocal estimate,
reciprocal exponent, and reciprocal square root estimate instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192242 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 22:09:04 +00:00
Matt Arsenault
25180dc319 Fix duplicated assertions.
Do what some other instructions do, and add an assert method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192236 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 21:11:12 +00:00
Chad Rosier
3dfe644f7b [AArch64] Add support for NEON scalar signed/unsigned integer to floating-point
convert instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192231 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 20:43:30 +00:00
Reid Kleckner
73f615b0bd Explicitly request unsigned enum types when desired
This fixes repeated -Wmicrosoft warnings when self-hosting clang on
Windows, and gets us real unsigned enum types with MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192227 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 20:15:11 +00:00
Manman Ren
d88ccb6480 Move DIRef::getName out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192214 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 18:42:03 +00:00
Benjamin Kramer
e3c2f07005 IRBuilder: Downgrade InsertPointGuard's instruction pointer to a raw pointer.
Sadly this loses the checking from AssertingVH, but apparently storing the
end() of a BasicBlock into an AssertingVH has bad consequences as it's not
really an instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192209 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 17:44:56 +00:00
Rafael Espindola
320296a4cf Add a MCTargetStreamer interface.
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 13:08:17 +00:00
Nick Kledzik
0d94d8f9f1 update mach-o EXPORT_SYMBOL_* names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192151 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 00:59:13 +00:00
Richard Mitton
379f76e873 Formally added an explicit enum for DWARF TLS support. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 18:39:18 +00:00
Matt Arsenault
c4a8c07f64 Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192117 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 18:06:48 +00:00
Rafael Espindola
d0acc84b2b Remove dead code.
Support for exception handling in the legacy JIT was removed in r181354 and
this code was dead since then.

Thanks to Yaron Keren for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192101 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 13:54:50 +00:00
Rafael Espindola
c697f8b288 Fix the documentation of getDefaultSubtargetFeatures.
Patch by David Nadlinger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 13:34:05 +00:00
David Majnemer
6a971bb8f5 Revert "Revert "Windows: Add support for unicode command lines""
This reverts commit r192070 which reverted r192069, I forgot to
regenerate the configure scripts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192079 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 01:00:07 +00:00
David Majnemer
b262556c45 Revert "Windows: Add support for unicode command lines"
This is causing MinGW bots to fail.
This reverts commit r192069.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192070 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 20:44:34 +00:00
David Majnemer
5a1a1856a4 Windows: Add support for unicode command lines
Summary:
The MSVCRT deliberately sends main() code-page specific characters.
This isn't too useful to LLVM as we end up converting the arguments to
UTF-16 and subsequently attempt to use the result as, for example, a
file name.  Instead, we need to have the ability to access the Unicode
command line and transform it to UTF-8.

This has the distinct advantage over using the MSVC-specific wmain()
function as our entry point because:
 - It doesn't work on cygwin.
 - It only work on MinGW with caveats and only then on certain versions.
 - We get to keep our entry point as main(). :)

N.B.  This patch includes fixes to other parts of lib/Support/Windows
s.t. we would be able to take advantage of getting the Unicode paths.
E.G.  clang spawning clang -cc1 would want to give it Unicode arguments.

Reviewers: aaron.ballman, Bigcheese, rnk, ruiu

Reviewed By: rnk

CC: llvm-commits, ygao

Differential Revision: http://llvm-reviews.chandlerc.com/D1834

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192069 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 20:25:49 +00:00
Elena Demikhovsky
714319a169 AVX-512: added scalar convert instructions and intrinsics.
Fixed load folding in VPERM2I instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192063 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 13:11:09 +00:00
Simon Atanasyan
26ba5df2eb [Mips] Add MIPS program header types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192059 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 08:49:41 +00:00
Craig Topper
22abf7e17f Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192039 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 19:22:59 +00:00
Rafael Espindola
5e195a4c8d Remove some really nasty uses of hasRawTextSupport.
When MC was first added, targets could use hasRawTextSupport to keep features
working before they were added to the MC interface.

The design goal of MC is to provide an uniform api for printing assembly and
object files. Short of relaxations and other corner cases, a object file is
just another representation of the assembly.

It was never the intention that targets would keep doing things like

if (hasRawTextSupport())
  Set flags in one way.
else
  Set flags in another way.

When they do that they create two code paths and the object file is no longer
just another representation of the assembly. This also then requires testing
with llc -filetype=obj, which is extremelly brittle.

This patch removes some of these hacks by replacing them with smaller ones.
The ARM flag setting is trivial, so I just moved it to the constructor. For
Mips, the patch adds two temporary hack directives that allow the assembly
to represent the same things as the object file was already able to.

The hope is that the mips developers will replace the hack directives with
the same ones that gas uses and drop the -print-hack-directives flag.

I will also try to implement a target streamer interface, so that we can
move this out of the common code.

In summary, for any new work, two rules of the thumb are
  * Don't use "llc -filetype=obj" in tests.
  * Don't add calls to hasRawTextSupport.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192035 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 16:42:21 +00:00
Jiangning Liu
beb6afa843 Implement aarch64 neon instruction set AdvSIMD (Across).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192028 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 08:22:10 +00:00
Craig Topper
936910d929 Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 05:38:16 +00:00
Manman Ren
c664d76716 Debug Info: In DIBuilder, the derived-from field of a DW_TAG_pointer_type
is updated to use DITypeRef.

Move isUnsignedDIType and getOriginalTypeSize from DebugInfo.h to be static
helper functions in DwarfCompileUnit. We already have a static helper function
"isTypeSigned" in DwarfCompileUnit, and a pointer to DwarfDebug is added to
resolve the derived-from field. All three functions need to go across link
for derived-from fields, so we need to get hold of a type identifier map.

A pointer to DwarfDebug is also added to DbgVariable in order to resolve the
derived-from field.

Debug info verifier is updated to check a derived-from field is a TypeRef.
Verifier will not go across link for derived-from fields, in debug info finder,
we go across the link to add derived-from fields to types.

Function getDICompositeType is only used by dragonegg and since dragonegg does
not generate identifier for types, we use an empty map to resolve the
derived-from field.

When printing a derived-from field, we use DITypeRef::getName to either return
the type identifier or getName of the DIType.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192018 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 01:43:03 +00:00
Eric Christopher
164793918c Pull this out for a bit of readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:35:30 +00:00
Eric Christopher
f2fff255de Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191997 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:15:52 +00:00
Eric Christopher
fc75310230 Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191995 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:06:14 +00:00
Jack Carter
6d389f5eba reverting per request
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191992 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 22:52:31 +00:00
Jack Carter
8e48edcf3d [MC][AsmParser] Hook for post assembly file processing
This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file
directive processing.

Mips assembly requires processing inline directives that directly and
indirectly affect the output ELF header flags. This patch handles one
".abicalls".

To process these directives we are following the model the code generator
uses by storing state in a container as we go through processing and when
we detect the end of input file processing, AsmParser is notified and we
update the ELF header flags through a MipsELFStreamer method with a call from
MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer).

This patch will allow other targets the same functionality.

Jack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191982 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 21:26:15 +00:00
Eric Christopher
3f045005bf Temporarily revert r191792 as it is causing some LTO debug failures
on platforms with relocations in debug info and also temporarily
revert r191800 due to conflicts with the revert of r191792.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 17:08:38 +00:00
Craig Topper
596cfd045f Revert r191940 to see if it fixes the build bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 05:52:17 +00:00
Craig Topper
d356295678 Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 05:22:20 +00:00
Andrew Kaylor
b868e9101c Adding support and tests for multiple module handling in lli
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191938 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 00:49:38 +00:00
Matt Arsenault
cee51c4803 Rename DataLayout variables TD -> DL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 19:50:01 +00:00
Rafael Espindola
438900938c Optimize linkonce_odr unnamed_addr functions during LTO.
Generalize the API so we can distinguish symbols that are needed just for a DSO
symbol table from those that are used from some native .o.

The symbols that are only wanted for the dso symbol table can be dropped if
llvm can prove every other dso has a copy (linkonce_odr) and the address is not
important (unnamed_addr).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191922 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 18:29:09 +00:00
Craig Topper
fafe4bbd6c Add patterns for selecting TBM instructions from logical operations. Patch from Yunzhong Gao.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191871 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 04:16:45 +00:00
Pete Cooper
da750239bd Add v4f16 to supported value types.
This is useful for some ARM intrinsics such as VCVTN which does a <4 x float> <-> <4 x half> conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 03:29:21 +00:00
Quentin Colombet
797f06e19b [llvm-c][Disassembler] Add an option to print latency information in
disassembled output alongside the instructions.
E.g., on a vector shuffle operation with a memory operand, disassembled
outputs are:
* Without the option:
    vpshufd $-0x79, (%rsp), %xmm0
    
* With the option:
    vpshufd $-0x79, (%rsp), %xmm0   ## Latency: 5

The printed latency is extracted from the schedule model available in the
disassembler context. Thus, this option has no effect if there is not a
scheduling model for the target.
This boils down to one may need to specify the CPU string, so that this
option could have an effect.

Note: Latency < 2 are not printed.

This part of <rdar://problem/14687488>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-02 22:07:57 +00:00
Chandler Carruth
dd5d86d992 Remove the very substantial, largely unmaintained legacy PGO
infrastructure.

This was essentially work toward PGO based on a design that had several
flaws, partially dating from a time when LLVM had a different
architecture, and with an effort to modernize it abandoned without being
completed. Since then, it has bitrotted for several years further. The
result is nearly unusable, and isn't helping any of the modern PGO
efforts. Instead, it is getting in the way, adding confusion about PGO
in LLVM and distracting everyone with maintenance on essentially dead
code. Removing it paves the way for modern efforts around PGO.

Among other effects, this removes the last of the runtime libraries from
LLVM. Those are being developed in the separate 'compiler-rt' project
now, with somewhat different licensing specifically more approriate for
runtimes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191835 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-02 15:42:23 +00:00
Rafael Espindola
0e95b3aba9 Fix option parsing in the gold plugin.
This was broken when options were moved up in r191680. No test because this is
specific LLVMgold.so/libLTO.so.

Patch by Tom Roeder!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191829 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-02 14:36:23 +00:00