Commit Graph

179 Commits

Author SHA1 Message Date
Chad Rosier
e112453fc3 [ms-inline asm] Add support for numeric displacement expressions in bracketed
memory operands.

Essentially, this layers an infix calculator on top of the parsing state
machine.  The scale on the index register is still expected to be an immediate

 __asm mov eax, [eax + ebx*4]

and will not work with more complex expressions.  For example,

 __asm mov eax, [eax + ebx*(2*2)]

The plus and minus binary operators assume the numeric value of a register is
zero so as to not change the displacement.  Register operands should never
be an operand for a multiply or divide operation; the scale*indexreg
expression is always replaced with a zero on the operand stack to prevent
such a case.
rdar://13521380


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178881 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 16:28:55 +00:00
Michael Liao
c26392aa5d Add support of RDSEED defined in AVX2 extension
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28 23:41:26 +00:00
Rafael Espindola
30509ee8a3 Move test since it depends on the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28 17:01:28 +00:00
Chad Rosier
dd40e8cd54 [ms-inline asm] Add support of imm displacement before bracketed memory
expression.  Specifically, this syntax:

 ImmDisp [ BaseReg + Scale*IndexReg + Disp ] 

We don't currently support:

 ImmDisp [ Symbol ]

rdar://13518671


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27 21:49:56 +00:00
Dave Zarzycki
9b3939983f x86 -- add the XTEST instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-25 18:59:43 +00:00
Craig Topper
8ee1c1cfaf Post process ADC/SBB and use a shorter encoding if they use a sign extended immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177243 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-18 03:34:55 +00:00
Craig Topper
4bef961baf Refactor some duplicated code into helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177242 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-18 02:53:34 +00:00
Craig Topper
9d3f3c5f40 Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit set. The VEX.B was being calculated from the wrong operand. Fixes at least some portion of PR14185.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14 07:40:52 +00:00
Eli Bendersky
1ab326310c Fixes a test by replacing .align by .p2align and setting triples explicitly.
Patch by David Sehr



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176502 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 18:56:14 +00:00
David Sehr
81ee0f7368 Add a test that .align directives on capable processors use long NOPs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176490 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 16:46:54 +00:00
David Sehr
6c4265a541 The current X86 NOP padding uses one long NOP followed by the remainder in
one-byte NOPs.  If the processor actually executes those NOPs, as it sometimes
does with aligned bundling, this can have a performance impact.  From my
micro-benchmarks run on my one machine, a 15-byte NOP followed by twelve
one-byte NOPs is about 20% worse than a 15 followed by a 12.  This patch
changes NOP emission to emit as many 15-byte (the maximum) as possible followed
by at most one shorter NOP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176464 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 00:02:23 +00:00
Chad Rosier
dca83187b7 [ms-inline asm] Add support for the pushad/popad mnemonics.
rdar://13254235

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176036 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 19:06:27 +00:00
Matt Beaumont-Gay
50e75bfc29 'Hexadecimal' has two 'a's and only one 'i'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 18:11:18 +00:00
Rafael Espindola
e186d7191c Revert r15266. This fixes llvm.org/pr15266.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175173 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:23:08 +00:00
Chad Rosier
8915e27704 [ms-inline asm] Add support for lexing binary integers with a [bB] suffix.
This is complicated by backward labels (e.g., 0b can be both a backward label
and a binary zero).  The current implementation assumes [0-9]b is always a
label and thus it's possible for 0b and 1b to not be interpreted correctly for
ms-style inline assembly.  However, this is relatively simple to fix in the
inline assembly (i.e., drop the [bB]).

This patch also limits backward labels to [0-9]b, so that only 0b and 1b are
ambiguous.
Part of rdar://12470373


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 18:29:02 +00:00
Chad Rosier
d556fd1290 [ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.
Part of rdar://12470373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 01:00:01 +00:00
Derek Schuff
f918d7fd73 [MC] Bundle alignment: Invalidate relaxed fragments
Currently, when a fragment is relaxed, its size is modified, but its
offset is not (it gets laid out as a side effect of checking whether
it needs relaxation), then all subsequent fragments are invalidated
because their offsets need to change. When bundling is enabled,
relaxed fragments need to get laid out again, because the increase in
size may push it over a bundle boundary. So instead of only
invalidating subsequent fragments, also invalidate the fragment that
gets relaxed, which causes it to get laid out again.

This patch also fixes some trailing whitespace and fixes the
bundling-related debug output of MCFragments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174401 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:55:27 +00:00
Derek Schuff
b11917c1aa [MC] bundle alignment: prevent padding instructions from crossing bundle boundaries
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174067 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31 17:00:03 +00:00
Craig Topper
e6482fabd2 Merge SSE and AVX shuffle instructions in the comment printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173777 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-29 07:54:31 +00:00
Craig Topper
467016e58d Fix 256-bit PALIGNR comment decoding to understand that it works on independent 256-bit lanes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173674 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-28 07:41:18 +00:00
Benjamin Kramer
200b306f20 X86: Decode PALIGN operands so I don't have to do it in my head.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173572 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-26 13:31:37 +00:00
Eli Bendersky
767295f114 Now that llvm-dwarfdump supports flags to specify which DWARF section to dump,
use them in tests that run llvm-dwarfdump. This is in order to make tests as
specific as possible.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173498 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-25 21:44:53 +00:00
Eli Bendersky
aaf483ff17 Add forgotten test case for the x32 commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 18:52:39 +00:00
Benjamin Kramer
341c5fbe84 X86: Make sure we account for the FMA4 register immediate value, otherwise rip-rel relocations will be off by one byte.
PR15040.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 18:05:59 +00:00
Chad Rosier
dd2e895022 [ms-inline asm] Extend support for parsing Intel bracketed memory operands that
have an arbitrary ordering of the base register, index register and displacement.
rdar://12527141


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172484 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-14 22:31:35 +00:00
Eli Bendersky
59d152197d Add some additional tests for the .bundle_lock align_to_end feature that didn't
make into the last commit.

Also, update the test-generation script to generate an exhaustive test for
align_to_end as well, and include the generated test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171811 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07 23:12:59 +00:00
Eli Bendersky
6c1d4972cf Add the align_to_end option to .bundle_lock in the MC implementation of aligned
bundling. The document describing this feature and the implementation has also
been updated:

https://sites.google.com/a/chromium.org/dev/nativeclient/pnacl/aligned-bundling-support-in-llvm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171797 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07 21:51:08 +00:00
Craig Topper
f564a9389d Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior.
cvtsi2* should parse with an 'l' or 'q' suffix or no suffix at all. No suffix should be treated the same as 'l' suffix. Printing should always print a suffix. Previously we didn't parse or print an 'l' suffix.
cvtt*2si/cvt*2si should parse with an 'l' or 'q' suffix or not suffix at all. No suffix should use the destination register size to choose encoding. Printing should not print a suffix.

Original 'l' suffix issue with cvtsi2* pointed out by Michael Kuperstein.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171668 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-06 20:39:29 +00:00
Kevin Enderby
5bf3a28b36 Adds missing aliases for fcom and fcomp instructions without arguments.
Patch by Michael M Kuperstein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171414 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 21:20:15 +00:00
Eli Bendersky
15019a8814 Change Lit error redirection to FileCheck to a more common syntax since it
can potentially cause some bots to fail.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170726 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 19:54:02 +00:00
Eli Bendersky
b17201f1b8 Add a largish auto-generated test for the aligned bundling feature, along with
the script generating it. The test should never be modified manually. If anyone
needs to change it, please change the script and re-run it.

The script is placed into utils/testgen - I couldn't think of a better place,
and after some discussion on IRC this looked like a logical location.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170720 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 19:16:57 +00:00
Eli Bendersky
16996c4940 Tests for the aligned bundling support added in r170718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170719 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 19:07:30 +00:00
Eli Bendersky
25953bfb07 Make this Lit config file a bit slimmer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 02:03:46 +00:00
Jim Grosbach
3ca6382120 X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.
When an instruction as written requires 32-bit mode and we're assembling
in 64-bit mode, or vice-versa, issue a more specific diagnostic about
what's wrong.

rdar://12700702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167937 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 18:04:47 +00:00
Michael Liao
be02a90de1 Add support of RTM from TSX extension
- Add RTM code generation support throught 3 X86 intrinsics:
  xbegin()/xend() to start/end a transaction region, and xabort() to abort a
  tranaction region



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08 07:28:54 +00:00
Chad Rosier
2fbc239e4f [ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] is
equivalent to [expr1 + expr2].  See test cases for more examples.
rdar://12470392

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166949 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29 18:01:54 +00:00
Chad Rosier
d95666c226 Tell llvm-mc we're using intel syntax, so we don't have to use directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166640 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24 23:34:38 +00:00
Chad Rosier
b3009eec47 [ms-inline asm] Add back-end test case for r166632. Make sure we emit the
correct .s output as well as get the correct encoding by the integrated
assembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166638 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24 23:10:28 +00:00
Benjamin Kramer
08b6b81ec5 X86: Depending on the local semantics of .align this test can also emit a nopl instead of nopw.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-13 17:38:00 +00:00
Benjamin Kramer
126afcbf65 X86: Disable long nops for all cpus prior to pentiumpro/i686.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-13 17:28:35 +00:00
NAKAMURA Takumi
2811ae66a8 llvm/test/MC/X86/x86_nop.s: Make sure -arch=x86 when -mcpu=geode.
-mcpu doesn't infer -arch. Consider non-x86 host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164185 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 00:56:20 +00:00
Roman Divacky
36b07f2f07 Add test for r164132.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18 16:19:10 +00:00
Chad Rosier
2cfe90b119 Add newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163565 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10 23:09:27 +00:00
Chad Rosier
3c4ecd7dab [ms-inline asm] Add support for .att_syntax directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163542 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10 20:54:39 +00:00
Jim Grosbach
9765c6ecde X86: Fix encoding of 'movd %xmm0, %rax'
The assembly string for the VMOVPQIto64rr instruction incorrectly lacked the 'v'
prefix, resulting in mis-assembly of the vanilla movd instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162963 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31 00:30:30 +00:00
Craig Topper
7f76cb6666 Make l/q suffixes on AVX forms of scalar convert instructions consistent with their non-AVX forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160775 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-26 07:48:28 +00:00
Craig Topper
75dc33a60b Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-18 04:11:12 +00:00
Craig Topper
97a0c6bc91 Reverse assembler/disassembler operand order for gather instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159983 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-10 06:38:33 +00:00
Craig Topper
a101014026 Add aliases for pblendvb, blendvpd, and blendvps instructions with the implicit xmm0 operand specified. Fixes PR13252.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159644 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-03 05:49:45 +00:00
Manman Ren
40307c7dbe X86: add more GATHER intrinsics in LLVM
Corrected type for index of llvm.x86.avx2.gather.d.pd.256
  from 256-bit to 128-bit.
Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256
  from 256-bit to 128-bit.

Support the following intrinsics:
  llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q
  llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256
  llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d
  llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159402 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29 00:54:20 +00:00