Commit Graph

104102 Commits

Author SHA1 Message Date
Alexey Samsonov
50adf38080 Don't pre-populate the set of keys in the map with variable locations history.
Current implementation of calculateDbgValueHistory already creates the
keys in the expected order (user variables are listed in order of appearance),
and should do so later by contract.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209690 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 22:35:00 +00:00
Arnaud A. de Grandmaison
08f32401a9 No need for those tests to go thru llvm-as and/or llvm-dis.
opt can handle them by itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209689 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 22:03:28 +00:00
Arnaud A. de Grandmaison
d4ffb93bf7 Factor out comparison of Instruction "special" states.
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209688 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 21:35:46 +00:00
Reid Kleckner
54ba0dfb55 Wording fix for llvm.global_dtors docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209687 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 21:35:17 +00:00
David Blaikie
6343f5cfef DebugInfo: partially revert cleanup committed in r209680
I'm not sure exactly where/how we end up with an abstract DbgVariable
with a null DIE, but we do... looking into it & will add a test and/or
fix when I figure it out.

Currently shows up in selfhost or compiler-rt builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209683 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 20:20:43 +00:00
David Blaikie
502ffc7e2d DebugInfo: Simplify solution to avoid DW_AT_artificial on inlined parameters.
Originally committed in r207717, I clearly didn't look very closely at
the code to understand how existing things were working...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209680 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 19:34:32 +00:00
Sasa Stankovic
95ce098219 [mips] Optimize long branch for MIPS64 by removing %higher and %highest.
%higher and %highest can have non-zero values only for offsets greater
than 2GB, which is highly unlikely, if not impossible when compiling a
single function. This makes long branch for MIPS64 3 instructions smaller.

Differential Revision: http://llvm-reviews.chandlerc.com/D3281.diff


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:53:06 +00:00
David Blaikie
41087d99df DebugInfo: Create abstract function definitions even when concrete definitions preceed inline definitions.
After much puppetry, here's the major piece of the work to ensure that
even when a concrete definition preceeds all inline definitions, an
abstract definition is still created and referenced from both concrete
and inline definitions.

Variables are still broken in this case (see comment in
dbg-value-inlined-parameter.ll test case) and will be addressed in
follow up work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209677 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:37:55 +00:00
David Blaikie
0fb9226470 DebugInfo: Avoid an extra map lookup when finding abstract subprogram DIEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209676 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:37:51 +00:00
David Blaikie
254d093f99 DebugInfo: Lazily construct subprogram definition DIEs.
A further step to correctly emitting concrete out of line definitions
preceeding inlined instances of the same program.

To do this, emission of subprograms must be delayed until required since
we don't know which (abstract only (if there's no out of line
definition), concrete only (if there are no inlined instances), or both)
DIEs are required at the start of the module.

To reduce the test churn in the following commit that actually fixes the
bug, this commit introduces the lazy DIE construction and cleans up test
cases that are impacted by the changes in the resulting DIE ordering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209675 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:37:48 +00:00
David Blaikie
def5a05797 DebugInfo: Lazily attach definition attributes to definitions.
This is a precursor to fixing inlined debug info where the concrete,
out-of-line definition may preceed any inlined usage. To cope with this,
the attributes that may appear on the concrete definition or the
abstract definition are delayed until the end of the module. Then, if an
abstract definition was created, it is referenced (and no other
attributes are added to the out-of-line definition), otherwise the
attributes are added directly to the out-of-line definition.

In a couple of cases this causes not just reordering of attributes, but
reordering of types. When the creation of the attribute is delayed, if
that creation would create a type (such as for a DW_AT_type attribute)
then other top level DIEs may've been constructed during the delay,
causing the referenced type to be created and added after those
intervening DIEs. In the extreme case, in cross-cu-inlining.ll, this
actually causes the DW_TAG_basic_type for "int" to move from one CU to
another.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209674 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:37:43 +00:00
David Blaikie
75325b9f65 DebugInfo: Separate out the addition of subprogram attribute additions so that they can be added later depending on whether or not the function is inlined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209673 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:37:38 +00:00
Jingyue Wu
3efc250128 Fixed a test in r209670
The test was outdated with r209537.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209671 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:12:55 +00:00
Jingyue Wu
585644611e Distribute sext/zext to the operands of and/or/xor
This is an enhancement to SeparateConstOffsetFromGEP. With this patch, we can
extract a constant offset from "s/zext and/or/xor A, B".

Added a new test @ext_or to verify this enhancement.

Refactoring the code, I also extracted some common logic to function
Distributable. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209670 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:00:00 +00:00
David Blaikie
991c9c1c89 DebugInfo: Fix argument ordering in test by adding argument numbering.
This old test didn't have the argument numbering that's now squirelled
away in the high bits of the line number in the DW_TAG_arg_variable
metadata.

Add the numbering and update the test to ensure arguments are in-order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209669 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 17:57:14 +00:00
Filipe Cabecinhas
078862e67f Post-commit fixes for r209643
Detected by Daniel Jasper, Ilia Filippov, and Andrea Di Biagio
Fixed the argument order to select (the mask semantics to blendv* are the
inverse of select) and fixed the tests
Added parenthesis to the assert condition
Ran clang-format

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209667 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 16:54:33 +00:00
Tim Northover
fb26356bed AArch64: add test for NZCV cross-copy save.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209665 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 16:50:09 +00:00
Tim Northover
be5c8baeb6 AArch64: add AArch64-specific test for 'c' and 'n'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209664 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 16:50:03 +00:00
Bill Schmidt
3f01f5296e [PATCH] Correct type used for VADD_SPLAT optimization on PowerPC
In PPCISelLowering.cpp: PPCTargetLowering::LowerBUILD_VECTOR(), there
is an optimization for certain patterns to generate one or two vector
splats followed by a vector add or subtract.  This operation is
represented by a VADD_SPLAT in the selection DAG.  Prior to this
patch, it was possible for the VADD_SPLAT to be assigned the wrong
data type, causing incorrect code generation.  This patch corrects the
problem.

Specifically, the code previously assigned the value type of the
BUILD_VECTOR node to the newly generated VADD_SPLAT node.  This is
correct much of the time, but not always.  The problem is that the
call to isConstantSplat() may return a SplatBitSize that is not the
same as the number of bits in the original element vector type.  The
correct type to assign is a vector type with the same element bit size
as SplatBitSize.

The included test case shows an example of this, where the
BUILD_VECTOR node has a type of v16i8.  The vector to be built is {0,
16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16}.  isConstantSplat
detects that we can generate a splat of 16 for type v8i16, which is
the type we must assign to the VADD_SPLAT node.  If we do not, we
generate a vspltisb of 8 and a vaddubm, which generates the incorrect
result {16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
16}.  The correct code generation is a vspltish of 8 and a vadduhm.

This patch also corrected code generation for
CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll, which had been marked
as an XFAIL, so we can remove the XFAIL from the test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209662 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 15:57:51 +00:00
Zoran Jovanovic
61e341e0bf [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16
Differential Revision: http://reviews.llvm.org/D3860


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209659 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 14:58:51 +00:00
Amara Emerson
87d192bb72 [ARM] Emit correct build attributes for the relocation models.
Patch by Asiri Rathnayake.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209656 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 13:30:21 +00:00
Zoran Jovanovic
f7744906f0 [mips][mips64r6] Add relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2
Differential Revision: http://reviews.llvm.org/D3824


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209655 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 12:55:40 +00:00
Evgeniy Stepanov
18b6fb9612 [asancov] Emit an initializer passing number of coverage code locations in each module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209654 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 12:39:31 +00:00
Tim Northover
c74a70df6d AArch64: implement copies to/from NZCV as a last ditch effort.
A test in test/Generic creates a DAG where the NZCV output of an ADCS is used
by multiple nodes. This makes LLVM want to save a copy of NZCV for later, which
it couldn't do before.

This should be the last fix required for the aarch64 buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209651 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 12:16:02 +00:00
Tim Northover
e43c5023fe ARM: teach AAPCS-VFP to deal with Cortex-M4.
Cortex-M4 only has single-precision floating point support, so any LLVM
"double" type will have been split into 2 i32s by now. Fortunately, the
consecutive-register framework turns out to be precisely what's needed to
reconstruct the double and follow AAPCS-VFP correctly!

rdar://problem/17012966

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209650 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 10:43:38 +00:00
Daniel Jasper
ae85c73d4a Fix bad assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209648 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 09:55:37 +00:00
Tim Northover
9bbb4066f8 AArch64: support 'c' and 'n' inline asm modifiers.
These are tested by test/CodeGen/Generic, so we should probably know
how to deal with them. Fortunately generic code does it if asked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209646 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 07:37:21 +00:00
Dinesh Dwivedi
f31b009b3e Adding testcase for PR18886.
Differential Revision: http://reviews.llvm.org/D3837



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209645 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 06:44:25 +00:00
Filipe Cabecinhas
c5f611404c Convert some X86 blendv* intrinsics into IR.
Summary:
Implemented an InstCombine transformation that takes a blendv* intrinsic
call and translates it into an IR select, if the mask is constant.

This will eventually get lowered into blends with immediates if possible,
or pblendvb (with an option to further optimize if we can transform the
pblendvb into a blend+immediate instruction, depending on the selector).
It will also enable optimizations by the IR passes, which give up on
sight of the intrinsic.

Both the transformation and the lowering of its result to asm got shiny
new tests.

The transformation is a bit convoluted because of blendvp[sd]'s
definition:

Its mask is a floating point value! This forces us to convert it and get
the highest bit. I suppose this happened because the mask has type
__m128 in Intel's intrinsic and v4sf (for blendps) in gcc's builtin.

I will send an email to llvm-dev to discuss if we want to change this or
not.

Reviewers: grosbach, delena, nadav

Differential Revision: http://reviews.llvm.org/D3859

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209643 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 03:42:20 +00:00
Rafael Espindola
b84ced649e Fix link.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209640 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 21:30:40 +00:00
Rafael Espindola
ce5ddbab6d Use existing helper function.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209639 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 19:57:55 +00:00
Rafael Espindola
f2928b9b5f [PPC] Use alias symbols in address computation.
This seems to match what gcc does for ppc and what every other llvm
backend does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209638 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 19:08:19 +00:00
Tim Northover
e0c2787cb7 AArch64: force i1 to be zero-extended at an ABI boundary.
This commit is debatable. There are two possible approaches, neither
of which is really satisfactory:

1. Use "@foo(i1 zeroext)" to mean an extension to 32-bits on Darwin,
   and 8 bits otherwise.
2. Redefine "@foo(i1)" to mean that the i1 is extended by the caller
   to 8 bits. This goes against the spirit of "zeroext" I think, but
   it's a bit of a vague construct anyway (by definition you're going
   to extend to the amount required by the ABI, that's why it's the
   ABI!).

This implements option 2. The DAG machinery really isn't setup for the
first (there's a fairly strong assumption that "zeroext" goes to at
least the smallest register size), and even if it was the resulting
DAG looks like it would be inferior in many cases.

Theoretically we could add AssertZext nodes in the consumers of
ABI-passed values too now, but this actually seems to make the code
worse in practice by making truncation proceed in two steps. The code
produced is equally valid if we continue to assume only the low bit is
defined.

Should fix PR19850

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209637 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 17:22:07 +00:00
Tim Northover
4146695fb2 AArch64: simplify calling conventions slightly.
We can eliminate the custom C++ code in favour of some TableGen to
check the same things. Functionality should be identical, except for a
buffer overrun that was present in the C++ code and meant webkit
failed if any small argument needed to be passed on the stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209636 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 17:21:53 +00:00
Michael Zolotukhin
90e79a50bb Some cleanup for r209568.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209634 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 14:49:46 +00:00
Rafael Espindola
1322e998c1 Convert a few loops to use ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209628 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 13:38:51 +00:00
Tilmann Scheller
7aac65de51 [AArch64] Add store + add folding regression tests for the load/store optimization pass.
Add tests for the following transform:

 str X, [x0, #32]
  ...
 add x0, x0, #32
  ->
 str X, [x0, #32]!

with X being either w1, x1, s0, d0 or q0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209627 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 13:36:47 +00:00
Tilmann Scheller
3390e6c4a8 [AArch64] Add more regression tests for the load/store optimization pass.
Cover the following cases:

  ldr X, [x0, #32]
   ...
  add x0, x0, #32
   ->
  ldr X, [x0, #32]!

with X being either w1, x1, s0, d0 or q0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209624 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 12:15:51 +00:00
Kostya Serebryany
3d150e08ae [asan] decrease asan-instrumentation-with-call-threshold from 10000 to 7000, see PR17409
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209623 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 11:57:16 +00:00
Tim Northover
29682f428e AArch64: remove empty ARM64 directories from svn.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209621 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 11:25:33 +00:00
Tilmann Scheller
852c0cc64f Remove accidentally committed whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209619 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 09:40:40 +00:00
Tilmann Scheller
47e3b43768 [AArch64] Add a regression test for the load store optimizer.
We have a couple of regression tests for load/store pairing, but (to my knowledge) there are no regression tests for the load/store + add/sub folding.

As a first step towards increased test coverage of this area, this commit adds a test for one instance of a load + add to pre-indexed load transformation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209618 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 09:37:19 +00:00
Owen Anderson
866ed7f63f Make the LoopRotate pass's maximum header size configurable both programmatically
and via the command line, mirroring similar functionality in LoopUnroll.  In
situations where clients used custom unrolling thresholds, their intent could
previously be foiled by LoopRotate having a hardcoded threshold.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209617 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 08:58:51 +00:00
David Blaikie
bcc96923e0 DebugInfo: Test linkonce-odr functions under LTO.
This was previously regressed/broken by r192749 (reverted due to this
issue in r192938) and I was about to break it again by accident with
some more invasive changes that deal with the subprogram lists. So to
avoid that and further issues - here's a test.

It's a pretty basic test - in both r192749 and my impending case, this
test would crash, but checking the basics (that we put a subprogram in
just one of the two CUs) seems like a good start.

We still get this wrong in weird ways if the linkonce-odr function
happens to not be identical in the metadata (because it's defined in two
different files (hence the # line directives in this test), etc) even
though it meets the language requirements (identical token stream) for
such a thing. That results in two subprogram DIEs, but only one of them
gets the parameter and high/low pc information, etc. We probably need to
use the DIRef infrastructure to deduplicate functions as we do types to
address this issue - or perhaps teach the BC linker to remove the
duplicate entries in subprogram lists?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209614 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 06:44:52 +00:00
David Blaikie
041b4abc73 DwarfUnit: Remove some misleading no-op code introduced in r204162.
Post commit review feedback from Manman called this out, but it looks
like it slipped through the cracks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209611 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 05:32:21 +00:00
Rafael Espindola
524b8836c2 Just check the entire string.
Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 04:08:51 +00:00
NAKAMURA Takumi
a1b1165f30 Reformat linefeeds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209609 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 00:25:26 +00:00
NAKAMURA Takumi
a9b0742276 Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209608 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-26 00:25:09 +00:00
Saleem Abdulrasool
d29bdc72bb tools: avoid use of std::function
Remove the use of the std::function and replace the capturing lambda with a
non-capturing one, opting to pass the user data down to the context.  This is
needed as std::function is not yet available on all hosted platforms (it
requires RTTI, which breaks on Windows).

Thanks to Nico Rieck for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209607 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-25 21:37:59 +00:00
Saleem Abdulrasool
b6a667f033 tools: split out Win64EHDumper from COFFDumper
Move the implementation of the Win64 EH printer from the COFFDumper into its own
class.  This is in preparation for adding support to print ARM EH information.
The only real change here is in printUnwindInfo where we now lambda lift the
implicit this parameter for the resolveFunction.  Also setup the printing to
handle ARM.  This now has set the stage to introduce ARM EH printing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209606 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-25 20:26:45 +00:00