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50b3b50cd0
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15900 Commits

Author SHA1 Message Date
Evan Cheng
50b3b50cd0 Fix a potential bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31634 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 09:13:37 +00:00
Evan Cheng
438f7bc67c Add implicit def / use operands to MachineInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:43:01 +00:00
Evan Cheng
a7ff64d608 When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31631 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:28:11 +00:00
Chris Lattner
1e7aa5c209 commentate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31627 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 04:41:34 +00:00
Chris Lattner
4eab71497d add an initial cut at preinc loads for ppc32. This is broken for ppc64 
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)

This is disabled unless -enable-ppc-preinc is passed to llc for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31621 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 02:08:47 +00:00
Chris Lattner
26ddb506ec add note about ugly codegen with preinc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31617 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 01:33:53 +00:00
Evan Cheng
171d09ea53 Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31616 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 01:28:43 +00:00
Anton Korobeynikov
df78611726 Fixing PR990: http://llvm.org/PR990. 
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31613 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 00:48:11 +00:00
Chris Lattner
578d2df84b add a note about viterbi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31612 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 00:23:26 +00:00
Chris Lattner
08ff1480ff second patch to fix PR992/993. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31610 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 23:36:08 +00:00
Chris Lattner
a9d709d51a Minimal patch to fix PR992/PR993 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31608 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 23:17:45 +00:00
Chris Lattner
9cab56d59e if lazy compilation is disabled, print an error message and abort if 
lazy compilation is ever attempted


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31602 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:32:13 +00:00
Chris Lattner
3d6e33d2a3 init ivar 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31601 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:31:15 +00:00
Evan Cheng
cd63319227 PPC supports i32 / i64 pre-inc load / store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31599 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:11:50 +00:00
Evan Cheng
8dc5cad8a2 Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31598 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:10:46 +00:00
Evan Cheng
5ff839fbab Add a mechanism to specify whether a target supports a particular indexed load / store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:56:43 +00:00
Evan Cheng
0030582239 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31596 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:44:21 +00:00
Evan Cheng
144d8f09e1 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 17:55:04 +00:00
Jim Laskey
85f419b36c Allows debugging llc self hosted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31594 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 16:32:26 +00:00
Jim Laskey
5496f01465 Merging dwarf info to a single compile unit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31593 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 14:52:14 +00:00
Rafael Espindola
f819a4999a implement load effective address similar to the alpha backend 
remove lea_addri and the now unused memri addressing mode


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31592 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 13:58:55 +00:00
Chris Lattner
b324bd735f silence warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31587 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 05:18:12 +00:00
Chris Lattner
b4a2f059ad Teach ShrinkDemandedConstant how to handle X+C. This implements: 
add.ll:test33, add.ll:test34, shift-sra.ll:test2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31586 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 05:12:27 +00:00
Evan Cheng
d258efaf6e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 04:29:46 +00:00
Evan Cheng
a1fd6504aa Remove M_2_ADDR_FLAG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31583 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 02:22:54 +00:00
Evan Cheng
81fd60722a Added indexed store node and patfrag's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31576 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 23:02:11 +00:00
Reid Spencer
6996feb77e Bump the bytecode version number to 7. Implement upgrade of version 6 and 
version 6 bytecode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31573 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 21:27:54 +00:00
Evan Cheng
aacf99964f Use movl+xchgl instead of pushl+popl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31572 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 20:35:37 +00:00
Evan Cheng
0d53826f36 Match tblegen changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31571 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 20:34:28 +00:00
Evan Cheng
b00dddd164 Match more post-indexed ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 20:27:27 +00:00
Chris Lattner
53738a4dbf reenable factoring of GEP expressions, being more precise about the 
case that it bad to do.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31563 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 19:42:28 +00:00
Chris Lattner
f6fd94d3fa make this code more efficient by not creating a phi node we are just going to 
delete in the first place.  This also makes it simpler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31562 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 19:29:23 +00:00
Jim Laskey
d6c3422e31 Remove redundant <cmath>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 19:16:44 +00:00
Chris Lattner
f0cd7085c1 disable this factoring optzn for GEPs for now, this severely pessimizes some 
loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31560 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 18:49:31 +00:00
Rafael Espindola
6e8c6493f0 initial implementation of addressing mode 2 
TODO: fix lea_addri


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31552 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 17:07:32 +00:00
John Criswell
72a780f577 Include llvm/Support/DataTypes.h to define intptr_t. 
This fixes the build on OpenBSD and potentially other systems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31550 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 15:04:35 +00:00
Jim Laskey
6ea0f6bce8 Now can re-enable debug label folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31549 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 14:17:45 +00:00
Devang Patel
c63592b19e Split FunctionPassManager_New into FunctionPassManager_New and FunctionPassManagerImpl_New. 
FunctionPassManagerImpl_New implements the pass manager.
FunctionPassManager_New is the public interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31547 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 10:44:40 +00:00
Devang Patel
5a39b2e806 Split PassManager_New into PassManager_New and PassManagerImpl_New. 
PassManagerImpl_New implements the pass manager.
PassManager_New is the public interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31546 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 10:29:57 +00:00
Devang Patel
c67c938de2 Move BasicBlockPassManager_New, FunctionPassManager_New and 
ModulePassManager_New class declarations from PassManager.h
to PassManager.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31545 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 10:05:38 +00:00
Evan Cheng
03fa6ea402 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 08:30:28 +00:00
Evan Cheng
a4f53ef527 Fixed a minor bug preventing some pre-indexed load / store transformation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31543 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:56:05 +00:00
Reid Spencer
3822ff5c71 For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:47:33 +00:00
Chris Lattner
f49c1766e5 regenerate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31539 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 05:58:47 +00:00
Chris Lattner
39033699d2 Fix a bug noticed by Emil Mikulic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31538 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 05:58:11 +00:00
Evan Cheng
6c1491dd06 Fix a obscure post-indexed load / store dag combine bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31537 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 02:38:55 +00:00
Chris Lattner
fc5b1ab949 Refactor all the addressing mode selection stuff into the isel lowering 
class, where it can be used for preinc formation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31536 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 02:15:41 +00:00
Chris Lattner
302bf9c973 correct the (currently unused) pattern for lwzu. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31535 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 02:13:12 +00:00
Devang Patel
2c5d1851bb Beautify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31533 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 01:31:28 +00:00
Chris Lattner
5d056952ba optimize single MBB loops better. In particular, produce: 
LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        jne LBB1_57     #bb207.i
        jmp LBB1_64     #cond_next255.i

intead of:

LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        je LBB1_64      #cond_next255.i
        jmp LBB1_57     #bb207.i

This eliminates a branch per iteration of the loop.  This hurted PPC
particularly, because the extra branch meant another dispatch group for each
iteration of the loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31530 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 01:03:21 +00:00