Commit Graph

4132 Commits

Author SHA1 Message Date
Toma Tabacu
d6fbb91ea2 [mips] Add new error message and improve testing for parsing the .module directive.
Summary:
We used to silently ignore any empty .module's and we used to give an error saying that we found
an "unexpected token at start of statement" when the value of the option wasn't an identifier (e.g. if it was a number).

We now give an error saying that we "expected .module option identifier" in both of those cases.

I also fixed the other tests in mips-abi-bad.s, which all seemed to be broken.


Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7095

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 10:40:19 +00:00
Craig Topper
d05a6aa4e6 [x86] Change u8imm operands to always print as unsigned. This makes shuffle masks and the like make way more sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226902 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 08:00:59 +00:00
Rafael Espindola
eb3eb88fb7 Add STB_GNU_UNIQUE to the ELF writer.
This lets llvm-mc assemble files produced by gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226895 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 04:44:35 +00:00
Rafael Espindola
06eb5aad37 [pr21886] Change MCJIT/ELF to support MSVC C++ mangled symbol.
The ELF format is used on Windows by the MCJIT engine. Thus, on Windows, the
ELFObjectWriter can encounter symbols mangled using the MS Visual Studio C++
name mangling. Symbols mangled using the MSVC C++ name mangling can legally
have "@@@" as a substring. The EFLObjectWriter should not interpret the "@@@"
substring as specifying GNU-style symbol versioning. The ELFObjectWriter
therefore check for the MSVC C++ name mangling prefix which is either "?", "@?",
"imp_?" or "imp_?@".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226830 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 14:20:45 +00:00
Saleem Abdulrasool
3f6dea4864 ARM: fail less catastrophically on invalid Windows input
Windows supports a restricted set of relocations (compared to ARM ELF).  In some
cases, we may end up generating an unsupported relocation.  This can occur with
bad input to the assembler in particular (the frontend should never generate
code that cannot be compiled).  Generate an error rather than just aborting.

The change in the API is driven by the desire to provide a slightly more helpful
message for debugging purposes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226779 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 04:03:32 +00:00
Jozef Kolek
db8552c834 [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 12:39:30 +00:00
Jozef Kolek
16dbcd741f [mips][microMIPS] Implement ADDIUPC instruction
Differential Revision: http://reviews.llvm.org/D6582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226656 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 12:10:11 +00:00
Vladimir Medic
cde587f359 [Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instructions for mips r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method that properly handles decoding of these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226652 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 10:47:36 +00:00
Craig Topper
951d088ae7 [X86] Convert all the i8imm used by SSE and AVX instructions to u8imm.
This makes the assembler check their size and removes a hack from the disassembler to avoid sign extending the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226645 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 08:15:54 +00:00
Craig Topper
f81b1f346a [x86] Add assembly parser bounds checking to the immediate value for cmpss/cmpsd/cmpps/cmppd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226642 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 06:07:53 +00:00
Jozef Kolek
8832c6b91e Reverted revision 226577.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 19:29:28 +00:00
Jozef Kolek
617b574ffb [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226577 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 16:45:27 +00:00
Kai Nacke
57e80129b9 [mips] Add octeon branch instructions bbit0/bbit032/bbit1/bbit132
This commits adds the octeon branch instructions bbit0/bbit032/bbit1/bbit132.
It also includes patterns for instruction selection and test cases.

Reviewed by D. Sanders


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226573 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 16:10:51 +00:00
Rafael Espindola
a23cc6a1ea Add r224985 back with fixes.
The fixes are to note that AArch64 has additional restrictions on when local
relocations can be used. In particular, ld64 requires that relocations to
cstring/cfstrings use linker visible symbols.

Original message:

In an assembly expression like

bar:
  .long L0 + 1

the intended semantics is that bar will contain a pointer one byte past L0.

In sections that are merged by content (strings, 4 byte constants, etc), a
single position in the section doesn't give the linker enough information.
For example, it would not be able to tell a relocation must point to the
end of a string, since that would look just like the start of the next.

The solution used in ELF to use relocation with symbols if there is a non-zero
addend.

In MachO before this patch we would just keep all symbols in some sections.

This would miss some cases (only cstrings on x86_64 were implemented) and was
inefficient since most relocations have an addend of 0 and can be represented
without the symbol.

This patch implements the non-zero addend logic for MachO too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 21:11:14 +00:00
Rafael Espindola
a7e4c407ad Produce errors when an assignment expression would use a common symbol.
An assignment will produce a symbol with a given section and offset. There is
no way to represent something like "1 byte after a common symbol".

This matches the behavior of GNU as.

Part of PR22217.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226470 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 17:30:24 +00:00
Bradley Smith
0041050116 [ARM] SSAT/USAT with an 'asr #32' shift should result in an undefined encoding rather than unpredictable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226469 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 16:37:17 +00:00
Bradley Smith
ded2091731 [ARM] Fixup sign extend instruction availability w.r.t. DSP extension
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 16:36:02 +00:00
Rafael Espindola
4b678bff4e Bring r226038 back.
No change in this commit, but clang was changed to also produce trivial comdats when
needed.

Original message:

Don't create new comdats in CodeGen.

This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226467 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 15:16:06 +00:00
Daniel Sanders
d409aa7c4d [mips] 'CHECK :' is not a valid check directive. Fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226409 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 18:43:10 +00:00
Daniel Sanders
d752808096 [mips] Make whitespace in disassembler tests more consistent. NFC.
The tests for the ISA's should now be approximately diffable. That is, the
output of 'diff valid-mips1.txt valid-mips2.txt' should be emit the lines
for instructions that were added/removed to/from MIPS-I by MIPS-II. This
doesn't work perfectly at the moment due to ordering differences but it
should be close.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226408 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 18:38:36 +00:00
Daniel Sanders
56c484d0d3 [mips] Make whitespace of disassembler tests more consistent by removing blank lines. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226407 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 18:21:19 +00:00
Timur Iskhodzhanov
6a7c74de33 Revert r226242 - Revert Revert Don't create new comdats in CodeGen
This breaks AddressSanitizer (ninja check-asan) on Windows

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226251 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 08:38:45 +00:00
Rafael Espindola
dfe88a08c7 Revert "Revert Don't create new comdats in CodeGen"
This reverts commit r226173, adding r226038 back.

No change in this commit, but clang was changed to also produce trivial comdats for
costructors, destructors and vtables when needed.

Original message:

Don't create new comdats in CodeGen.

This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226242 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 02:22:55 +00:00
Colin LeMahieu
c93be748d7 [Hexagon] Adding new-value store and bit reverse instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 23:10:29 +00:00
Colin LeMahieu
42fa763380 [Hexagon] Removing old versions of vsplice, valign, cl0, ct0 and updating references to new versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226194 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 19:28:32 +00:00
Colin LeMahieu
500b0d97a1 [Hexagon] Adding vmux instruction. Removing old transfer instructions and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226184 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 18:16:00 +00:00
Joerg Sonnenberger
638077aa41 Support @PLT loads on 32bit x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226182 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 17:59:02 +00:00
Timur Iskhodzhanov
d048b3be70 Revert Don't create new comdats in CodeGen
It breaks AddressSanitizer on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226173 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 16:14:34 +00:00
Vladimir Medic
b6d562e480 Add disassembler tests for mips64r6 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226166 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 14:18:12 +00:00
Vladimir Medic
d83822e6d7 Add disassembler tests for mips32r6 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 14:11:38 +00:00
Vladimir Medic
e671c1cdb5 Add disassembler tests for mips64r2 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226164 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 14:06:34 +00:00
Vladimir Medic
dc67d7678a Add disassembler tests for mips64 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226151 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 08:50:20 +00:00
Hal Finkel
4572a0a0a2 [PowerPC] Add assembler support for mcrfs and friends
Fill out our support for the floating-point status and control register
instructions (mcrfs and friends). As it turns out, these are necessary for
compiling src/test/harness_fp.h in TBB for PowerPC.

Thanks to Raf Schietekat for reporting the issue!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226070 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 01:00:53 +00:00
Duncan P. N. Exon Smith
37ac8d3622 IR: Move MDLocation into place
This commit moves `MDLocation`, finishing off PR21433.  There's an
accompanying clang commit for frontend testcases.  I'll attach the
testcase upgrade script I used to PR21433 to help out-of-tree
frontends/backends.

This changes the schema for `DebugLoc` and `DILocation` from:

    !{i32 3, i32 7, !7, !8}

to:

    !MDLocation(line: 3, column: 7, scope: !7, inlinedAt: !8)

Note that empty fields (line/column: 0 and inlinedAt: null) don't get
printed by the assembly writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 22:27:36 +00:00
Rafael Espindola
33f5127540 Don't create new comdats in CodeGen.
This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226038 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 20:55:48 +00:00
Rafael Espindola
a6b0d5a62e Add a test that would have found the issue with r225644.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226035 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 20:24:46 +00:00
Rafael Espindola
8327f0bca1 Revert "Add r224985 back with two fixes."
This reverts commit r225644 while I debug a regression.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 19:07:23 +00:00
Vladimir Medic
81e68c9023 Add disassembler tests for mips32r2 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225980 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 11:35:22 +00:00
Jyoti Allur
fd06dd8efc Correct POP handling for v7m
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225972 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 10:48:16 +00:00
Vladimir Medic
8da9819ca7 Add disassembler tests for mips32r2 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225967 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 10:18:56 +00:00
Saleem Abdulrasool
1679d0d3c2 X86: validate 'int' instruction
The int instruction takes as an operand an 8-bit immediate value.  Validate that
the input is valid rather than silently truncating the value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225941 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 05:10:21 +00:00
Rafael Espindola
5512415ade Add r224985 back with two fixes.
One is that AArch64 has additional restrictions on when local relocations can
be used. We have to take those into consideration when deciding to put a L
symbol in the symbol table or not.

The other is that ld64 requires the relocations to cstring to use linker
visible symbols on AArch64.

Thanks to Michael Zolotukhin for testing this!

Remove doesSectionRequireSymbols.

In an assembly expression like

bar:
.long L0 + 1

the intended semantics is that bar will contain a pointer one byte past L0.

In sections that are merged by content (strings, 4 byte constants, etc), a
single position in the section doesn't give the linker enough information.
For example, it would not be able to tell a relocation must point to the
end of a string, since that would look just like the start of the next.

The solution used in ELF to use relocation with symbols if there is a non-zero
addend.

In MachO before this patch we would just keep all symbols in some sections.

This would miss some cases (only cstrings on x86_64 were implemented) and was
inefficient since most relocations have an addend of 0 and can be represented
without the symbol.

This patch implements the non-zero addend logic for MachO too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225644 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-12 18:13:07 +00:00
Jozef Kolek
ad017096fc [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructions
Differential Revision: http://reviews.llvm.org/D5271


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-12 12:03:34 +00:00
Saleem Abdulrasool
5e3c87ee1a ARM: add support for segment base relocations (SBREL)
This adds support for parsing and emitting the SBREL relocation variant for the
ARM target.  Handling this relocation variant is necessary for supporting the
full ARM ELF specification.  Addresses PR22128.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-11 04:39:18 +00:00
Saleem Abdulrasool
9c4081dce4 tests: fix previous commit
The previous commit accidentally missed changes to the test output checking,
resulting in an errant failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225577 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-10 02:53:25 +00:00
Saleem Abdulrasool
e83fb8c282 test: merge ARM relocations test
There is a fair number of relocations that are part of the AAELF specification.
Simply merge the tests into a single test file, otherwise, we will end up with
far too many test files to test each relocation type.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225576 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-10 02:48:29 +00:00
Saleem Abdulrasool
cc597901e5 tests: convert a couple of ARM relocation tests to readobj
These tests are checking the relocation generation.  Use the readobj output as
it is much easier to follow when glancing over the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-10 02:48:25 +00:00
Saleem Abdulrasool
c2a1df7125 ARM: add support for R_ARM_ABS16
Add support for R_ARM_ABS16 relocation mapping.  Addresses PR22156.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 06:57:24 +00:00
Saleem Abdulrasool
466a7dea9b test: add additional test for SVN r225507
Add an additional test case to ensure that we generate the relocation even if
the thumb target is used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 06:57:18 +00:00
Saleem Abdulrasool
ea4fe48b22 ARM: add support for R_ARM_ABS8 relocations
Add support for R_ARM_ABS8 relocation.  Addresses PR22126.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 05:59:12 +00:00