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Author SHA1 Message Date
Joerg Sonnenberger
f86b76ead7 Recognize mipseb as alias for mips for symmetry with mipsel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134617 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 16:53:52 +00:00
Oscar Fuentes
a8504111f6 Update CMake library dependencies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134616 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 16:33:00 +00:00
Douglas Gregor
7f358da70f Fix CMake build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134614 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 15:59:22 +00:00
Cameron Zwarich
375db7f39a The VMLA instruction and its friends are not actually fused; they're plain old 
multiply-accumulate instructions with separate rounding steps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134609 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 08:28:52 +00:00
Evan Cheng
db068738e8 Sink feature IsThumb into MC layer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134608 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 08:26:46 +00:00
Evan Cheng
347c50a293 Feature bits are 64-bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134607 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 07:45:49 +00:00
Evan Cheng
0ddff1b535 Compute feature bits at time of MCSubtargetInfo initialization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 07:07:08 +00:00
Chris Lattner
cbd40f8357 type can be null 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134601 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 05:29:18 +00:00
Chris Lattner
7af453a3bd use a more efficient check for 'is metadata' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134599 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 05:12:37 +00:00
Bill Wendling
b99e412650 Use ArrayRef instead of a std::vector&. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134595 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 04:42:01 +00:00
Lang Hames
944520f38c Add functions 'hasPredecessor' and 'hasPredecessorHelper' to SDNode. The 
hasPredecessorHelper function allows predecessors to be cached to speed up
repeated invocations. This fixes PR10186.

X.isPredecessorOf(Y) now just calls Y.hasPredecessor(X)

Y.hasPredecessor(X) calls Y.hasPredecessorHelper(X, Visited, Worklist) with
empty Visited and Worklist sets (i.e. no caching over invocations).

Y.hasPredecessorHelper(X, Visited, Worklist) caches search state in Visited
and Worklist to speed up repeated calls. The Visited set is searched for X
before going to the worklist to further search the DAG if necessary.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134592 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 04:31:51 +00:00
Evan Cheng
39dfb0ff84 Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 03:55:05 +00:00
Bill Wendling
6a6b8c3e96 Add a target hook to encode the compact unwind information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134577 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:54:13 +00:00
Jim Grosbach
e727d67c58 Add isCodeGenOnly value to the CodeGenInstruction class. 
So users of a CGI don't have to look up the value directly from the original
Record; just like the rest of the convenience values in the class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134576 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:48:02 +00:00
Lang Hames
d0626aacca Added a testcase for PR10220. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134573 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:36:02 +00:00
Devang Patel
7986289a9c Add DEBUG messages. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134572 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:14:27 +00:00
Evan Cheng
94ca42ff04 Factor ARM triple parsing out of ARMSubtarget. Another step towards making ARM subtarget info available to MC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134569 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:08:19 +00:00
Devang Patel
a4acb008cb Use DBG_VALUE location while inserting DBG_VALUE during alloca promotion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134568 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:05:58 +00:00
Jakub Staszak
447c40c402 Fix a bug in the "expect" intrinsic lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134566 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 23:50:16 +00:00
Eli Friedman
a38cfb2fce When tail-merging multiple blocks, make sure to correctly update the live-in list on the merged block to correctly account for the live-outs of all the predecessors. They might not be the same in all cases (the testcase I have involves a PHI node where one of the operands is an IMPLICIT_DEF). 
Unfortunately, the testcase I have is large and confidential, so I don't have a test to commit at the moment; I'll see if I can come up with something smaller where this issue reproduces.

<rdar://problem/9716278>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134565 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 23:41:48 +00:00
Jim Grosbach
66c9ee7e6d Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134563 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 23:38:13 +00:00
Devang Patel
90369eb209 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134561 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 23:26:18 +00:00
Devang Patel
a462d6e8eb Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134559 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 23:09:51 +00:00
Bill Wendling
2b2dc7c4be Clean up the #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134557 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 22:52:32 +00:00
Eric Christopher
882e1e1c5d Grammar and 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134555 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 22:41:18 +00:00
Owen Anderson
9cbd7afb76 Fix a subtle issue in SmallVector. The following code did not work as expected: 
vec.insert(vec.begin(), vec[3]);
The issue was that vec[3] returns a reference into the vector, which is invalidated when insert() memmove's the elements down to make space.  The method needs to specifically detect and handle this case to correctly match std::vector's semantics.

Thanks to Howard Hinnant for clarifying the correct behavior, and explaining how std::vector solves this problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134554 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 22:36:59 +00:00
Devang Patel
4fd3c5957e Handle cases where multiple dbg.declare and dbg.value intrinsics are tied to one alloca. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134549 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 22:06:11 +00:00
Evan Cheng
78a9f138ae Add ARM MC registry routines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134547 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 22:02:34 +00:00
Evan Cheng
ed5e355214 Rename files for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134546 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 22:01:53 +00:00
Nick Lewycky
298bc9a1a5 Add ImmutableList::contains(). Patch by Rui Paulo! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134545 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 21:59:48 +00:00
Jim Grosbach
d1689ae4b1 Mark ARM pseudo-instructions as isPseudo. 
This allows us to remove the (bogus and unneeded) encoding information from
the pseudo-instruction class definitions. All of the pseudos that haven't
been converted yet and still need encoding information instance from the normal
instruction classes and explicitly set isCodeGenOnly, and so are distinct
from this change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134540 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 21:35:46 +00:00
Jim Grosbach
806fcc040e Don't require pseudo-instructions to carry encoding information. 
For now this is distinct from isCodeGenOnly, as code-gen-only
instructions can (and often do) still have encoding information
associated with them. Once we've migrated all of them over to true
pseudo-instructions that are lowered to real instructions prior to
the printer/emitter, we can remove isCodeGenOnly and just use isPseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 21:33:38 +00:00
Devang Patel
231a5ab746 Simplify. Consolidate dbg.declare handling in AllocaPromoter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134538 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 21:09:55 +00:00
Andrew Trick
17f91d21a7 indvars -disable-iv-rewrite: ExprToMap lives in Pass data, so be more 
careful about referencing values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134537 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 21:07:10 +00:00
Jim Grosbach
d378b32382 Remove un-used encoding info from Pseudo MLAv5. 
Pseudo-instructions don't have encoding information, as they're lowered
to real instructions by the time we're doing binary encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134533 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 20:57:35 +00:00
Eli Friedman
b0e77a228f Fix missing triple support for RTEMS target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134532 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 20:56:26 +00:00
Andrew Trick
037d1c0c7e indvars -disable-iv-rewrite: Added SimplifyCongruentIVs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134530 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 20:50:43 +00:00
Eli Friedman
0392a0431e Remove some unnecessary includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134528 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 20:48:27 +00:00
Bill Wendling
486dd90696 Constify getCompactUnwindRegNum. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134527 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 20:33:48 +00:00
Evan Cheng
b262799d49 createMCInstPrinter doesn't need TargetMachine anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134525 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 19:45:42 +00:00
Tobias Grosser
a3574fb7e5 LICM: Remove trailing white spaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134521 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 19:20:02 +00:00
Tobias Grosser
df7102b7d6 LICM: Do not loose alignment on promotion 
The promotion code lost any alignment information, when hoisting loads and
stores out of the loop. This lead to incorrect aligned memory accesses. We now
use the largest alignment we can prove to be correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134520 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 19:19:55 +00:00
Jakub Staszak
29057766f7 Add documenation about "branch_weight" metadata and __builtin_expect instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134517 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 18:31:02 +00:00
Jakub Staszak
9da9934e27 Introduce "expect" intrinsic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 18:22:43 +00:00
Kevin Enderby
d7c7e2ff7d Update MC/ELF/relocation.s with change to X86 PUSH64i8 in r134501. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134511 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 17:55:20 +00:00
Kevin Enderby
d521f2d2f1 Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a 
push with a small constant produces a 2-byte push.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134501 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 17:23:46 +00:00
David Greene
e234cd9717 Allow tagless builds and fix debug build configuration. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134498 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 16:54:14 +00:00
Evan Cheng
68ae5b4bea Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134457 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 02:02:33 +00:00
Dan Gohman
211f53aa04 Revert r134366 and add an explicit triple to make this test host-independent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134447 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-05 22:09:19 +00:00
Dan Gohman
9c04b5bd28 Remove the ObjC ARC passes from the default optimization list, and add 
extension points to be used by clang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134444 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-05 22:01:44 +00:00