Commit Graph

92455 Commits

Author SHA1 Message Date
Venkatraman Govindaraju
5300869256 [Sparc] Add support for leaf functions in sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182822 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-29 04:46:31 +00:00
NAKAMURA Takumi
0cf4adbcef LoopVectorize.cpp: Fix abuse of StringRef on Twine. Twine captures the pointer of StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-29 03:13:47 +00:00
NAKAMURA Takumi
51c292a360 Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182819 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-29 03:13:41 +00:00
David Blaikie
61212bcaff Debug Info: Update documentation to match recent (& not so recent) schema changes
This updates the debug info metadata schema documentation for various
schema changes made recently surrounding filename information for
scopes and the representation of imported entities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182817 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-29 02:05:13 +00:00
David Blaikie
4af9230dbd Debug Info: Reorder accessor to match field order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182816 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-29 02:05:07 +00:00
Jack Carter
c57905ef4d Mips assembler: Improve set register alias handling
This patch solves the problem of numeric register values not being accepted:

../set_alias.s:1:11: error: expected valid expression after comma
        .set    r4,$4
                    ^
The parsing of .set directive is changed and handling of symbols in code 
as well to enable this feature. 

The test example is added.

Patch by Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182807 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 22:21:05 +00:00
Tim Northover
86b2473c21 AArch64: clarify -help message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182804 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 21:09:39 +00:00
Simon Atanasyan
e4ee452576 [Mips] Add Mips specific dynamic table entry tags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182803 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 20:48:56 +00:00
Paul Redmond
ee21b6f7b4 Add support for llvm.vectorizer metadata
- llvm.loop.parallel metadata has been renamed to llvm.loop to be more generic
  by making the root of additional loop metadata.
  - Loop::isAnnotatedParallel now looks for llvm.loop and associated
    llvm.mem.parallel_loop_access
  - document llvm.loop and update llvm.mem.parallel_loop_access
- add support for llvm.vectorizer.width and llvm.vectorizer.unroll
  - document llvm.vectorizer.* metadata
  - add utility class LoopVectorizerHints for getting/setting loop metadata
  - use llvm.vectorizer.width=1 to indicate already vectorized instead of
    already_vectorized
- update existing tests that used llvm.loop.parallel and
  llvm.vectorizer.already_vectorized

Reviewed by: Nadav Rotem


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182802 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 20:00:34 +00:00
Michael Gottesman
a32edcfbc5 [APInt] Implement tcDecrement as a counterpart to tcIncrement. This is for use in APFloat IEEE-754R 2008 nextUp/nextDown function.
rdar://13852078

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182801 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 19:50:20 +00:00
Tim Northover
e274b476de ARM: use pristine object file while processing relocations
Previously we would read-modify-write the target bits when processing
relocations for the MCJIT. This had the problem that when relocations
were processed multiple times for the same object file (as they can
be), the result is not idempotent and the values became corrupted.

The solution to this is to take any bits used in the destination from
the pristine object file as LLVM emitted it.

This should fix PR16013 and remote MCJIT on ARM ELF targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182800 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 19:48:19 +00:00
Manman Ren
9174fd77e5 LTO+Debug Info: correctly emit inlined_subroutine when the inlined callee is
from a different CU.

We used to print out an error message and fail to generate inlined_subroutine.

If we use ref_addr in the generated DWARF, the DWARF version should be 3 or
above.
rdar://13926659


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182791 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 19:01:58 +00:00
Jyotsna Verma
ee6e242e78 Hexagon: Typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182790 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 19:01:45 +00:00
Chad Rosier
2275cfd75b Remove the MCRegAliasIterator tables and compute the aliases dynamically.
The size reduction in the RegDiffLists are rather dramatic.  Here are a few
size differences for MCTargetDesc.o files (before and after) in bytes:
R600 - 36160B - 11184B - 69% reduction
ARM - 28480B - 8368B - 71% reduction
Mips - 816B - 576B - 29% reduction

One side effect of dynamically computing the aliases is that the iterator does
not guarantee that the entries are ordered or that duplicates have been removed.
The documentation implies this is a safe assumption and I found no clients that
requires these attributes (i.e., strict ordering and uniqueness).

My local LNT tester results showed no execution-time failures or significant
compile-time regressions (i.e., beyond what I would consider noise) for -O0g,
-O2 and -O3 runs on x86_64 and i386 configurations.
rdar://12906217


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182783 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 18:08:48 +00:00
Benjamin Kramer
520b6e3fa5 Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 16:39:36 +00:00
Benjamin Kramer
e4fae84b0b Remove double semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182778 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 16:31:26 +00:00
James Molloy
a84a83bbcd Extend RemapInstruction and friends to take an optional new parameter, a ValueMaterializer.
Extend LinkModules to pass a ValueMaterializer to RemapInstruction and friends to lazily create Functions for lazily linked globals. This is a big win when linking small modules with large (mostly unused) library modules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182776 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 15:17:05 +00:00
Evgeniy Stepanov
9903f75bf6 [msan] Fix argument shadow alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182771 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 13:07:43 +00:00
Renato Golin
988005ab49 Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182766 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 11:28:37 +00:00
Richard Sandiford
d50bcb2162 [SystemZ] Register compare-and-branch support
This patch adds support for the CRJ and CGRJ instructions.  Support for
the immediate forms will be a separate patch.

The architecture has a large number of comparison instructions.  I think
it's generally better to concentrate on using the "best" comparison
instruction first and foremost, then only use something like CRJ if
CR really was the natual choice of comparison instruction.  The patch
therefore opportunistically converts separate CR and BRC instructions
into a single CRJ while emitting instructions in ISelLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 10:41:11 +00:00
Renato Golin
fe4716f7cf Linking ReleaseProcess doc with the world
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182763 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 10:32:55 +00:00
Richard Sandiford
06c3c9a9e1 [SystemZ] Tweak SystemZInstrInfo::isBranch() interface
This is needed for the upcoming compare-and-branch patch.  No functional
change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182762 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 10:13:54 +00:00
Alexey Samsonov
c1a0806ff5 Revert r182715 and r182758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182761 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 10:08:08 +00:00
Renato Golin
e5ee3cfbc1 Adding ReleaseProcess doc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182759 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 09:48:52 +00:00
Alexey Samsonov
1f41986a95 Fixup for r182715: provide correct arg to --gtest-filter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182758 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 09:40:42 +00:00
Michael Kuperstein
9f5de6dadc Make BasicAliasAnalysis recognize the fact a noalias argument cannot alias another argument, even if the other argument is not itself marked noalias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182755 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 08:17:48 +00:00
Rafael Espindola
af10fe63c6 Make it explicit that GlobalAlias are ok in llvm.used.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182747 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-27 22:47:09 +00:00
Rafael Espindola
078bdc6cbb Make helper functions static.
And remove header and cpp file that are empty after that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182746 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-27 22:34:59 +00:00
Preston Gurd
b704d23062 Convert sqrt functions into sqrt instructions when -ffast-math is in effect.
When -ffast-math is in effect (on Linux, at least), clang defines
__FINITE_MATH_ONLY__ > 0 when including <math.h>. This causes the
preprocessor to include <bits/math-finite.h>, which renames the sqrt functions.
For instance, "sqrt" is renamed as "__sqrt_finite". 

This patch adds the 3 new names in such a way that they will be treated
as equivalent to their respective original names.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182739 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-27 15:44:35 +00:00
Rafael Espindola
f594e41ae9 Add a cpu to try to bring back the atom bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182734 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-27 13:22:52 +00:00
Hal Finkel
119da2eb20 PPC: Add a isConsecutiveLS utility function
isConsecutiveLS is a slightly more general form of
SelectionDAG::isConsecutiveLoad. Aside from also handling stores, it also does
not assume equality of the chain operands is necessary. In the case of the PPC
backend, this chain condition is checked in a more general way by the
surrounding code.

Mostly, this part of the refactoring in preparation for supporting optimized
unaligned stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182723 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-27 02:06:39 +00:00
NAKAMURA Takumi
d1c99b2aae llvm-objdump.cpp: Appease MSC16 x64. utostr(n++) causes internal compiler error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182722 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-27 00:02:48 +00:00
Hal Finkel
1907cad7c8 Prefer to duplicate PPC Altivec loads when expanding unaligned loads
When expanding unaligned Altivec loads, we use the decremented offset trick to
prevent page faults. Unfortunately, if we have a sequence of consecutive
unaligned loads, this leads to suboptimal code generation because the 'extra'
load from the first unaligned load can be combined with the base load from the
second (but only if the decremented offset trick is not used for the first).
Search up and down the chain, through loads and token factors, looking for
consecutive loads, and if one is found, don't use the offset reduction trick.
These duplicate loads are later combined to yield the desired sequence (in the
future, we might want a more-powerful chain search, but that will require some
changes to allow the combiner routines to access the AA object).

This should complete the initial implementation of the optimized unaligned
Altivec load expansion. There is some refactoring that should be done, but
that will happen when the unaligned store expansion is added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182719 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-26 18:08:30 +00:00
Kai Nacke
ea991637e4 Add LDC compiler to list of external OS projects using LLVM 3.3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182718 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-26 17:37:43 +00:00
Andrew Trick
9edb37feb5 Fix PR16143: Insert DEBUG_VALUE before terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182717 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-26 08:58:50 +00:00
Galina Kistanova
f0c74bda2e Fixed bug when tests in executable partially used absolute paths.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182715 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-26 03:58:41 +00:00
Chris Lattner
03abfc7114 Disable the StringMapEntry copy constructor, to make sure we
reject things like: "for (auto Entry : SomeStringMap)".  Previously
this would copy the value but not the tail allocated string data
(the key).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182713 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 22:28:22 +00:00
Cameron Zwarich
41b646c127 Add support for DWARF line number table entries for values in the instruction
stream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182712 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 21:56:53 +00:00
Eric Christopher
60057270d9 Add some comments to the stringify function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182710 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 05:13:17 +00:00
Hal Finkel
5a0e60425f PPC: Combine duplicate (offset) lvsl Altivec intrinsics
The lvsl permutation control instruction is a function only of the alignment of
the pointer operand (relative to the 16-byte natural alignment of Altivec
vectors). As a result, multiple lvsl intrinsics where the operands differ by a
multiple of 16 can be combined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182708 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 04:05:05 +00:00
Andrew Trick
81349a7435 Track IR ordering of SelectionDAG nodes 4/4.
Unit test cases for -pre-RA-sched=source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182706 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 03:26:51 +00:00
Andrew Trick
dd0fb018a7 Track IR ordering of SelectionDAG nodes 3/4.
Remove the old IR ordering mechanism and switch to new one.  Fix unit
test failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182704 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 03:08:10 +00:00
Andrew Trick
ac6d9bec67 Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 02:42:55 +00:00
Andrew Trick
ea5db0c315 Track IR ordering of SelectionDAG nodes 1/4.
Use a field in the SelectionDAGNode object to track its IR ordering.
This adds fields and utility classes without changing existing
interfaces or functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 02:20:36 +00:00
Andrew Trick
ba3500e4d2 Fix RecyclingAllocator::PrintStats to print the underlying allocator's stats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182700 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 01:47:42 +00:00
Eric Christopher
725e3d324b Add to testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182693 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 23:20:16 +00:00
Eric Christopher
f7306f224e ArrayRef-ize MD5 and clean up a few variable names.
Add a stringize method to make dumping a bit easier, and add a testcase
exercising a few different paths.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 23:08:17 +00:00
Hal Finkel
80d10ded8c PPC: Initial support for permutation-based unaligned Altivec loads
Altivec only directly supports aligned loads, but the loads have a strange
property: If given an unaligned address, they truncate the address to the next
lower aligned address, and load from there.  This property, along with an extra
load and some special-purpose permutation-control instructions that generate
the appropriate permutations from the original unaligned address, allow
efficient lowering of aligned loads. This code uses the trick explained in the
Apple Velocity Engine optimization overview document to prevent the needed
extra load from possibly causing a page fault if the original address happens
to be aligned.

As noted in the FIXMEs, there are several additional optimizations that can be
performed to reduce the cost of these loads even more. These will be
implemented in future commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182691 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 23:00:14 +00:00
Michael J. Spencer
3b77151a61 [Support] Remove Count{Leading,Trailing}Zeros_{32,64}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 22:58:37 +00:00
Jim Grosbach
4e505a47c7 Tidy up. Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182689 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 22:53:06 +00:00