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Author SHA1 Message Date
Chris Lattner
5348e393df Adjust the Intrinsics.gen interface a little bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27345 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:35:30 +00:00
Chris Lattner
7224f84c15 Adjust to change in Intrinsics.gen interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27344 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:35:01 +00:00
Chris Lattner
edab1b9133 Constant fold all of the vector binops. This allows us to compile this: 
"vector unsigned char mergeLowHigh = (vector unsigned char)
( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 );
vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));"

aka:

void %test2(<16 x sbyte>* %P) {
  store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P
  ret void
}

into this:

_test2:
        mfspr r2, 256
        oris r4, r2, 32768
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        lvx v0, r5, r4
        stvx v0, 0, r3
        mtspr 256, r2
        blr

instead of this:

_test2:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        vspltisb v0, 8
        lvx v1, r5, r4
        vxor v0, v1, v0
        stvx v0, 0, r3
        mtspr 256, r2
        blr

... which occurs here:
http://developer.apple.com/hardware/ve/calcspeed.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:25:57 +00:00
Chris Lattner
5e46a19ec8 Add a new -view-legalize-dags command line option 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27342 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:07:27 +00:00
Chris Lattner
6258fb2592 Implement constant folding of bit_convert of arbitrary constant vbuild_vector nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27341 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:53:43 +00:00
Chris Lattner
5e08a11039 These entries already exist 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27340 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:51:27 +00:00
Chris Lattner
97d23335ad Add some missing node names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27339 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:41:18 +00:00
Chris Lattner
885a87ef85 simplify this method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:28:52 +00:00
Chris Lattner
5295122b0d New note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27337 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 01:47:20 +00:00
Chris Lattner
4460f4058f Constant fold casts from things like <4 x int> -> <4 x uint>, likewise int<->fp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27336 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 01:38:28 +00:00
Chris Lattner
541f91b17c Custom lower all BUILD_VECTOR's so that we can compile vec_splat_u8(8) into 
"vspltisb v0, 8" instead of a constant pool load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27335 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 00:43:36 +00:00
Chris Lattner
f8814cf8b8 Prefer larger register classes over smaller ones when a register occurs in 
multiple register classes.  This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27334 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 00:24:45 +00:00
Chris Lattner
4502e13c9b New testcase that crashes the compiler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 00:23:59 +00:00
Chris Lattner
3805dea3fe add valuemapper support for inline asm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27332 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 23:17:11 +00:00
Chris Lattner
c3837d4917 Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27331 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 22:41:47 +00:00
Chris Lattner
ae1ab3989c Fix InstCombine/2006-04-01-InfLoop.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27330 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 22:05:01 +00:00
Chris Lattner
ff1a14aba9 New testcase that caused instcombine to infinitely loop (with my recent 
patch), distilled from Applications/JM/ldecod


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27329 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 22:04:40 +00:00
Chris Lattner
64daab56c2 Fold A^(B&A) -> (B&A)^A 
Fold (B&A)^A == ~B & A

This implements InstCombine/xor.ll:test2[56]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27328 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 08:03:55 +00:00
Chris Lattner
1d4b07cfee new testcases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27327 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 08:02:51 +00:00
Chris Lattner
60a05cc118 Fix Transforms/IndVarsSimplify/2006-03-31-NegativeStride.ll and 
PR726 by performing consistent signed division, not consistent unsigned
division when evaluating scev's.  Do not touch udivs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27326 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 04:48:52 +00:00
Chris Lattner
b076783e7d new testcase for PR726 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27325 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 04:47:17 +00:00
Chris Lattner
eaa7c06d86 ADd a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27324 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 04:08:29 +00:00
Chris Lattner
6e6b0da303 If we can look through vector operations to find the scalar version of an 
extract_element'd value, do so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27323 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 23:01:56 +00:00
Chris Lattner
348ba3f9bf Shrinkify some more intrinsic definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27322 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:41:56 +00:00
Evan Cheng
67d3d4c085 An entry about packed type alignments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27321 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:35:14 +00:00
Chris Lattner
6cea814f2c Pull operand asm string into base class, shrinkifying intrinsic definitions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:34:05 +00:00
Evan Cheng
e668bdaa52 TargetData.cpp::getTypeInfo() was returning alignment of element type as the 
alignment of a packed type. This is obviously wrong. Added a workaround that
returns the size of the packed type as its alignment. The correct fix would
be to return a target dependent alignment value provided via TargetLowering
(or some other interface).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27319 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:33:42 +00:00
Chris Lattner
f1d0c623c6 Delete identity shuffles, implementing CodeGen/Generic/vector-identity-shuffle.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27317 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:16:43 +00:00
Chris Lattner
9546720484 An identity shuffle shouldn't generate any permute code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27316 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:16:19 +00:00
Chris Lattner
b5c4d17a6c Fix 80 column violations :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27315 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:57:36 +00:00
Evan Cheng
653159f4aa Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed 
INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27314 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:55:24 +00:00
Chris Lattner
b83169195c regenerate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27313 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:54:11 +00:00
Chris Lattner
711e5d96aa Generalize the previous binary operator support and add a string concatenation 
operation.  This implements Regression/TableGen/strconcat.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27312 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:53:49 +00:00
Chris Lattner
fd2ae97ac3 new testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27311 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:53:01 +00:00
Evan Cheng
4b1734f70b Added support for SSE3 horizontal ops: haddp{s|d} and hsub{s|d}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27310 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:29:33 +00:00
Evan Cheng
6159873e46 Added haddp{s|d} and hsubp{s|d} intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27309 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:28:46 +00:00
Chris Lattner
7376a5e129 fix a pasto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:19:06 +00:00
Chris Lattner
a9cb441642 Add vperm support for all datatypes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 20:00:35 +00:00
Chris Lattner
e3fea5a1c1 Rearrange code a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27306 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:52:36 +00:00
Chris Lattner
32a988a095 Add, sub and shuffle are legal for all vector types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:48:58 +00:00
Evan Cheng
b067a1e7e6 Add support to use pextrw and pinsrw to extract and insert a word element 
from a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27304 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:22:53 +00:00
Evan Cheng
1eda6e7924 Add vector_extract and vector_insert nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27303 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:21:16 +00:00
Chris Lattner
9f7e127133 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27302 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:00:22 +00:00
Chris Lattner
6fa4cdf92e constant fold extractelement with undef operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27301 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:31:40 +00:00
Chris Lattner
1f13c88939 extractelement(undef,x) -> undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27300 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:25:14 +00:00
Chris Lattner
c741ea424a Do not endian swap split vector loads. This fixes UnitTests/Vector/sumarray-dbl on PPC. 
Now all UnitTests/Vector/* tests pass on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27299 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:22:37 +00:00
Chris Lattner
d9731af75b Do not endian swap the operands to a store if the operands came from a vector. 
This fixes UnitTests/Vector/simple.c with altivec.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27298 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:20:46 +00:00
Chris Lattner
29cd7db310 Remove dead *extloads. This allows us to codegen vector.ll:test_extract_elt 
to:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 12, r32
        ;;
        ldfs f8 = [r8]
        mov ar.pfs = r3
        br.ret.sptk.many rp

instead of:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 28, r32
        adds r9 = 24, r32
        adds r10 = 20, r32
        adds r11 = 16, r32
        ;;
        ldfs f6 = [r8]
        ;;
        ldfs f6 = [r9]
        adds r8 = 12, r32
        adds r9 = 8, r32
        adds r14 = 4, r32
        ;;
        ldfs f6 = [r10]
        ;;
        ldfs f6 = [r11]
        ldfs f8 = [r8]
        ;;
        ldfs f6 = [r9]
        ;;
        ldfs f6 = [r14]
        ;;
        ldfs f6 = [r32]
        mov ar.pfs = r3
        br.ret.sptk.many rp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27297 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:10:41 +00:00
Chris Lattner
e4b953939c Delete dead loads in the dag. This allows us to compile 
vector.ll:test_extract_elt2 into:

_test_extract_elt2:
        lfd f1, 32(r3)
        blr

instead of:

_test_extract_elt2:
        lfd f0, 56(r3)
        lfd f0, 48(r3)
        lfd f0, 40(r3)
        lfd f1, 32(r3)
        lfd f0, 24(r3)
        lfd f0, 16(r3)
        lfd f0, 8(r3)
        lfd f0, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27296 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:06:18 +00:00
Chris Lattner
bf9341493a Make this test harder, always check generic x86 and SSE-enabled x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27295 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 17:59:16 +00:00