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547d8045fb
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22017 Commits

Author SHA1 Message Date
Chad Rosier
547d8045fb Put the shiny new MCSubRegIterator to work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157783 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 00:02:08 +00:00
Jakob Stoklund Olesen
ee66b417ef Add support for return value promotion in X86 calling conventions. 
Patch by Yiannis Tsiouris!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157757 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-31 17:28:20 +00:00
Manman Ren
91c5346d91 X86: replace SUB with CMP if possible 
This patch will optimize the following
        movq    %rdi, %rax
        subq    %rsi, %rax
        cmovsq  %rsi, %rdi
        movq    %rdi, %rax
to
        cmpq    %rsi, %rdi
        cmovsq  %rsi, %rdi
        movq    %rdi, %rax

Perform this optimization if the actual result of SUB is not used.

rdar: 11540023


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157755 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-31 17:20:29 +00:00
Jakob Stoklund Olesen
5ddc04caf2 Add a PrintRegUnit helper similar to PrintReg. 
Reg-units are named after their root registers, and most units have a
single root, so they simply print as 'AL', 'XMM0', etc. The rare dual
root reg-units print as FPSCR~FPSCR_NZCV, FP0~ST7, ...

The printing piggybacks on the existing register name tables, so no
extra const data space is required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157754 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-31 17:18:29 +00:00
Joel Jones
703360f93c Fix typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157752 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-31 17:11:25 +00:00
Benjamin Kramer
c8e340da82 X86: Rename the CLMUL target feature to PCLMUL. 
It was renamed in gcc/gas a while ago and causes all kinds of
confusion because it was named differently in llvm and clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157745 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-31 14:34:17 +00:00
Elena Demikhovsky
177cf1e1a3 Added FMA3 Intel instructions. 
I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks.
I added tests for GodeGen and intrinsics.
I did not change llvm.fma.f32/64 - it may be done later.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157737 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-31 09:20:20 +00:00
Craig Topper
0559a2f8ae Add intrinsic for pclmulqdq instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157731 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-31 04:37:40 +00:00
Akira Hatanaka
28ee4fdf20 Cleanup and factoring of mips16 tablegen classes. Make register classes 
CPU16RegsRegClass and CPURARegRegClass available. Add definition of mips16
jalr instruction.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157730 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-31 02:59:44 +00:00
Jakob Stoklund Olesen
4c91bdafac Avoid depending on list orders and register numbering. 
This code is covered by test/CodeGen/ARM/arm-modifier.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157720 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-30 23:00:43 +00:00
Jakob Stoklund Olesen
4aecc761c7 Extract some pointer hacking to a function. 
Switch to MCSuperRegIterator while we're there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157717 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-30 22:40:03 +00:00
Eric Christopher
6ab75b4dcb Add support for the mips inline asm 'm' output modifier. 
Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157709 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-30 19:05:19 +00:00
Jakob Stoklund Olesen
6c823822cd Fix some uses of getSubRegisters() to use getSubReg() instead. 
It is better to address sub-registers directly by name instead of
relying on their position in the sub-register list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157703 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-30 18:40:49 +00:00
Chris Lattner
f186df0d3e it's pointed out that R11 can be used for magic things, and doing things just for 64-bit registers is silly. Just optimize 3 more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157699 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-30 18:08:02 +00:00
Chris Lattner
5aaabbfe62 Extend the (abi-irrelevant) return convention to be able to return more than two values in 
integer registers.  This is already supported by the fastcc convention, but it doesn't
hurt to support it in the standard conventions as well.

In cases where we can cheat at the calling convention, this allows us to avoid returning
things through memory in more cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157698 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-30 17:50:14 +00:00
Chad Rosier
ada759d5fa [arm-fast-isel] Add support for the llvm.frameaddress() intrinsic. 
Patch by Jush Lu <jush.msn@gmail.com>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157696 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-30 17:23:22 +00:00
Benjamin Kramer
77fc4b297a Port support for SSE4a extrq/insertq to the old jit code emitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157685 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-30 09:13:55 +00:00
Benjamin Kramer
1386e9b7b1 Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. 
This required light surgery on the assembler and disassembler
because the instructions use an uncommon encoding. They are
the only two instructions in x86 that use register operands
and two immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-29 19:05:25 +00:00
Nicolas Geoffray
e23642916b Update CPPBackend to new API for AttrListPtr::get. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157624 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-29 15:07:18 +00:00
Stepan Dyatkovskiy
0aa32d5d0f ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to IntegersSubsetMapping. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157612 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-29 12:26:47 +00:00
Akira Hatanaka
3ad21bef92 Fix predicate HasStandardEncoding in MipsInstrInfo.td per suggestion of 
Benjamin Kramer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157504 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 22:15:15 +00:00
Akira Hatanaka
06a2f42d11 Delete MipsExpandPseudo.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157496 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:54:48 +00:00
Akira Hatanaka
564f69072c Move the code in MipsExpandPseudo to MipsInstrInfo::expandPostRAPseudo. 
Delete MipsExpandPseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157495 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:52:52 +00:00
Akira Hatanaka
8951abd993 Remove the code that expands MIPS' .cpload directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157494 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:46:52 +00:00
Akira Hatanaka
6a1a2b1395 Remove the code that emits MIPS' .cprestore directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157493 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:42:55 +00:00
Akira Hatanaka
65d5629065 Remove pseudo instructions that are no longer used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157492 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 20:37:40 +00:00
Justin Holewinski
d2ea0e10cb Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall 
to pass around a struct instead of a large set of individual values.  This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.

NV_CONTRIB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 16:35:28 +00:00
Eli Friedman
2db0e9ebb6 Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157446 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 00:09:29 +00:00
Jakob Stoklund Olesen
b1ebd6981f Shrink. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157433 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 22:17:44 +00:00
Justin Holewinski
42a0b48dd3 Remove the PTX back-end and all of its artifacts (triple, etc.) 
This back-end was deprecated in favor of the NVPTX back-end.

NV_CONTRIB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157417 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 21:38:21 +00:00
Akira Hatanaka
c784395a79 Turn on mips16 pseudo op when compiling for mips16. 
Expand test case for this.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157410 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 18:37:43 +00:00
Akira Hatanaka
4a5a8949cd Enable Mips16 compiler to compile a null program. 
First code from the Mips16 compiler. Includes trivial test program.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157408 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 18:32:33 +00:00
Craig Topper
6366361998 Convert assert(0) to llvm_unreachable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157380 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 07:02:50 +00:00
Craig Topper
c5ce4d1d52 Use uint16_t to store registers in static tables. Matches other tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157375 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 06:09:56 +00:00
Craig Topper
53146a29bc Use uint16_t to store register number in static tables to match other tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157374 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 05:55:47 +00:00
Craig Topper
51f50c1106 Make some opcode tables static and const. Allows code to avoid making copies to pass the tables around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157373 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 05:17:00 +00:00
Craig Topper
6fcf129cf5 Mark a couple arrays as static and const. Use array_lengthof instead of sizeof/sizeof. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157369 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 04:22:05 +00:00
Craig Topper
032f441afc Mark a static array as const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157368 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 04:11:15 +00:00
Craig Topper
cd2859eef8 Mark a static table as const. Shrink opcode size in static tables to uint16_t. Simplify loop iterating over one of those tables. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157367 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-24 03:59:11 +00:00
Chad Rosier
3fb6eca0cd Tidy up naming for consistency and other cleanup. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157358 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-23 23:45:10 +00:00
Chad Rosier
1c8fccbc12 [arm-fast-isel] Add support for non-global callee. 
Patch by Jush Lu <jush.msn@gmail.com>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157336 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-23 18:38:57 +00:00
Craig Topper
88097819fc Tidy up spacing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157313 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-23 05:44:51 +00:00
Craig Topper
82dd67a1c8 Fix indentation of wrapped line for readability. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157309 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-23 03:59:53 +00:00
NAKAMURA Takumi
dd051a0414 ARMDisassembler.cpp: Fix utf8 char in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157292 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-22 21:47:02 +00:00
Craig Topper
85b9e56bac Fix constant used for pshufb mask when lowering v16i8 shuffles. Bug introduced in r157043. Fixes PR12908. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157236 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-22 06:09:38 +00:00
Akira Hatanaka
18f3c78092 This patch adds a predicate to existing mips32 and mips64 so that those 
instruction encodings can be excluded during mips16 processing.

This revision fixes the issue raised by Jim Grosbach.

bool hasStandardEncoding() const { return !inMips16Mode(); }

When micromips is added it will be

bool StandardEncoding() const { return !inMips16Mode()&&  !inMicroMipsMode(); }

No additional testing is needed other than to assure that there is no regression
from this patch.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157234 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-22 03:10:09 +00:00
Jim Grosbach
b3a119a257 ARM: .end_data_region mismatch in Thumb2. 
32-bit offset jump tables just use real branch instructions and so aren't
marked as data regions. We were still emitting the .end_data_region
marker though, which assert()ed.

rdar://11499158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157221 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-21 23:34:42 +00:00
Jim Grosbach
b551f0cc78 Thumb2: RSB source register should be rGRP not GPRnopc. 
t2RSB defined the operand correctly, but tRSBS didn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157200 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-21 17:57:17 +00:00
Craig Topper
8ae97baef2 Allow 256-bit shuffles to still be split even if only half of the shuffle comes from two 128-bit pieces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157175 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-21 06:40:16 +00:00
Jakob Stoklund Olesen
53df9259e9 Make the global base reg GR32_NOSP. 
It can sometimes be used in addressing modes that don't support %ESP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157165 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-20 18:43:00 +00:00