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Author SHA1 Message Date
Matheus Almeida
5537013350 Test commit. Updated comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191748 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:53:00 +00:00
Richard Sandiford
79e2ed4d83 [SystemZ] Add register zero extensions involving at least one high word 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191746 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:49:07 +00:00
Joerg Sonnenberger
de1a52b032 Remove empty directory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191745 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:42:48 +00:00
Joey Gouly
d1311ac171 [ARM] Introduce the 'sevl' instruction in ARMv8. 
This also removes the restriction on the immediate field of the 'hint'
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191744 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:39:11 +00:00
Richard Sandiford
9813dbf396 [SystemZ] Add truncating high-word stores (STCH and STHH) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191743 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:22:49 +00:00
Richard Sandiford
9a05f040e7 [SystemZ] Add zero-extending high-word loads (LLCH and LLHH) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191742 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:19:08 +00:00
Benjamin Kramer
341562b9fb SCEVExpander: Fix a regression I introduced by to eagerly adding RAII objects. 
PR17425.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191741 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:17:11 +00:00
Richard Sandiford
ced450f0e6 [SystemZ] Add sign-extending high-word loads (LBH and LHH) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191740 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:11:47 +00:00
Richard Sandiford
55d7d83b6c [SystemZ] Use upper words of GR64s for codegen 
This just adds the basics necessary for allocating the upper words to
virtual registers (move, load and store).  The move support is parameterised
in a way that makes it easy to handle zero extensions, but the associated
zero-extend patterns are added by a later patch.

The easiest way of testing this seemed to be add a new "h" register
constraint for high words.  I don't expect the constraint to be useful
in real inline asms, but it should work, so I didn't try to hide it
behind an option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191739 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 11:26:28 +00:00
Richard Sandiford
7d0b89bedd [SystemZ] Reapply: Add definitions of LFH and STFH 
Originally committed as r191661, but reverted because it changed the matching
order of comparisons on some hosts.  That should have been fixed by r191735.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191738 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 10:31:04 +00:00
Daniel Sanders
7f768e0368 [mips][msa] Added support for matching mod_[us] from normal IR (i.e. not intrinsics) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191737 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 10:22:35 +00:00
Richard Sandiford
737ca5f7ab Fix pattern sort in DAGISelEmitter.cpp 
The old code skipped one of the sorting criteria if either pattern had
no types.  This could lead to cycles of the form X < Y, Y < Z, Z < X.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191735 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 09:49:01 +00:00
Vladimir Medic
d59ad8a801 This patch adds aliases for Mips sub instruction with immediate operands. Corresponding test cases are added. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191734 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 09:48:56 +00:00
Elena Demikhovsky
c8d0d00781 AVX-512: Added X86vzmovl patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191733 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 08:38:02 +00:00
Craig Topper
18a8e10720 Remove 0 as a valid encoding for the m-mmmm field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191732 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 07:10:28 +00:00
Craig Topper
8568510d46 Remove unneeded fields from disassembler internal instruction format. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191731 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 06:56:57 +00:00
Craig Topper
f99f63db79 BEXTR should be defined to take same type for bother operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191728 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 03:48:26 +00:00
Tom Stellard
20a3bc600c SelectionDAG: Clarify comments from r191600 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191724 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 02:09:00 +00:00
Andrew Kaylor
70c1ea493e Tests for MCJIT multiple module support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191723 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 01:48:36 +00:00
Andrew Kaylor
8e9ec01534 Adding multiple module support for MCJIT. 
Tests to follow.

PIC with small code model and  EH frame handling will not work with multiple modules.  There are also some rough edges to be smoothed out for remote target support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191722 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 01:47:35 +00:00
Eric Christopher
451c71d67b Add the DW_AT_GNU_ranges_base attribute if we've emitted any ranges 
into the debug_ranges section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191721 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 00:43:36 +00:00
Eric Christopher
08bd923be8 Update comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191720 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 00:43:31 +00:00
Matt Arsenault
6110829661 Fix code duplication 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191716 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 00:01:14 +00:00
Preston Gurd
7813a2fe9d Forgot to add a break statement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191715 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 23:51:22 +00:00
Matt Arsenault
81877ad396 Use CHECK-LABEL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191713 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 23:31:55 +00:00
Matt Arsenault
b1d70af7b9 Reuse variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191712 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 23:31:50 +00:00
Preston Gurd
2967a80412 The X86FixupLEAs pass for Intel Atom must not call convertToThreeAddress 
on ADD16rr opcodes, if src1 != src, since that would cause 
convertToThreeAddress to try to create a virtual register. This is not
permitted after register allocation, which is when the X86FixupLEAs pass
runs.

This patch fixes PR16785.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191711 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 23:18:42 +00:00
Eric Christopher
a6d841561b The DW_AT_GNU_pubnames/pubtypes attributes are actually form 
SEC_OFFSET from the beginning of the section so go ahead and emit
a label at the beginning of each one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191710 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 23:14:16 +00:00
Eric Christopher
188f96c111 Add llvm-readobj to the list of programs to find in the freshly built 
toolchain.

Patch by Richard Pennington.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191706 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 21:55:01 +00:00
Matt Arsenault
2ebcd57e6a Fix getOrInsertGlobal dropping the address space. 
Currently it will insert an illegal bitcast.
Arguably, the address space argument should be
added for the creation case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191702 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 21:23:03 +00:00
Matt Arsenault
3ca8f2e5d5 Use right address space size in InstCombineCompares 
The test's output doesn't change, but this ensures
this is actually hit with a different address space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191701 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 21:11:01 +00:00
Matt Arsenault
f9dd19f498 Constant fold ptrtoint + compare with address spaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191699 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 21:06:18 +00:00
Manman Ren
e5388399c7 Debug Info: constify and rename from generateRef to getRef. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191696 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 19:42:10 +00:00
Anders Waldenborg
5be81238f0 llvm-c: use typedef for function pointers 
This makes it consistent with other function pointers used in llvm-c

Differential Revision: http://llvm-reviews.chandlerc.com/D1712



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191693 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 19:11:32 +00:00
Tilmann Scheller
20546c697f [ARM] Fix Thumb(-2) diagnostic tests. 
Changing the diagnostic message for out of range branch targets in 191686 broke the tests.

The diagnostic message for out of range branch targets was changed to be more consistent with the other diagnostics.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191691 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 18:50:51 +00:00
Manman Ren
e267f04ef5 TBAA: update tbaa format from scalar format to struct-path aware format. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191690 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 18:17:55 +00:00
Manman Ren
aef1b37824 TBAA: remove !tbaa from testing cases when they are not needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191689 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 18:17:35 +00:00
Jack Carter
bdf8015cff [mips][msa] Direct Object Emission for I8 instructions. 
This patch adds Direct Object Emission support for I8 instructions: andi.b, bmnzi.b, bmzi.b, bseli.b, nori.b, ori.b, shf.{b,h,w} and xori.b.


Patch by Matheus Almeida


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191688 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 18:05:18 +00:00
Jack Carter
b0247157c6 [mips][msa] Direct Object Emission for I5 instructions. 
This patch adds Direct Object Emission support for I5 instructions: addvi.{b,h,w,d}, ceqi.{b,h,w,d}, clei_s.{b,h,w,d}, clei_u.{b,h,w,d}, clti_s.{b,h,w,d}, clti_u.{b,h,w,d}, maxi_s.{b,h,w,d}, maxi_u.{b,h,w,d}, mini_s.{b,h,w,d}, mini_u.{b,h,w,d}, subvi.{b,h,w,d}.


Patch by Matheus Almeida


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191687 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 17:58:07 +00:00
Tilmann Scheller
a64fa348df [ARM] Clean up ARMAsmParser::validateInstruction(). 
Fix some LLVM Coding Standards violations.

No changes in functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191686 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 17:57:30 +00:00
Jack Carter
70f556140f [mips][msa] Direct Object Emission for 2R instructions. 
This patch adds Direct Object Emission support for 2R instructions: nloc.{b,h,w}, nlzc.{b,h,w}, pcnt.{b,w,d}.  


Patch by Matheus Almeida


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191685 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 17:52:33 +00:00
Jack Carter
2641f5e412 [PATCH 1/4] [mips][msa] Source register of FILL instructions is GPR 
and not an MSA register

Patch by Matheus Almeida


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191684 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 17:43:04 +00:00
Tilmann Scheller
2f184eaf89 [ARM] Use FileCheck instead of grep for ARM LDRD negative tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191683 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 17:31:26 +00:00
Rafael Espindola
c13c9e5a9d Move command line options to the users of libLTO. Fixes --enable-shared build. 
Patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191680 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 16:39:19 +00:00
Rafael Espindola
4b5205d2a3 Revert "Enable building LTO on WIN32." 
This reverts commit r191670.

It was causing build failures on the msvc bots:

http://bb.pgr.jp/builders/ninja-clang-i686-msc17-R/builds/5166/steps/compile/logs/stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191679 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 16:32:51 +00:00
Tilmann Scheller
9724873c31 [ARM] Assembler: ARM LDRD with writeback requires the base register to be different from the destination registers. 
See ARM ARM A8.8.72.

Violating this constraint results in unpredictable behavior.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191678 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 16:11:48 +00:00
Arnold Schwaighofer
7373265e1a Swift model: Fix uop description on some writes 
Those writes really need two/three uops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191677 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 15:56:34 +00:00
Benjamin Kramer
b313a93be7 BoundsChecking: Fix refacto. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191676 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 15:52:50 +00:00
Benjamin Kramer
d427882166 Convert manual insert point restores to the new RAII object. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191675 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 15:40:17 +00:00
Benjamin Kramer
6dc5c6b879 InstCombine: Replace manual fast math flag copying with the new IRBuilder RAII helper. 
Defines away the issue where cast<Instruction> would fail because constant
folding happened. Also slightly cleaner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191674 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 15:39:59 +00:00