18834 Commits

Author SHA1 Message Date
Sanjay Patel
5601e30a77 use range-based for loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241076 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 16:30:22 +00:00
Adrian Prantl
85cd16c88e Debug info: Add dwarf backend support for DIModule.
rdar://problem/20965932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241034 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 02:13:04 +00:00
Matthias Braun
1a5b04c725 RegisterCoalescer: Cleanup empty subranges after shrinkToUses()
A call to removeEmptySubranges() is necessary after every operation that
potentially removes all segments from a subregister range; this case in
the register coalescer was missing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 00:33:44 +00:00
Peter Collingbourne
a6367d9136 Teach LTOModule to emit linker flags for dllexported symbols, plus interface cleanup.
This change unifies how LTOModule and the backend obtain linker flags
for globals: via a new TargetLoweringObjectFile member function named
emitLinkerFlagsForGlobal. A new function LTOModule::getLinkerOpts() returns
the list of linker flags as a single concatenated string.

This change affects the C libLTO API: the function lto_module_get_*deplibs now
exposes an empty list, and lto_module_get_*linkeropts exposes a single element
which combines the contents of all observed flags. libLTO should never have
tried to parse the linker flags; it is the linker's job to do so. Because
linkers will need to be able to parse flags in regular object files, it
makes little sense for libLTO to have a redundant mechanism for doing so.

The new API is compatible with the old one. It is valid for a user to specify
multiple linker flags in a single pragma directive like this:

 #pragma comment(linker, "/defaultlib:foo /defaultlib:bar")

The previous implementation would not have exposed
either flag via lto_module_get_*deplibs (as the test in
TargetLoweringObjectFileCOFF::getDepLibFromLinkerOpt was case sensitive)
and would have exposed "/defaultlib:foo /defaultlib:bar" as a single flag via
lto_module_get_*linkeropts. This may have been a bug in the implementation,
but it does give us a chance to fix the interface.

Differential Revision: http://reviews.llvm.org/D10548

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241010 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 22:04:09 +00:00
Pawel Bylica
4c81aa2602 [DAGCombiner] Fix & simplify constant folding of sext/zext.
Summary: This patch fixes the cases of sext/zext constant folding in DAG combiner where constans do not fit 64 bits. The fix simply removes un$

Test Plan: New regression test included.

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: RKSimon, llvm-commits

Differential Revision: http://reviews.llvm.org/D10607

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240991 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 20:28:47 +00:00
Benjamin Kramer
17d7215661 [MMI] Use TinyPtrVector instead of PointerUnion with vector.
Also simplify duplicated code a bit. No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240990 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 20:21:55 +00:00
Alex Lorenz
1a4def3d97 MIR Serialization: Serialize the register mask machine operands.
This commit implements serialization of the register mask machine
operands. This commit serializes only the call preserved register
masks that are defined by a target, it doesn't serialize arbitrary
register masks.

This commit also extends the TargetRegisterInfo class and TableGen so that
the users of TRI can get the list of all the call preserved register masks and
their names.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10673


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240966 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 16:57:06 +00:00
Adrian Prantl
1e7ecc8e57 Revert "Debug Info: One more bitfield bugfix. While yesterday's r240853 fixed"
This reverts commit 240890. Breaking the gdb buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240893 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-27 21:55:00 +00:00
Benjamin Kramer
45b5f7e457 [SDAG] Now that we have a way to communicate the exact bit on sdiv use it to simplify sdiv by a constant.
We had a hack in SDAGBuilder in place to work around this but now we
can avoid that. Call BuildExactSDIV from BuildSDIV so DAGCombiner can
perform this trick automatically.

The added check in DAGCombiner is necessary to prevent exact sdiv by pow2
from regressing as the target-specific pow2 lowering is not aware of
exact bits yet.

This is mostly covered by existing tests. One side effect is that we
get the better lowering for exact vector sdivs now too :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-27 20:33:26 +00:00
Adrian Prantl
6b2ae13ea3 Debug Info: One more bitfield bugfix. While yesterday's r240853 fixed
the DW_AT_bit_offset computation, the byte offset is in fact also
endian-dependent as it needs to point to the storage unit containing the
most-significant bit of the the bitfield.
I'm so looking forward to emitting the endian-agnostic DWARF 3 version
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240890 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-27 20:12:43 +00:00
Adrian Prantl
60bd365f59 Debug Info: Fix a bug in the DW_AT_bit_offset calculation that would
result in negative offsets and attempt a better job at documenting
the algorithm.

rdar://21082998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240853 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 23:31:27 +00:00
Duncan P. N. Exon Smith
340d78d52d CodeGen: Create a proper ModuleSlotTracker for MachineInstr
Another follow-up related to r240848: try a little harder to share slot
tracking calculations within a single `MachineInstr` dump.  This is
unrelated to `MachineFunction::print()`, since that should be passing
through the function's `ModuleSlotTracker` by now, but could affect the
speed of dumping from a debugger if there is more than one IR-level
operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240852 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 23:18:44 +00:00
Alex Lorenz
d986612a1a MIR Serialization: Serialize global address machine operands.
This commit serializes the global address machine operands.
This commit doesn't serialize the operand's offset and target
flags, it serializes only the global value reference.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10671


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240851 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 22:56:48 +00:00
Duncan P. N. Exon Smith
8266df7f7f CodeGen: Push the ModuleSlotTracker through Metadata
For another 1% speedup on the testcase in PR23865, push the
`ModuleSlotTracker` through to metadata-related printing in
`MachineBasicBlock::print()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240848 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 22:28:47 +00:00
Duncan P. N. Exon Smith
a08efbfc8e CodeGen: Push the ModuleSlotTracker through MachineOperands
Push `ModuleSlotTracker` through `MachineOperand`s, dropping the time
for `llc -print-machineinstrs` on the testcase in PR23865 from ~13
seconds to ~9 seconds.  Now `SlotTracker::processFunctionMetadata()`
accounts for only 8% of the runtime, which seems reasonable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240845 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 22:06:47 +00:00
Duncan P. N. Exon Smith
9a61a42713 CodeGen: Use a single SlotTracker in MachineFunction::print()
Expose enough of the IR-level `SlotTracker` so that
`MachineFunction::print()` can use a single one for printing
`BasicBlock`s.  Next step would be to lift this through a few more APIs
so that we can make other print methods faster.

Fixes PR23865, changing the runtime of `llc -print-machineinstrs` from
many minutes (killed after 3 minutes, but it wasn't very close) to
13 seconds for a 502185 line dump.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240842 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 22:04:20 +00:00
Adrian Prantl
7cb828a34d Debug Info: Clarify the documentation for bitfields emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240835 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 21:27:30 +00:00
Pete Cooper
6d5c43889e Convert a bunch of loops to foreach. NFC.
This uses the new SDNode::op_values() iterator range committed in r240805.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240822 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 19:37:02 +00:00
Pete Cooper
a5d25f61ae Wrap assert loops in #ifndef NDEBUG
The body of the loops here only contained asserts.  This triggered an unused variable
warning on release builds and -Werror on the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240819 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 19:23:20 +00:00
Pete Cooper
e0e37a2382 Convert a bunch of loops to foreach. NFC.
This uses the new SDNode::op_values() iterator range committed in r240805.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240817 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 19:18:49 +00:00
Pete Cooper
226505c0a1 Convert a bunch of loops to foreach. NFC.
This uses the new SDNode::op_values() iterator range committed in r240805.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240815 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 19:08:33 +00:00
Matt Arsenault
57b2119961 Show invariant loads in MMO dumping
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240813 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 19:00:11 +00:00
Pete Cooper
e89ab0eff9 Convert a bunch of loops to foreach. NFC.
This uses the new SDNode::op_values() iterator range committed in r240805.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240809 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 18:41:54 +00:00
Alex Lorenz
cb2dc5bc1c Fix unused variable from r240792.
The variable 'I' wasn't used when assertions were disabled.
This commit ensures that 'I' is used outside of an assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 17:07:27 +00:00
Benjamin Kramer
23a207d839 [DAGCombine] Fix demanded bits computation for exact shifts.
Fixes a miscompilation of MultiSource/Benchmarks/MallocBench/gs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240796 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 16:59:31 +00:00
Alex Lorenz
438a4919fd MIR Serialization: Serialize machine basic block operands.
This commit serializes machine basic block operands. The
machine basic block operands use the following syntax:

  %bb.<id>[.<name>]

This commit also modifies the YAML representation for the
machine basic blocks - a new, required field 'id' is added
to the MBB YAML mapping.

The id is used to resolve the MBB references to the
actual MBBs. And while the name of the MBB can be
included in a MBB reference, this name isn't used to
resolve MBB references - as it's possible that multiple
MBBs will reference the same BB and thus they will have the
same name. If the name is specified, the parser will verify
that it is equal to the name of the MBB with the specified id.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10608


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240792 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 16:46:11 +00:00
Benjamin Kramer
875007d3c4 [DAGCombiner] Preserve the exact bit when simplifying SRA to SRL.
Allows more aggressive folding of ashr/shl pairs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240788 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 14:51:49 +00:00
Benjamin Kramer
3791d56da6 [DAGCombine] fold (X >>?,exact C1) << C2 --> X << (C2-C1)
Instcombine also does this but many opportunities only become visible
after GEPs are lowered.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240787 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 14:51:36 +00:00
Hao Liu
fabf219603 [InterleavedAccess] Fix failures "undefined type 'llvm::raw_ostream'" on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240760 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 04:38:21 +00:00
Hao Liu
41b3fe53ba [InterleavedAccess] Add a pass InterleavedAccess to identify interleaved memory accesses and transform into target specific intrinsics.
E.g. An interleaved load (Factor = 2):
        %wide.vec = load <8 x i32>, <8 x i32>* %ptr
        %v0 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <0, 2, 4, 6>
        %v1 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <1, 3, 5, 7>
It can be transformed into a ld2 intrinsic in AArch64 backend or a vld2 intrinsic in ARM backend.

E.g. An interleaved store (Factor = 3):
        %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
        store <12 x i32> %i.vec, <12 x i32>* %ptr
It can be transformed into a st3 intrinsic in AArch64 backend or a vst3 intrinsic in ARM backend.

Differential Revision: http://reviews.llvm.org/D10533


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240751 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 02:10:27 +00:00
Duncan P. N. Exon Smith
2da1484e97 AsmPrinter: Use an intrusively linked list for DIE::Children
Replace the `std::vector<>` for `DIE::Children` with an intrusively
linked list.  This is a strict memory improvement: it requires no
auxiliary storage, and reduces `sizeof(DIE)` by one pointer.  It also
factors out the DIE-related malloc traffic.

This drops llc memory usage from 735 MB down to 718 MB, or ~2.3%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:52:10 +00:00
Duncan P. N. Exon Smith
73e3fb6ba8 AsmPrinter: Convert DIE::Values to a linked list
Change `DIE::Values` to a singly linked list, where each node is
allocated on a `BumpPtrAllocator`.  In order to support `push_back()`,
the list is circular, and points at the tail element instead of the
head.  I abstracted the core list logic out to `IntrusiveBackList` so
that it can be reused for `DIE::Children`, which also cares about
`push_back()`.

This drops llc memory usage from 799 MB down to 735 MB, about 8%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:46:41 +00:00
Matt Arsenault
5bf34efcce DAGCombiner: Use pop_back_val()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240709 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 22:15:05 +00:00
Sanjay Patel
7db079305c fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 21:11:08 +00:00
Matt Arsenault
a59b0561c8 DAGCombiner: Remove redundant check
MemIntrinsicSDNode is already a subclass of MemSDNode,
so the MemSDNode check is sufficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240672 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 18:47:02 +00:00
Bruno Cardoso Lopes
39b2e22f00 [AsmPrinter] Fix crash in handleIndirectSymViaGOTPCRel
Check for symbols in MCValue before using them. Bail out early in case
they are null. This fixes PR23779.

Differential Revision: http://reviews.llvm.org/D10712

rdar://problem/21532830

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240649 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 15:17:23 +00:00
Akira Hatanaka
45dc32257e [If Converter] Convert recursion to iteration.
This commit makes changes to IfConverter::AnalyzeBlock to use iteration instead
of recursion. Previously, this function would get called recursively a large
number of times and eventually segfault when a function with the following CFG
was compiled:

BB0:
 if (condition0)
  goto BB1
 goto BB2
BB1:
 goto BB2
BB2:
 if (condition1)
  goto BB3
 goto BB4
BB3:
...
(repeat until BB7488)

rdar://problem/21386145

Differential Revision: http://reviews.llvm.org/D10587


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240589 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 20:34:35 +00:00
Alex Lorenz
c9a4f3d5d9 MIR Serialization: Serialize simple MachineRegisterInfo attributes.
This commit serializes the 3 scalar boolean attributes from the
MachineRegisterInfo class: IsSSA, TracksRegLiveness, and
TracksSubRegLiveness. These attributes are serialized as part
of the machine function YAML mapping.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10618


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240579 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 19:56:10 +00:00
Duncan P. N. Exon Smith
a0b5a74966 AsmPrinter: Cleanup DIEValue::EmitValue() API, NFC
Stop taking a `dwarf::Form` in `DIEValue::EmitValue()` and
`DIEValue::SizeOf()`, since they're always passed `DIEValue::getForm()`
anyway.  This is just left over from when `DIEValue` didn't know its own
form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240566 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 18:48:11 +00:00
Alex Lorenz
d89b55e309 MIR Serialization: Serialize the null register operands.
This commit serializes the null register machine operands.
It uses the '_' keyword to represent them, but the parser
also allows the '%noreg' named register syntax.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10580


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240558 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 17:34:58 +00:00
Daniel Sanders
128f072d3b Eliminate additional redundant copies of Triple objects. NFC.
Subscribers: rafael, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240540 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 13:25:57 +00:00
Pawel Bylica
bf98467060 Fix instruction scheduling live register tracking
Summary:
This patch fixes PR23405 (https://llvm.org/bugs/show_bug.cgi?id=23405).

During a node unscheduling an entry in LiveRegGens can be replaced with a new value. That corrupts the live reg tracking and LiveReg* structure is not cleared as should be during unscheduling. Problematic condition that enforces Gen replacement is `I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight()`. This condition should be checked only if LiveRegGen was set in current node unscheduling.

Test Plan: Regression test included.

Reviewers: hfinkel, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9993

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240538 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 12:49:42 +00:00
NAKAMURA Takumi
76bee1a450 MILexer.cpp: Try to fix a warning. [-Wsign-compare]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240525 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 06:40:09 +00:00
Alex Lorenz
ac57f351bd MIR Serialization: Serialize immediate machine operands.
Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10573


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240481 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 23:42:28 +00:00
Alex Lorenz
926d65d4f7 MIR Parser: Use correct source locations for machine instruction diagnostics.
This commit translates the source locations for MIParser diagnostics from
the locations in the machine instruction string to the locations in the
MIR file.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10574


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240474 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 22:39:23 +00:00
Sanjoy Das
ef42e1115f Revert "[FaultMaps] Move FaultMapParser to Object/"
This reverts commit r240364 (git c49542e5bb186).  The issue r240364 was
trying to fix was fixed independently in r240362.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240448 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 20:09:03 +00:00
Alex Lorenz
9982d6f7ee MIR Serialization: Serialize physical register machine operands.
This commit introduces functionality that's used to serialize machine operands.
Only the physical register operands are serialized by this commit.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10525


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240425 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 16:35:26 +00:00
Benjamin Kramer
530a616a9d [BranchFolding] Document why replacing HashMachineInstr with hash_code doesn't work
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240415 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 14:47:36 +00:00
Benjamin Kramer
336ead08bd [MachineBasicBlock] Add getFirstNonDebugInstr to complement getLastNonDebugInstr
Use it in CodeGen where applicable. No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240414 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 14:47:29 +00:00
Benjamin Kramer
d18bb88b2e [MachineBasicBlock] Use the const_cast(this) trick to reduce duplication
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240413 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 14:47:18 +00:00