llvm-6502/lib/CodeGen
Benjamin Kramer 23a207d839 [DAGCombine] Fix demanded bits computation for exact shifts.
Fixes a miscompilation of MultiSource/Benchmarks/MallocBench/gs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240796 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 16:59:31 +00:00
..
AsmPrinter AsmPrinter: Use an intrusively linked list for DIE::Children 2015-06-25 23:52:10 +00:00
MIRParser MIR Serialization: Serialize machine basic block operands. 2015-06-26 16:46:11 +00:00
SelectionDAG [DAGCombine] Fix demanded bits computation for exact shifts. 2015-06-26 16:59:31 +00:00
AggressiveAntiDepBreaker.cpp MachineFrameInfo: Simplify pristine register calculation. 2015-05-28 23:20:35 +00:00
AggressiveAntiDepBreaker.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AllocationOrder.cpp
AllocationOrder.h
Analysis.cpp CodeGen: move over-zealous assert into actual if statement. 2015-05-06 20:07:38 +00:00
AntiDepBreaker.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AtomicExpandPass.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
BasicTargetTransformInfo.cpp
BranchFolding.cpp [BranchFolding] Document why replacing HashMachineInstr with hash_code doesn't work 2015-06-23 14:47:36 +00:00
BranchFolding.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
CalcSpillWeights.cpp
CallingConvLower.cpp remove function names from comments; NFC 2015-06-11 14:26:49 +00:00
CMakeLists.txt [InterleavedAccess] Add a pass InterleavedAccess to identify interleaved memory accesses and transform into target specific intrinsics. 2015-06-26 02:10:27 +00:00
CodeGen.cpp [CodeGen] Add a pass to fold null checks into nearby memory operations. 2015-06-15 18:44:27 +00:00
CodeGenPrepare.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
CoreCLRGC.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
CriticalAntiDepBreaker.cpp MachineFrameInfo: Simplify pristine register calculation. 2015-05-28 23:20:35 +00:00
CriticalAntiDepBreaker.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
DeadMachineInstructionElim.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
DFAPacketizer.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
DwarfEHPrepare.cpp Move the personality function from LandingPadInst to Function 2015-06-17 20:52:32 +00:00
EarlyIfConversion.cpp Avoid redundant select node in early if-conversion pass 2015-06-18 22:34:09 +00:00
EdgeBundles.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
ErlangGC.cpp
ExecutionDepsFix.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
ExpandISelPseudos.cpp
ExpandPostRAPseudos.cpp
FaultMaps.cpp Revert "[FaultMaps] Move FaultMapParser to Object/" 2015-06-23 20:09:03 +00:00
GCMetadata.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
GCMetadataPrinter.cpp
GCRootLowering.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
GCStrategy.cpp
GlobalMerge.cpp Fix assertion failure in global-merge with unused ConstantExpr 2015-06-08 16:55:31 +00:00
IfConversion.cpp [If Converter] Convert recursion to iteration. 2015-06-24 20:34:35 +00:00
ImplicitNullChecks.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
InlineSpiller.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
InterferenceCache.cpp Make static variables const if possible. Makes them go into a read-only section. 2015-03-08 16:07:39 +00:00
InterferenceCache.h Make static variables const if possible. Makes them go into a read-only section. 2015-03-08 16:07:39 +00:00
InterleavedAccessPass.cpp [InterleavedAccess] Fix failures "undefined type 'llvm::raw_ostream'" on windows. 2015-06-26 04:38:21 +00:00
IntrinsicLowering.cpp
LatencyPriorityQueue.cpp Remove LatencyPriorityQueue::dump because it relies on an implicit copy ctor which is deprecated in C++11 (due to the presence of a user-declare dtor in the base class) 2015-03-03 21:16:56 +00:00
LexicalScopes.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
LiveDebugVariables.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
LiveDebugVariables.h IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
LiveInterval.cpp Oops, didn't mean to commit my debug fprintfs 2015-04-08 02:10:01 +00:00
LiveIntervalAnalysis.cpp CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperands 2015-05-29 02:56:46 +00:00
LiveIntervalUnion.cpp
LivePhysRegs.cpp Handle dead defs in the if converter. 2015-05-06 22:51:04 +00:00
LiveRangeCalc.cpp LiveRangeCalc: Improve error messages on malformed IR 2015-05-11 18:47:47 +00:00
LiveRangeCalc.h Do not track subregister liveness when it brings no benefits 2015-03-19 00:21:58 +00:00
LiveRangeEdit.cpp LiveRangeEdit: Fix liveranges not shrinking on subrange kill. 2015-06-01 21:26:26 +00:00
LiveRegMatrix.cpp
LiveStackAnalysis.cpp Recommit r231168: unique_ptrify LiveRange::segmentSet 2015-03-04 01:20:33 +00:00
LiveVariables.cpp [LiveVariables] Improve isLiveOut runtime performances. NFC. 2015-06-11 07:50:21 +00:00
LLVMBuild.txt Protection against stack-based memory corruption errors using SafeStack 2015-06-15 21:07:11 +00:00
LLVMTargetMachine.cpp Replace string GNU Triples with llvm::Triple in TargetMachine::getTargetTriple(). NFC. 2015-06-16 13:15:50 +00:00
LocalStackSlotAllocation.cpp [ARM] Fix handling of thumb1 out-of-range frame offsets 2015-03-20 17:20:07 +00:00
MachineBasicBlock.cpp [MachineBasicBlock] Add getFirstNonDebugInstr to complement getLastNonDebugInstr 2015-06-23 14:47:29 +00:00
MachineBlockFrequencyInfo.cpp
MachineBlockPlacement.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineBranchProbabilityInfo.cpp
MachineCombiner.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineCopyPropagation.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineCSE.cpp MachineCSE: Add a target query for the LookAheadLimit heurisitic 2015-05-09 00:56:07 +00:00
MachineDominanceFrontier.cpp
MachineDominators.cpp
MachineFunction.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineFunctionAnalysis.cpp MIR Serialization: Connect the machine function analysis pass to the MIR parser. 2015-06-15 20:30:22 +00:00
MachineFunctionPass.cpp
MachineFunctionPrinterPass.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineInstr.cpp [PM/AA] Remove the Location typedef from the AliasAnalysis class now 2015-06-17 07:18:54 +00:00
MachineInstrBundle.cpp [ARM] Pass a callback to FunctionPass constructors to enable skipping execution 2015-06-08 18:50:43 +00:00
MachineLICM.cpp MachineLICM: Use TargetSchedModel instead of just itineraries 2015-06-13 03:42:11 +00:00
MachineLoopInfo.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
MachineModuleInfo.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineModuleInfoImpls.cpp Clear the stub map in getSortedStubs. 2015-04-07 12:59:28 +00:00
MachinePassRegistry.cpp
MachinePostDominators.cpp
MachineRegionInfo.cpp
MachineRegisterInfo.cpp Have TargetRegisterInfo::getLargestLegalSuperClass take a 2015-03-10 23:46:01 +00:00
MachineScheduler.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineSink.cpp [MachineSink] Address post-commit review comments 2015-06-16 08:57:21 +00:00
MachineSSAUpdater.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineTraceMetrics.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MachineVerifier.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
Makefile Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format). 2015-05-27 18:02:19 +00:00
MIRPrinter.cpp MIR Serialization: Serialize machine basic block operands. 2015-06-26 16:46:11 +00:00
MIRPrinter.h MIR Serialization: move the MIR printer out of the MIR printing pass. 2015-06-15 23:52:35 +00:00
MIRPrintingPass.cpp MIR Serialization: move the MIR printer out of the MIR printing pass. 2015-06-15 23:52:35 +00:00
module.modulemap
OcamlGC.cpp
OptimizePHIs.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
Passes.cpp Protection against stack-based memory corruption errors using SafeStack 2015-06-15 21:07:11 +00:00
PeepholeOptimizer.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
PHIElimination.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
PHIEliminationUtils.cpp
PHIEliminationUtils.h
PostRASchedulerList.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
ProcessImplicitDefs.cpp CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperands 2015-05-29 02:56:46 +00:00
PrologEpilogInserter.cpp MachineInstr: Change return value of getOpcode() to unsigned. 2015-05-18 20:27:55 +00:00
PseudoSourceValue.cpp
README.txt
RegAllocBase.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
RegAllocBase.h
RegAllocBasic.cpp
RegAllocFast.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
RegAllocGreedy.cpp RegAllocGreedy: Allow target to specify register class ordering. 2015-03-31 19:57:53 +00:00
RegAllocPBQP.cpp [PBQP] Use a local bit-matrix to speedup searching an edge in the graph. 2015-03-05 09:12:59 +00:00
RegisterClassInfo.cpp Have getRegPressureSetLimit take a MachineFunction so that a 2015-03-11 18:34:58 +00:00
RegisterCoalescer.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
RegisterCoalescer.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
RegisterPressure.cpp RegisterPressure: fix debug prints in case of physical registers 2015-05-27 22:51:47 +00:00
RegisterScavenging.cpp [RegisterScavenger] Fix handling of predicated instructions 2015-06-09 22:10:58 +00:00
ScheduleDAG.cpp
ScheduleDAGInstrs.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
ScheduleDAGPrinter.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
ScoreboardHazardRecognizer.cpp
ShadowStackGC.cpp
ShadowStackGCLowering.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
ShrinkWrap.cpp [ShrinkWrap] Add a target hook to check whether or not 2015-05-27 06:25:48 +00:00
SjLjEHPrepare.cpp Move the personality function from LandingPadInst to Function 2015-06-17 20:52:32 +00:00
SlotIndexes.cpp [llvm] Replacing asserts with static_asserts where appropriate 2015-03-16 09:53:42 +00:00
Spiller.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
SpillPlacement.cpp
SpillPlacement.h Use 'override/final' instead of 'virtual' for overridden methods 2015-04-11 02:11:45 +00:00
SplitKit.cpp
SplitKit.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
StackColoring.cpp Remove MCInstrItineraries includes in parts that don't use them anymore 2015-05-14 18:01:11 +00:00
StackMapLivenessAnalysis.cpp Internalize the StackMapLiveness pass. 2015-03-24 13:20:54 +00:00
StackMaps.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
StackProtector.cpp Simplify IRBuilder::CreateCall* by using ArrayRef+initializer_list/braced init only 2015-05-18 22:13:54 +00:00
StackSlotColoring.cpp Recommit r231175: Change LiveStackAnalysis::SS2IntervalMap from std::map to std::unordered_map 2015-03-04 01:15:53 +00:00
StatepointExampleGC.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
TailDuplication.cpp [MachineBasicBlock] Add getFirstNonDebugInstr to complement getLastNonDebugInstr 2015-06-23 14:47:29 +00:00
TargetFrameLoweringImpl.cpp Stop resetting NoFramePointerElim in TargetMachine::resetTargetOptions. 2015-05-23 01:14:08 +00:00
TargetInstrInfo.cpp MachineLICM: Use TargetSchedModel instead of just itineraries 2015-06-13 03:42:11 +00:00
TargetLoweringBase.cpp Eliminate additional redundant copies of Triple objects. NFC. 2015-06-24 13:25:57 +00:00
TargetLoweringObjectFileImpl.cpp Create a MCSymbolELF. 2015-06-02 00:25:12 +00:00
TargetOptionsImpl.cpp Remove NoFramePointerElim and NoFramePointerElimOverride from TargetOptions and 2015-05-26 20:17:20 +00:00
TargetRegisterInfo.cpp
TargetSchedule.cpp Turn effective assert(0) into llvm_unreachable 2015-05-14 18:33:29 +00:00
TwoAddressInstructionPass.cpp MachineInstr: Remove unused parameter. 2015-05-19 21:22:20 +00:00
UnreachableBlockElim.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
VirtRegMap.cpp VirtRegMap: Add undef flag when reading undefined subregisters. 2015-06-16 18:22:28 +00:00
WinEHPrepare.cpp Eliminate additional redundant copies of Triple objects. NFC. 2015-06-24 13:25:57 +00:00

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str r4, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.