Commit Graph

66745 Commits

Author SHA1 Message Date
Rafael Espindola
584fe2db6a Make ObjectFile ownership of the MemoryBuffer optional.
This allows llvm-ar to mmap the input files only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200040 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 21:32:21 +00:00
Juergen Ributzka
96172cb4a4 Add Constant Hoisting Pass
Retry commit r200022 with a fix for the build bot errors. Constant expressions
have (unlike instructions) module scope use lists and therefore may have users
in different functions. The fix is to simply ignore these out-of-function uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200034 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 20:18:00 +00:00
Hal Finkel
86720f7c65 Fix DAGCombiner::GatherAllAliases to account for non-chain dependencies
DAGCombiner::GatherAllAliases, which is only used when AA used is enabled
during DAGCombine, had a fundamentally incorrect assumption for which this
change compensates. GatherAllAliases, which is used to find aliasing
predecessor chain nodes (so that a better chain can be selected for a load or
store to enable subsequent optimizations) assumed that walking up the chain
would always catch all possibly-aliasing loads and stores. This is not true: To
really find all aliases, we also need to search for aliases through the value
operand of a store, etc.  Consider the following situation:

  Token1 = ...
  L1 = load Token1, %52
  S1 = store Token1, L1, %51
  L2 = load Token1, %52+8
  S2 = store Token1, L2, %51+8
  Token2 = Token(S1, S2)
  L3 = load Token2, %53
  S3 = store Token2, L3, %52
  L4 = load Token2, %53+8
  S4 = store Token2, L4, %52+8

If we search for aliases of S3 (which loads address %52), and we look only
through the chain, then we'll miss the trivial dependence on L1 (which loads
from %52). We then might change all loads and stores to use Token1 as their
chain operand, which could result in copying %53 into %52 before copying
%52 into %51 (which should happen first).

The problem is, however, that searching for such data dependencies can become
expensive, and the cost is not directly related to the chain depth. Instead,
we'll rule out such configurations by insisting that we've visited all chain
users (except for users of the original chain, which is not necessary).  When
doing this, we need to look through nodes we don't care about (otherwise,
things like register copies will interfere with trivial use cases).

Unfortunately, I don't have a small test case for this problem. Creating the
underlying situation is not hard (a pair of memcpys will do it), but arranging
for the default instruction schedule to be incorrect is very fragile.

This unbreaks self hosting on PPC64 when using
-mllvm -combiner-global-alias-analysis -mllvm -combiner-alias-analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200033 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 20:12:02 +00:00
Benjamin Kramer
d7053be532 InstCombine: Don't try to use aggregate elements of ConstantExprs.
PR18600.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200028 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 19:02:37 +00:00
Juergen Ributzka
dc6f9b9a4f Revert "Add Constant Hoisting Pass"
This reverts commit r200022 to unbreak the build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200024 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 18:40:30 +00:00
Hal Finkel
08aa5bf1d5 Restrict FindBetterChain DAG combines to unindexed nodes
These transformations obviously won't work for indexed (pre/post-inc) loads and
stores. In practice, I'm not sure there is any benefit to enabling them for
indexed nodes because other transformations that these might enable likely also
won't handle indexed nodes.

I don't have an in-tree test case that hits this problem, but an upcoming bug
fix will make it much more likely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200023 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 18:25:26 +00:00
Juergen Ributzka
fb282c68b7 Add Constant Hoisting Pass
This pass identifies expensive constants to hoist and coalesces them to
better prepare it for SelectionDAG-based code generation. This works around the
limitations of the basic-block-at-a-time approach.

First it scans all instructions for integer constants and calculates its
cost. If the constant can be folded into the instruction (the cost is
TCC_Free) or the cost is just a simple operation (TCC_BASIC), then we don't
consider it expensive and leave it alone. This is the default behavior and
the default implementation of getIntImmCost will always return TCC_Free.

If the cost is more than TCC_BASIC, then the integer constant can't be folded
into the instruction and it might be beneficial to hoist the constant.
Similar constants are coalesced to reduce register pressure and
materialization code.

When a constant is hoisted, it is also hidden behind a bitcast to force it to
be live-out of the basic block. Otherwise the constant would be just
duplicated and each basic block would have its own copy in the SelectionDAG.
The SelectionDAG recognizes such constants as opaque and doesn't perform
certain transformations on them, which would create a new expensive constant.

This optimization is only applied to integer constants in instructions and
simple (this means not nested) constant cast experessions. For example:
%0 = load i64* inttoptr (i64 big_constant to i64*)

Reviewed by Eric

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200022 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 18:23:08 +00:00
Juergen Ributzka
8346f147ab Add final and owerride keywords to TargetTransformInfo's subclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200021 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 18:22:59 +00:00
Alp Toker
ae43cab6ba Fix known typos
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 17:20:08 +00:00
Benjamin Kramer
c166623dcd InstSimplify: Make shift, select and GEP simplifications vector-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200016 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 17:09:53 +00:00
Rafael Espindola
c55979b28d Unify duplicated functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200014 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 16:13:20 +00:00
Rafael Espindola
b0d78d0192 Move emitInlineAsmEnd to the AsmPrinter interface.
There is no inline asm in a .s file. Therefore, there should be no logic to
handle it in the streamer. Inline asm only exists in bitcode files, so the
logic can live in the (long misnamed) AsmPrinter class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200011 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 15:47:54 +00:00
NAKAMURA Takumi
98fd6f18aa DWARFContext: Fix possible memory leak since r198908.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200000 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 13:40:43 +00:00
Eric Christopher
e47a1d72f7 Revert "Use DW_AT_high_pc and DW_AT_low_pc for the high and low pc for a"
in order to fix the cygwin/mingw bots.

This reverts commit r199990.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 11:52:53 +00:00
Eric Christopher
a268ba84d7 Use DW_AT_high_pc and DW_AT_low_pc for the high and low pc for a
compile unit. Make these relocations on the platforms that need
relocations and add a routine to ensure that we don't put the
addresses in an offset table for split dwarf.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199990 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 11:40:29 +00:00
Kevin Qin
b1fadec968 [AArch64 NEON] Fix a bug in implementing register copy bwtween FPR16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199978 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 07:53:04 +00:00
Venkatraman Govindaraju
dd38992ae8 [SparcV9] Add support for JIT in Sparc64.
With this change, all supported tests in test/ExecutionEngine pass in sparcv9.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199977 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 07:10:19 +00:00
Juergen Ributzka
fe08a38a2c [X86] Prevent the creation of redundant ops for sadd and ssub with overflow.
This commit teaches the X86 backend to create the same X86 instructions when it
lowers an sadd/ssub with overflow intrinsic and a conditional branch that uses
that overflow result. This allows SelectionDAG to recognize and remove one of
the redundant operations.

This fixes <rdar://problem/15874016> and <rdar://problem/15661073>.

Reviewed by Nadav

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199976 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 06:47:57 +00:00
Jakob Stoklund Olesen
c30791627e Implement atomicrmw operations in 32 and 64 bits for SPARCv9.
These all use the compare-and-swap CASA/CASXA instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199975 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 06:23:31 +00:00
Venkatraman Govindaraju
8c6a26194b [Sparc] Correct quad register list in the asm parser.
Add test cases to check parsing of v9 double registers and their aliased quad registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199974 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 05:24:01 +00:00
Rafael Espindola
a1f7c26cc8 Simplify the logic for deciding when to initialize the sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199971 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 03:54:40 +00:00
Rafael Espindola
b385559db9 Most streamers' InitSections just create a text section. Make that the default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199969 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 02:42:26 +00:00
Rafael Espindola
61e4d529fe Use the actual .text section, it is less code than building a dummy one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199968 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 02:31:35 +00:00
Rafael Espindola
c5b61da308 Inline trivial functions called only once or twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199967 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 02:28:11 +00:00
Chandler Carruth
4296ce5662 [LPM] Fix a logic error in LICM spotted by inspection.
We completely skipped promotion in LICM if the loop has a preheader or
dedicated exits, but not *both*. We hoist if there is a preheader, and
sink if there are dedicated exits, but either hoisting or sinking can
move loop invariant code out of the loop!

I have no idea if this has a practical consequence. If anyone has ideas
for a test case, let me know.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199966 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 02:24:47 +00:00
Rafael Espindola
5950c6fa48 Inline functions that are only called once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199965 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 02:18:40 +00:00
Chandler Carruth
42e23de4db [cleanup] Use the type-based preservation method rather than a string
literal that bakes a pass name and forces parsing it in the pass
manager.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199963 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 01:59:49 +00:00
Rafael Espindola
3a89110b6e InitToTextSection is redundant with InitSections. Remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199955 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 23:14:14 +00:00
Eric Christopher
2f9fe10f6f Make the use of DW_AT_ranges in the compile unit depend also upon
the existence of comdat/special sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199954 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 22:55:47 +00:00
Rafael Espindola
e0fd567df0 Remove duplicated info on what .text, .data and .bss look like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199951 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 22:49:25 +00:00
Kevin Enderby
7772f9af13 Update the X86 assembler for .intel_syntax to produce an error for invalid base
registers in memory addresses that do not match the index register. As it does
for .att_syntax.

rdar://15887380


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199948 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 22:34:42 +00:00
Kevin Enderby
2f49a7b24b Update the X86 assembler for .intel_syntax to produce an error for invalid
scale factors in memory addresses. As it does for .att_syntax.

It was producing:
Assertion failed: (((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) && "Invalid scale!"), function CreateMem, file /Volumes/SandBox/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp, line 1133.

rdar://14967214


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199942 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 21:52:41 +00:00
Eric Christopher
22221ee0e3 Fix out of bounds access to the double regs array. Given the
code this looks correct, but could use review. The previous
was definitely not correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199940 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 21:41:10 +00:00
Lang Hames
6f1f795717 Add a few missing cases from r199933. Testcase coming shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199938 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 21:27:27 +00:00
Lang Hames
d8f4348cab Replace vfmaddxx213 instructions with their 231-type equivalents in accumulator
loops. Writing back to the accumulator (231-type) allows the coalescer to
eliminate an extra copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199933 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 20:23:36 +00:00
Weiming Zhao
ebcaef4340 [Thumbv8] Fix the value of BLXOperandIndex of isV8EligibleForIT
Originally, BLX was passed as operand #0 in MachineInstr and as operand
#2 in MCInst. But now, it's operand #2 in both cases.

This patch also removes unnecessary FileCheck in the test case added by r199127.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199928 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 19:55:33 +00:00
Juergen Ributzka
9ce88db752 Add target analysis passes to the codegen pipeline for MCJIT.
This patch adds the target analysis passes (usually TargetTransformInfo) to the
codgen pipeline. We also expose now the AddAnalysisPasses method through the C
API, because the optimizer passes would also benefit from better target-specific
cost models.

Reviewed by Andrew Kaylor

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199926 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 19:23:28 +00:00
Ana Pazos
a8aa6c3940 [AArch64] Added vselect patterns with float and double types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199925 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 19:18:57 +00:00
Eric Christopher
c3b4897c4c Avoid emitting a DWARF type attribute for an ObjC property of type
void.

Patch by Scott Talbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199924 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 19:16:28 +00:00
Tom Stellard
63875e620f R600: Remove successive JUMP in AnalyzeBranch when AllowModify is true
This fixes a crash in the OpenCV OpenCL test suite.

There is no lit test for this, because the test would be very large
and could easily be invalidated by changes to the scheduler
or other parts of the compiler.

Patch by:  Vincent Lejeune

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199919 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 18:49:34 +00:00
Tom Stellard
35f321dde5 R600: Disable the BFE pattern
This pattern uses an SDNodeXForm, which isn't being emitted for some
reason.  I can get it to work by attaching the PatLeaf that has the
XForm to the argument in the output pattern, but this results in an
immediate being used in a register operand, which the backend can't
handle yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199918 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 18:49:33 +00:00
Tom Stellard
cbf79028c3 R600: Correctly handle vertex fetch clauses the precede ENDIFs
The control flow finalizer would sometimes use an ALU_POP_AFTER
instruction before the vetex fetch clause instead of using a POP
instruction after it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199917 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 18:49:31 +00:00
Tom Stellard
01df2fa3c4 R600: Unconditionally unroll loops that contain GEPs with alloca pointers
Implement the getUnrollingPreferences() function for
AMDGPUTargetTransformInfo so that loops that do address calculations
on pointers derived from alloca are unconditionally unrolled.

Unrolling these loops makes it more likely that SROA will be able to
eliminate the allocas, which is a big win for R600 since memory
allocated by alloca (private memory) is really slow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199916 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 18:49:28 +00:00
Rafael Espindola
35b78fd04c Remove tail marker when changing an argument to an alloca.
Argument promotion can replace an argument of a call with an alloca. This
requires clearing the tail marker as it is very likely that the callee is now
using an alloca in the caller.

This fixes pr14710.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199909 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 17:19:42 +00:00
Tom Stellard
7d3b9d96b6 R600: Recommit 199842: Add work-around for the CF stack entry HW bug
The unit test is now disabled on non-asserts builds.

The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE,
CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of
sub-entries on the stack is greater than or equal to the stack entry
size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is
present when number of sub-entries module 8 is either 7 or 0)

We choose to be conservative and always apply the work-around when the
number of sub-enries is greater than or equal to the stack entry size,
so that we can safely over-allocate the stack when we are unsure of the
stack allocation rules.

reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199905 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 16:18:02 +00:00
Elena Demikhovsky
e1a621d84f AVX-512: added VPERM2D VPERM2Q VPERM2PS VPERM2PD instructions,
they give better sequences than VPERMI


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199893 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 14:27:26 +00:00
Tim Northover
1334acd8c6 ARM: use litpools for normal i32 imms when compiling minsize.
With constant-sharing, litpool loads consume 4 + N*2 bytes of code, but
movw/movt pairs consume 8*N. This means litpools are better than movw/movt even
with just one use. Other materialisation strategies can still be better though,
so the logic is a little odd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199891 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 13:43:47 +00:00
Artyom Skrobov
93681fa6c6 Prevent repetitive warnings for unrecognized processors and features
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199886 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 11:31:38 +00:00
Chandler Carruth
aaf44af769 [LPM] Make LoopSimplify no longer a LoopPass and instead both a utility
function and a FunctionPass.

This has many benefits. The motivating use case was to be able to
compute function analysis passes *after* running LoopSimplify (to avoid
invalidating them) and then to run other passes which require
LoopSimplify. Specifically passes like unrolling and vectorization are
critical to wire up to BranchProbabilityInfo and BlockFrequencyInfo so
that they can be profile aware. For the LoopVectorize pass the only
things in the way are LoopSimplify and LCSSA. This fixes LoopSimplify
and LCSSA is next on my list.

There are also a bunch of other benefits of doing this:
- It is now very feasible to make more passes *preserve* LoopSimplify
  because they can simply run it after changing a loop. Because
  subsequence passes can assume LoopSimplify is preserved we can reduce
  the runs of this pass to the times when we actually mutate a loop
  structure.
- The new pass manager should be able to more easily support loop passes
  factored in this way.
- We can at long, long last observe that LoopSimplify is preserved
  across SCEV. This *halves* the number of times we run LoopSimplify!!!

Now, getting here wasn't trivial. First off, the interfaces used by
LoopSimplify are all over the map regarding how analysis are updated. We
end up with weird "pass" parameters as a consequence. I'll try to clean
at least some of this up later -- I'll have to have it all clean for the
new pass manager.

Next up I discovered a really frustrating bug. LoopUnroll *claims* to
preserve LoopSimplify. That's actually a lie. But the way the
LoopPassManager ends up running the passes, it always ran LoopSimplify
on the unrolled-into loop, rectifying this oversight before any
verification could kick in and point out that in fact nothing was
preserved. So I've added code to the unroller to *actually* simplify the
surrounding loop when it succeeds at unrolling.

The only functional change in the test suite is that we now catch a case
that was previously missed because SCEV and other loop transforms see
their containing loops as simplified and thus don't miss some
opportunities. One test case has been converted to check that we catch
this case rather than checking that we miss it but at least don't get
the wrong answer.

Note that I have #if-ed out all of the verification logic in
LoopSimplify! This is a temporary workaround while extracting these bits
from the LoopPassManager. Currently, there is no way to have a pass in
the LoopPassManager which preserves LoopSimplify along with one which
does not. The LPM will try to verify on each loop in the nest that
LoopSimplify holds but the now-Function-pass cannot distinguish what
loop is being verified and so must try to verify all of them. The inner
most loop is clearly no longer simplified as there is a pass which
didn't even *attempt* to preserve it. =/ Once I get LCSSA out (and maybe
LoopVectorize and some other fixes) I'll be able to re-enable this check
and catch any places where we are still failing to preserve
LoopSimplify. If this causes problems I can back this out and try to
commit *all* of this at once, but so far this seems to work and allow
much more incremental progress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199884 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 11:23:19 +00:00
Daniel Sanders
5e95e642e9 [mips][sched] Split IIStore into II_S[BHWD], II_S[WD][LR], and II_SAVE
No functional change since the InstrItinData's have been duplicated.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199876 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 10:31:31 +00:00