Nate Begeman
5922f561c6
Tabs -> spaces
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Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48351 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 00:53:31 +00:00
Evan Cheng
db2d773fe6
Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 00:14:55 +00:00
Dan Gohman
002e5d0a17
More APInt-ification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 22:13:53 +00:00
Evan Cheng
c438f35df9
Undo tweak. It had no obvious benefit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48341 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 17:42:48 +00:00
Evan Cheng
a2248682ae
Typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48337 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 08:04:35 +00:00
Evan Cheng
0099ae2468
Don't try to sink 3-address instruction if convertToThreeAddress created more than one instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48336 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 07:56:58 +00:00
Evan Cheng
f3ff6992a3
Remove an unused command line option.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48334 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 06:38:28 +00:00
Evan Cheng
875357d213
TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48333 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 06:37:55 +00:00
Christopher Lamb
6634e26aa1
Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
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Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 05:47:01 +00:00
Evan Cheng
1c9b8cf28c
Remove unused options.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48319 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 02:41:34 +00:00
Evan Cheng
b27087f5aa
Refactor some code out of MachineSink into a MachineInstr query.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48311 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 00:44:09 +00:00
Evan Cheng
9e23336d0c
Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
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entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1028<def> = MOV32rr %EAX
%reg1029<def> = MOV32rr %EDX
%reg1030<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
%reg1025<def> = MOV32rr %reg1029
%reg1026<def> = MOV32rr %reg1030
%reg1024<def> = MOV32rr %reg1028
The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.
With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1024<def> = MOV32rr %EAX
%reg1025<def> = MOV32rr %EDX
%reg1026<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]
Much better!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 22:19:41 +00:00
Duncan Sands
d8742eeb2f
Initial soft-float support for LegalizeTypes. I rewrote
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the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit... I also generalized it to work for
any sized floating point types, and removed the bogosity:
SDOperand Mask1 = (SrcVT == MVT::f64)
? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
: DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant! So I just
generate this integer constant directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48305 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 21:27:04 +00:00
Dan Gohman
b576931ca2
Change VirtRegMap's dump to dump to cerr, not DOUT, so that it
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can be called from within a debuger without having -debug specified
on the command-line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48298 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:52:10 +00:00
Dan Gohman
39e33acf0a
Fix typos in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48297 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:50:04 +00:00
Duncan Sands
87a8615015
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48295 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:35:19 +00:00
Duncan Sands
25eb043759
Don't try to extract an i32 from an f64. This
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getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure. In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers. Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:30:08 +00:00
Evan Cheng
c8e3b147ee
Clean up my own mess.
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X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 07:02:50 +00:00
Owen Anderson
dfd07eab24
We also need to collect the VN IDs for the PHI instructions for later updating.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48278 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 04:22:57 +00:00
Owen Anderson
0031671b41
When we're determining what registers to coallesce, track the VNInfo IDs for the definitions that
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feed the PHI instructions. We'll need these IDs in order to update LiveIntervals properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 03:13:29 +00:00
Evan Cheng
0cec956d81
Total brain cramp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48274 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 02:05:05 +00:00
Evan Cheng
17d5f5496c
Set NextMII after issuing a physical register spill.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48263 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 00:14:07 +00:00
Evan Cheng
4191b96f41
Minor debug output bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48261 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 00:02:46 +00:00
Anton Korobeynikov
4d86e2a6b8
Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 22:38:53 +00:00
Dan Gohman
bfae83139d
Use PassManagerBase instead of FunctionPassManager for functions
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that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 22:29:46 +00:00
Anton Korobeynikov
22c9e65643
Honour aliases visibility during asm emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:41:14 +00:00
Evan Cheng
c1f53c7426
Transfer physical register spill info when load / store folding happens.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48246 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:34:46 +00:00
Dan Gohman
9736028d84
Use the correct value for InSignBit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:29:43 +00:00
Dan Gohman
ef5d194aaa
Initial codegen support for functions and calls with multiple return values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48244 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:11:25 +00:00
Christopher Lamb
1fab4a6bbb
Recommitting parts of r48130. These do not appear to cause the observed failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 10:09:17 +00:00
Evan Cheng
ea2378138f
Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48221 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:55:13 +00:00
Evan Cheng
676dd7c80b
When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:19:34 +00:00
Duncan Sands
ac7613a326
Some LegalizeTypes code factorization and minor
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enhancements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48215 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 06:41:14 +00:00
Chris Lattner
5d03f21744
compile: double test() {}
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into:
_test:
fldz
ret
instead of:
_test:
subl $12, %esp
#IMPLICIT_DEF %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48213 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 06:21:08 +00:00
Chris Lattner
c5733ac5d3
variadic instructions don't have operand info for variadic arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48208 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 03:14:42 +00:00
Dan Gohman
034f60ed24
Generalize ExpandIntToFP to handle the case where the operand is legal
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and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 01:59:03 +00:00
Chris Lattner
b779580100
If a register operand comes from the variadic part of a node, don't
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verify the register constraint matches what the instruction expects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48205 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 00:59:28 +00:00
Evan Cheng
524f961742
Temporarily revert 48175.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48204 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 00:27:34 +00:00
Dan Gohman
6cf9b8adf4
More APInt-ification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48201 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 00:11:06 +00:00
Dan Gohman
45f36ea448
Correctly clone FlaggedNodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48196 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:48:14 +00:00
Dan Gohman
f25275cb3c
APInt-ify this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48194 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:38:17 +00:00
Dan Gohman
a2e9485e34
Implement more support for fp-to-i128 and i128-to-fp conversions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:03:31 +00:00
Evan Cheng
a3413804f4
If the register allocator ran out of registers, just abort for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48175 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 21:27:20 +00:00
Dan Gohman
76c605b18e
Fix mul expansion to check the correct number of bits for
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zero extension when checking if an unsigned multiply is
safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 20:42:19 +00:00
Evan Cheng
62fcc41d95
Somewhat better solution.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48170 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:58:22 +00:00
Evan Cheng
d2cde68855
Default ISD::PREFETCH to expand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:38:10 +00:00
Evan Cheng
4499e495ea
Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:31:26 +00:00
Scott Michel
5b8f82e35b
Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
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return ValueType can depend its operands' ValueType.
This is a cosmetic change, no functionality impacted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 15:42:14 +00:00
Bill Wendling
074223a124
Minor cleanup. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48142 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 08:13:01 +00:00
Evan Cheng
4ff3f1cc57
- Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy.
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If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.
A = or A, B
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B = A
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C = A<kill>
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= B
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48141 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 08:11:32 +00:00