Tobias Grosser
592316c419
RegionInfo: Update RegionInfo after a BB was split.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116398 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 05:54:13 +00:00
Tobias Grosser
c69bd733c0
RegioInfo: Add getExpandedRegion().
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getExpandedRegion() enables us to create non canonical regions. Those regions
can be used to define the largerst region, that fullfills a certain property.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116397 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 05:54:11 +00:00
Tobias Grosser
4bcc0228dc
RegionInfo: Allow to update exit and entry of a region.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 05:54:10 +00:00
Tobias Grosser
9649390e1f
RegionInfo: Enhance addSubregion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116395 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 05:54:09 +00:00
Tobias Grosser
9ee5c50776
RegionInfo: Allow to set the parent region of a basic block.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 05:54:07 +00:00
Rafael Espindola
6688c4a742
Fix PR8313 by changing ValueToValueMap use a TrackingVH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116390 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 02:08:17 +00:00
Evan Cheng
14ce175216
Limit load / store issues (at least until we have a true multi-issue aware scheduler).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 01:54:21 +00:00
Rafael Espindola
1ed219a9d2
Be more consistent in using ValueToValueMapTy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116387 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 01:36:30 +00:00
Bill Wendling
6932643a37
Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test
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just yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 01:17:33 +00:00
Bill Wendling
54908dd72b
Add encodings for VCVT instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116385 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 00:56:35 +00:00
Jim Grosbach
89c898f8af
Add ARM encoding information for comparisons, forced-cc-out arithmetics, and
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arithmetic-with-carry-in instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 00:50:27 +00:00
Bill Wendling
1fc6d8837f
Add VCMPZ and VABS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 00:38:07 +00:00
Tobias Grosser
67be08a2f1
RegionInfo: Free the RegionNodes in cache.
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Contributed by: ether
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 00:07:59 +00:00
Bill Wendling
cd77686254
Refactor VCMP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116379 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 00:04:29 +00:00
Jim Grosbach
ef324d7044
Add the rest of the ARM so_reg encoding options (register shifted register)
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and move to a custom operand encoder. Remove the last of the special handling
stuff from ARMMCCodeEmitter::EncodeInstruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 23:53:58 +00:00
Bill Wendling
5a1fd8cf68
Add encodings for VNMUL[SD].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 23:47:37 +00:00
Bill Wendling
caa3d467ab
Add encodings for VDIV and VMUL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116370 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 23:22:27 +00:00
Evan Cheng
3f490f3469
Turn some fp stackifier assertion into errors to avoid silently generating bad code when assertions are off. rdar://8540457.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116368 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 23:19:28 +00:00
Jim Grosbach
2a6a93d542
Move the ARM so_imm encoding into a custom operand encoder and remove the
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explicit handling of the instructions referencing it from the MC code
emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116367 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 23:18:08 +00:00
Bill Wendling
52061f83e7
Refactor some of the encoding logic into a base class. This keeps us from having
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to add 10+ lines to every instruction.
It may turn out that we can move this base class into it's parent class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116362 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 23:06:54 +00:00
Jim Grosbach
08bd54987f
Add custom encoder for the 's' bit denoting whether an ARM arithmetic
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instruction should set the processor status flags or not. Remove the now
unnecessary special handling for the bit from the MCCodeEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 23:00:24 +00:00
Bill Wendling
dd3bc112e6
Add encoding for VSUB and VCMP.
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Fear not! I'm going to try a refactoring right now. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116359 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 22:55:35 +00:00
Bill Wendling
174777bb2b
Encoding for VADDD. Plus a test for the VFP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 22:08:41 +00:00
Bill Wendling
a0c14ef8f6
Split out the "size" field from the encoding. The newer documentation has it as
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a separate bit in the coding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 22:03:19 +00:00
Eric Christopher
558cf007b5
Fix thinko in arm fast isel alloca rewrite.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116339 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 21:23:43 +00:00
Jim Grosbach
499e886fe6
Encoding for ARM-mode VADD.F32 instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 21:22:40 +00:00
Owen Anderson
2ab36d3502
Begin adding static dependence information to passes, which will allow us to
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perform initialization without static constructors AND without explicit initialization
by the client. For the moment, passes are required to initialize both their
(potential) dependencies and any passes they preserve. I hope to be able to relax
the latter requirement in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 19:48:12 +00:00
Eric Christopher
52b45056b2
Combine these together - should probably have some text associated
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that says what why what we just asserted is wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 19:44:17 +00:00
Nick Lewycky
65b65d6ca4
Mark variable 'NoImplicitFloatOps' used only in an assert as used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 18:18:03 +00:00
Jim Grosbach
f59818b81a
Add MOVi ARM encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116321 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 18:09:12 +00:00
Dan Gohman
320afb8c81
Initial va_arg support for x86-64. Patch by David Meyer!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116319 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 18:00:49 +00:00
Jim Grosbach
8e157302f4
Nuke unused wrapper function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116318 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 17:53:25 +00:00
Jakob Stoklund Olesen
d0eeeeb558
Remove the x86 MOV{32,64}{rr,rm,mr}_TC instructions.
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The reg-reg copies were no longer being generated since copyPhysReg copies
physical registers only.
The loads and stores are not necessary - The TC constraint is imposed by the
TAILJMP and TCRETURN instructions, there should be no need for constrained loads
and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116314 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 17:15:00 +00:00
Jim Grosbach
0de6ab3c43
Add encoding information for the remainder of the generic arithmetic
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ARM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 17:11:26 +00:00
Bob Wilson
77f42b5278
PR8359: The ARM backend may end up allocating registers D16 to D31 when
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"-mattr=+vfp3" is specified. However, this will not work for hardware that
only supports 16 registers. Add a new flag to support -"mattr=+vfp3,+d16".
Patch by Jan Voung!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 16:22:47 +00:00
Eric Christopher
1541877941
Rework alloca handling so that we can load or store from casted
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address that we've looked through.
Fixes compilation problems in tramp3d from earlier patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116296 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 05:39:06 +00:00
Eric Christopher
5532433a57
Handle a wider arrangement of loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116284 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 00:43:21 +00:00
Dan Gohman
624218f5b4
Delete a redundant check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 00:19:24 +00:00
Dan Gohman
9b0e47efc6
More SmallVectorImpls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 00:15:27 +00:00
Dan Gohman
8de206c101
Shrink a SmallVector with a known maximum size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 00:13:43 +00:00
Dan Gohman
568a63db96
Constify.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116277 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 00:12:29 +00:00
Dan Gohman
ebb1834e86
Use SmallVectorImpl in a bunch of places.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 00:11:18 +00:00
Evan Cheng
08cec1ef27
More ARM scheduling itinerary fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116266 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 23:41:41 +00:00
Dan Gohman
633e702317
Support AA chaining.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116264 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 23:39:34 +00:00
Dan Gohman
7c34730fb9
Fix the pass manager's search order for immutable passes, and make it
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stop searching when it has found a match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 23:19:01 +00:00
Jim Grosbach
42fac8ee3b
MC machine encoding for simple aritmetic instructions that use a shifted
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register operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 23:16:21 +00:00
Jason W Kim
17b443df43
Second set of ARM/MC/ELF changes.
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Added ARM specific ELF section types.
Added AttributesSection to ARMElfTargetObject
First step in unifying .cpu assembly tag with ELF/.o
llc now asserts on actual ELF emission on -filetype=obj :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116257 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 23:01:44 +00:00
Evan Cheng
60ff87914f
Proper VST scheduling itineraries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 22:03:18 +00:00
Eric Christopher
5f9e8b971b
Use a sane mechanism for that assert.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116249 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 22:01:22 +00:00
Jakob Stoklund Olesen
31cc3ec330
Replace FindLiveRangeContaining() with getVNInfoAt() in LiveIntervalAnalysis.
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This helps hiding the LiveRange class which really should be private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116244 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 21:45:03 +00:00