Commit Graph

91067 Commits

Author SHA1 Message Date
Hal Finkel
59889f7f49 Cleanup and improve PPC fsel generation
First, we should not cheat: fsel-based lowering of select_cc is a
finite-math-only optimization (the ISA manual, section F.3 of v2.06, makes
this clear, as does a note in our own README).

This also adds fsel-based lowering of EQ and NE condition codes. As it turned
out, fsel generation was covered by a grand total of zero regression test
cases. I've added some test cases to cover the existing behavior (which is now
finite-math only), as well as the new EQ cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179000 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 22:11:09 +00:00
Arnold Schwaighofer
cd3d60c450 TargetLowering: Fix getTypeConversion handling of extended vector types
The code in getTypeConversion attempts to promote the element vector type
before it trys to split or widen the vector.
After it failed finding a legal vector type by promoting it would continue using
the promoted vector element type. Thereby missing legal splitted vector types.
For example the type v32i32 that has a legal split of 4 x v3i32 on x86/sse2
would be transformed to: v32i256 and from there on successively split to:
v16i256, v8i256, v1i256 and then finally ends up as an i64 type.
By resetting the vector element type to the original vector element type that
existed before the promotion the code will attempt to split the vector type to
smaller vector widths of the same type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 20:22:56 +00:00
Rafael Espindola
8764c8979c Make MachOObjectFile independent from MachOObject.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 20:01:29 +00:00
Rafael Espindola
f1cc8001fd Implement MachOObjectFile::getData directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178997 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 19:42:15 +00:00
Rafael Espindola
49698a1e69 Implement MachOObjectFile::is64Bit directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178996 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 19:38:15 +00:00
Rafael Espindola
c90cc18b6a Implement MachOObjectFile::getHeaderSize directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178995 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 19:31:49 +00:00
Rafael Espindola
433611bdf3 Implement MachOObjectFile::getHeader directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178994 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 19:26:57 +00:00
Jakob Stoklund Olesen
18fdb398ea Implement LowerCall_64 for the SPARC v9 64-bit ABI.
There is still no support for byval arguments (which I don't think are
needed) and varargs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178993 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 19:10:57 +00:00
Rafael Espindola
0f08eb1359 Implement MachOObjectFile::getHeaderSize and MachOObjectFile::getData.
These were the last missing forwarding functions. Also consistently use
the forwarding functions instead of using MachOObj directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178992 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 19:05:30 +00:00
Rafael Espindola
6ab85a81d7 Remove LoadCommandInfo now that we always have a pointer to the command.
LoadCommandInfo was needed to keep a command and its offset in the file. Now
that we always have a pointer to the command, we don't need the offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 18:42:06 +00:00
Rafael Espindola
77638d9110 Add MachOObjectFile::LoadCommandInfo.
This avoids using MachOObject::getLoadCommandInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178990 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 18:08:12 +00:00
Rafael Espindola
f305127f0b Use getLoadCommandInfo instead of MachOObj->getLoadCommandInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178989 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 17:41:59 +00:00
Rafael Espindola
6f1f33915a Construct MachOObject in MachOObjectFile's constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 16:58:48 +00:00
Rafael Espindola
2c6f997290 Remove unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178987 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 16:40:00 +00:00
Rafael Espindola
3eff318cba Remove MachOObjectFile::getObject.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178986 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 16:07:35 +00:00
Rafael Espindola
0be4eafd9c Remove two uses of getObject.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 15:46:05 +00:00
Rafael Espindola
1efa60453b Remove usage of InMemoryStruct in getSymbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178984 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 15:35:18 +00:00
Hal Finkel
6e43efe071 PPC Altivec load/store intrinsics can be marked IntrRead[Write]ArgMem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 15:32:40 +00:00
Hal Finkel
946a811ef1 PPC rotate instructions don't have unmodeled side effcts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178982 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 15:06:53 +00:00
Rafael Espindola
7ea2e48694 Remove a use of InMemoryStruct in llvm-readobj.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178981 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 15:05:12 +00:00
Rafael Espindola
305b826f92 Make getObject const. Remove a const_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178980 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 14:50:40 +00:00
Rafael Espindola
196abbffe9 Remove last use of InMemoryStruct in llvm-objdump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178979 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 14:40:18 +00:00
Hal Finkel
f0e3ca012b Most PPC M[TF]CR instructions do not have side effects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178978 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 14:33:13 +00:00
Rafael Espindola
13d297260f Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178977 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 14:30:21 +00:00
Rafael Espindola
eb721c0fbd Remove unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 14:25:39 +00:00
Chandler Carruth
05c7e7f99d Fix PR15674 (and PR15603): a SROA think-o.
The fix for PR14972 in r177055 introduced a real think-o in the *store*
side, likely because I was much more focused on the load side. While we
can arbitrarily widen (or narrow) a loaded value, we can't arbitrarily
widen a value to be stored, as that changes the width of memory access!
Lock down the code path in the store rewriting which would do this to
only handle the intended circumstance.

All of the existing tests continue to pass, and I've added a test from
the PR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178974 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 11:47:54 +00:00
Hal Finkel
3aea7cb7b2 PPC pre-increment load instructions do not have side effects
A few were missed in r178972.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 06:30:47 +00:00
Hal Finkel
fa1d102a05 PPC pre-increment load instructions do not have side effects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178972 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 05:46:58 +00:00
Hal Finkel
aecbe24268 PPC MCRF instruction does not have side effects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 05:16:57 +00:00
Hal Finkel
fa1cac2a1e PPC FMR instruction does not have side effects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178970 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 04:56:16 +00:00
Eric Christopher
9a9e73b47d DW_FORM_sec_offset should be a relocation on platforms that use
a relocation across sections. Do this for DW_AT_stmt list in the
skeleton CU and check the relocations in the debug_info section.

Add a FIXME for multiple CUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178969 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 03:43:09 +00:00
Reid Kleckner
16f1969328 [cmake] Avoid rel+asserts warnings when passing -UNDEBUG
MSVC 2012 gives warning D9025, "overriding /D NDEBUG with -UNDEBUG".
Removing the original definition of NDEBUG silences this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-07 01:45:01 +00:00
Jakob Stoklund Olesen
53d4bcf35e Implement LowerReturn_64 for SPARC v9.
Integer return values are sign or zero extended by the callee, and
structs up to 32 bytes in size can be returned in registers.

The CC_Sparc64 CallingConv definition is shared between
LowerFormalArguments_64 and LowerReturn_64. Function arguments and
return values are passed in the same registers.

The inreg flag is also used for return values. This is required to handle
C functions returning structs containing floats and ints:

  struct ifp {
    int i;
    float f;
  };

  struct ifp f(void);

LLVM IR:

  define inreg { i32, float } @f() {
     ...
     ret { i32, float } %retval
  }

The ABI requires that %retval.i is returned in the high bits of %i0
while %retval.f goes in %f1.

Without the inreg return value attribute, %retval.i would go in %i0 and
%retval.f would go in %f3 which is a more efficient way of returning
%multiple values, but it is not ABI compliant for returning C structs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178966 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 23:57:33 +00:00
Jakob Stoklund Olesen
2b9355f2d9 SPARC v9 stack pointer bias.
64-bit SPARC v9 processes use biased stack and frame pointers, so the
current function's stack frame is located at %sp+BIAS .. %fp+BIAS where
BIAS = 2047.

This makes more local variables directly accessible via [%fp+simm13]
addressing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178965 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 21:38:57 +00:00
Hal Finkel
839b909653 Implement PPCInstrInfo::FoldImmediate
There are certain PPC instructions into which we can fold a zero immediate
operand. We can detect such cases by looking at the register class required
by the using operand (so long as it is not otherwise constrained).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178961 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 19:30:30 +00:00
Hal Finkel
012ffd5605 PPC ISEL is a select and never has side effects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178960 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 19:30:28 +00:00
Hal Finkel
a36119beec Add a comment to TargetInstrInfo about FoldImmediate
This comment documents the current behavior of the ARM implementation of this
callback, and also the soon-to-be-committed PPC version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178959 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 19:30:20 +00:00
Jakob Stoklund Olesen
1f25fe5023 Complete formal arguments for the SPARC v9 64-bit ABI.
All arguments are formally assigned to stack positions and then promoted
to floating point and integer registers. Since there are more floating
point registers than integer registers, this can cause situations where
floating point arguments are assigned to registers after integer
arguments that where assigned to the stack.

Use the inreg flag to indicate 32-bit fragments of structs containing
both float and int members.

The three-way shadowing between stack, integer, and floating point
registers requires custom argument lowering. The good news is that
return values are passed in the exact same way, and we can share the
code.

Still missing:

 - Update LowerReturn to handle structs returned in registers.
 - LowerCall.
 - Variadic functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178958 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 18:32:12 +00:00
Nadav Rotem
6e01dcbb73 typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178949 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 04:24:12 +00:00
Rafael Espindola
68d287d19e Remove last use of InMemoryStruct from MachOObjectFile.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178948 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 03:50:05 +00:00
Rafael Espindola
82a21077a0 Don't use InMemoryStruct<macho::SymtabLoadCommand>.
This also required not using the RegisterStringTable API, which is also a
good thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178947 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 03:31:08 +00:00
Rafael Espindola
05b5bdd024 Don't use InMemoryStruct in getSymbol64TableEntry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178946 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 02:15:44 +00:00
Rafael Espindola
00555c13be Don't use InMemoryStruct in getSymbolTableEntry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178945 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 01:59:05 +00:00
Rafael Espindola
5cf0f51ae6 Don't use InMemoryStruct in getRelocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178943 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 01:24:11 +00:00
Manman Ren
5044a9395a Dwarf: use utostr on CUID to append to SmallString.
We used to do "SmallString += CUID", which is incorrect, since CUID will
be truncated to a char.

rdar://problem/13573833


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06 01:02:38 +00:00
Michael Gottesman
310f2665e8 Removed trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 23:46:45 +00:00
Tom Stellard
17ea10cb79 R600/SI: Add support for buffer stores v2
v2:
  - Use the ADDR64 bit

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178931 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 23:31:51 +00:00
Tom Stellard
e340b7728a R600/SI: Use same names for corresponding MUBUF operands and encoding fields
The code emitter knows how to encode operands whose name matches one of
the encoding fields.  If there is no match, the code emitter relies on
the order of the operand and field definitions to determine how operands
should be encoding.  Matching by order makes it easy to accidentally break
the instruction encodings, so we prefer to match by name.

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178930 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 23:31:44 +00:00
Tom Stellard
99eb040c02 R600: Add RV670 processor
This is an R600 GPU with double support.

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 23:31:40 +00:00
Tom Stellard
2a4d3e7e87 R600/SI: Add processor types for each SI variant
Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 23:31:35 +00:00