Commit Graph

4176 Commits

Author SHA1 Message Date
Chris Lattner
59e84258cb implement promotion of select and select_cc, allowing MallocBench/gs to
work with type promotion on x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43025 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-16 03:00:22 +00:00
Dan Gohman
c4c9660129 Teach IntrinsicLowering.cpp about the sin, cos, and pow intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43020 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 22:07:31 +00:00
Evan Cheng
4859e277f7 Make CalcLatency() non-recursive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43017 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 21:33:22 +00:00
Evan Cheng
f5c7359afa Fix PR1729: watch out for val# with no def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42996 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 18:33:50 +00:00
Chris Lattner
85dd3be735 Move CreateStackTemporary out to SelectionDAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42995 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 17:48:57 +00:00
Chris Lattner
37ce9df0da add a new CreateStackTemporary helper method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42994 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 17:47:20 +00:00
Chris Lattner
cfc24007b1 implement promotion of BR_CC operands, fixing bisort on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42992 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 17:16:12 +00:00
Chris Lattner
1296e9d306 updates from duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42991 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 16:46:29 +00:00
Duncan Sands
65f8d3bf6b Fix some typos. Call getTypeToTransformTo rather than
getTypeToExpandTo.  The difference is that
getTypeToExpandTo gives the final result of expansion
(eg: i128 -> i32 on a 32 bit machine) while
getTypeToTransformTo does just one step (i128 -> i64).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42982 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 13:30:18 +00:00
Chris Lattner
01d029b82c One mundane change: Change ReplaceAllUsesOfValueWith to *optionally*
take a deleted nodes vector, instead of requiring it.

One more significant change:  Implement the start of a legalizer that
just works on types.  This legalizer is designed to run before the 
operation legalizer and ensure just that the input dag is transformed
into an output dag whose operand and result types are all legal, even
if the operations on those types are not.

This design/impl has the following advantages:

1. When finished, this will *significantly* reduce the amount of code in
   LegalizeDAG.cpp.  It will remove all the code related to promotion and
   expansion as well as splitting and scalarizing vectors.
2. The new code is very simple, idiomatic, and modular: unlike 
   LegalizeDAG.cpp, it has no 3000 line long functions. :)
3. The implementation is completely iterative instead of recursive, good
   for hacking on large dags without blowing out your stack.
4. The implementation updates nodes in place when possible instead of 
   deallocating and reallocating the entire graph that points to some 
   mutated node.
5. The code nicely separates out handling of operations with invalid 
   results from operations with invalid operands, making some cases
   simpler and easier to understand.
6. The new -debug-only=legalize-types option is very very handy :), 
   allowing you to easily understand what legalize types is doing.

This is not yet done.  Until the ifdef added to SelectionDAGISel.cpp is
enabled, this does nothing.  However, this code is sufficient to legalize
all of the code in 186.crafty, olden and freebench on an x86 machine.  The
biggest issues are:

1. Vectors aren't implemented at all yet
2. SoftFP is a mess, I need to talk to Evan about it.
3. No lowering to libcalls is implemented yet.
4. Various operations are missing etc.
5. There are FIXME's for stuff I hax0r'd out, like softfp.

Hey, at least it is a step in the right direction :).  If you'd like to help,
just enable the #ifdef in SelectionDAGISel.cpp and compile code with it.  If
this explodes it will tell you what needs to be implemented.  Help is 
certainly appreciated.

Once this goes in, we can do three things:

1. Add a new pass of dag combine between the "type legalizer" and "operation
   legalizer" passes.  This will let us catch some long-standing isel issues
   that we miss because operation legalization often obfuscates the dag with
   target-specific nodes.
2. We can rip out all of the type legalization code from LegalizeDAG.cpp,
   making it much smaller and simpler.  When that happens we can then 
   reimplement the core functionality left in it in a much more efficient and
   non-recursive way.
3. Once the whole legalizer is non-recursive, we can implement whole-function
   selectiondags maybe...



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42981 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 06:10:22 +00:00
Chris Lattner
3cb9351e8a One xform performed by LegalizeDAG is transformation of "store of fp" to "store of int".
Make two changes:
1) only xform "store of f32" if i32 is a legal type for the target.
2) only xform "store of f64" if either i64 or i32 are legal for the target.
3) if i64 isn't legal, manually lower to 2 stores of i32 instead of letting a
   later pass of legalize do it.  This is ugly, but helps future changes I'm 
   about to commit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42980 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 05:46:06 +00:00
Chris Lattner
59afba0fe9 Add a (disabled by default) way to view the ID of a node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42978 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 05:32:43 +00:00
Chris Lattner
7a3c85583d remove misleading comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42970 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 20:35:12 +00:00
Chris Lattner
fb5b11046b If a target doesn't have HasMULHU or HasUMUL_LOHI, ExpandOp would return
without lo/hi set.  Fall through to making a libcall instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42969 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 18:35:05 +00:00
Evan Cheng
34729256e8 When coalescing an EXTRACT_SUBREG and the dst register is a physical register,
the source register will be coalesced to the super register of the LHS. Properly
merge in the live ranges of the resulting coalesced interval that were part of
the original source interval to the live interval of the super-register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42961 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 10:08:34 +00:00
Evan Cheng
347d39f1fd Revert 42908 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 05:57:21 +00:00
Dale Johannesen
5927d8e94d Disable some compile-time optimizations on PPC
long double.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 01:56:47 +00:00
Chris Lattner
e33544ce55 Enhance the truncstore optimization code to handle shifted
values and propagate demanded bits through them in simple cases.

This allows this code:
void foo(char *P) {
   strcpy(P, "abc");
}
to compile to:

_foo:
        ldrb r3, [r1]
        ldrb r2, [r1, #+1]
        ldrb r12, [r1, #+2]!
        ldrb r1, [r1, #+1]
        strb r1, [r0, #+3]
        strb r2, [r0, #+1]
        strb r12, [r0, #+2]
        strb r3, [r0]
        bx lr

instead of:

_foo:
        ldrb r3, [r1, #+3]
        ldrb r2, [r1, #+2]
        orr r3, r2, r3, lsl #8
        ldrb r2, [r1, #+1]
        ldrb r1, [r1]
        orr r2, r1, r2, lsl #8
        orr r3, r2, r3, lsl #16
        strb r3, [r0]
        mov r2, r3, lsr #24
        strb r2, [r0, #+3]
        mov r2, r3, lsr #16
        strb r2, [r0, #+2]
        mov r3, r3, lsr #8
        strb r3, [r0, #+1]
        bx lr

testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll

This also helps occasionally for X86 and other cases not involving 
unaligned load/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42954 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 06:58:48 +00:00
Chris Lattner
2b4c279a8e Add a simple optimization to simplify the input to
truncate and truncstore instructions, based on the 
knowledge that they don't demand the top bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42952 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 06:35:54 +00:00
Evan Cheng
7f56625447 Local spiller optimization:
Turn this:
movswl  %ax, %eax
movl    %eax, -36(%ebp)
xorl    %edi, -36(%ebp)
into
movswl  %ax, %eax
xorl    %edi, %eax
movl    %eax, -36(%ebp)
by unfolding the load / store xorl into an xorl and a store when we know the
value in the spill slot is available in a register. This doesn't change the
number of instructions but reduce the number of times memory is accessed.

Also unfold some load folding instructions and reuse the value when similar
situation presents itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42947 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 02:50:24 +00:00
Evan Cheng
fa9457276a Optionally create a MachineInstr without default implicit operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42945 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 02:23:01 +00:00
Arnold Schwaighofer
48abc5cf6b Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:30:57 +00:00
Dale Johannesen
f646774edd ppc long double. Implement fabs and fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 19:02:17 +00:00
Dale Johannesen
6e63e09236 Implement i64->ppcf128 conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42919 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 17:52:03 +00:00
Evan Cheng
48ff282dd4 Did mean to leave this in. INSERT_SUBREG isn't being coalesced yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42916 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 17:16:50 +00:00
Dan Gohman
8ddde0a151 Change the names used for internal labels to use the current
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:53:36 +00:00
Dan Gohman
a9b511187b Fix some corner cases with vectors in copyToRegs and copyFromRegs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42907 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:33:11 +00:00
Dan Gohman
9e04c82c0e Add support to SplitVectorOp for powi, where the second operand
is a scalar integer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42906 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:13:46 +00:00
Evan Cheng
52c7ff7067 Restrict EXTRACT_SUBREG coalescing to avoid negative performance impact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42903 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 09:15:53 +00:00
Evan Cheng
32dfbeada7 EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:50:34 +00:00
Evan Cheng
10136e7c7f Some clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42898 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:45:27 +00:00
Dale Johannesen
ca68aaa0e5 PPC long double. Implement a couple more conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42888 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 01:37:08 +00:00
Dan Gohman
ac9385a555 Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so
may be overloaded with vector types. And add a testcase for codegen for
these.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42885 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 00:01:22 +00:00
Dan Gohman
8266952813 Codegen support for vector intrinsics.
Factor out the code that expands the "nasty scalar code" for unrolling
vectors into a separate routine, teach it how to handle mixed
vector/scalar operands, as seen in powi, and use it for several operators,
including sin, cos, powi, and pow.

Add support in SplitVectorOp for fpow, fpowi and for several unary
operators.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42884 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:57:53 +00:00
Dale Johannesen
fcf4d24ffb Implement ppc long double->uint conversion.
Make ppc long double constants print.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42882 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:32:15 +00:00
Dan Gohman
e54be10418 Add runtime library names for pow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42880 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:09:10 +00:00
Dan Gohman
07f04fd574 Add an ISD::FPOW node type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42879 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:06:37 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 19:40:01 +00:00
Dale Johannesen
a471c2ecda Next PPC long double bits. First cut at constants.
No compile-time support for constant operations yet,
just format transformations.  Make readers and
writers work.  Split constants into 2 doubles in
Legalize.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42865 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 18:07:22 +00:00
Duncan Sands
272dce0137 Correct swapped arguments to getConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42824 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-10 09:54:50 +00:00
Dale Johannesen
6eaeff29b8 Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42822 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-10 01:01:31 +00:00
Evan Cheng
be8db245f5 Bad choice of variable name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42821 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-10 00:11:40 +00:00
Evan Cheng
5edc57fa42 Fix an extremely stupid bug that prevented first round of coalescing (physical registers only) from happening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42820 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 23:36:27 +00:00
Dan Gohman
30d4254536 Call getFunctionNumber() instead of referencing FunctionNumber directly,
for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42769 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 21:27:12 +00:00
Dan Gohman
525178cdbf Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 18:33:35 +00:00
Dan Gohman
389079b59f DAGCombiner support for UDIVREM/SDIVREM and UMUL_LOHI/SMUL_LOHI.
Check if one of the two results unneeded so see if a simpler operator
could bs used. Also check to see if each of the two computations could be
simplified if they were split into separate operators. Factor out the code
that calls visit() so that it can be used for this purpose.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42759 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 17:57:15 +00:00
Dan Gohman
08ce976971 Add convenience overloads of SelectionDAG::getNode that take a SDVTList
and individual SDOperand operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42753 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 15:49:58 +00:00
Dan Gohman
417e11b9bf In -debug mode, dump SelectionDAGs both before and after the
optimization passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42749 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 15:12:17 +00:00
Evan Cheng
537d5c27ff Kill cycle of an live range is always the last use index + 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42742 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 06:59:30 +00:00
Neil Booth
ccf596a53e convertFromInteger, as originally written, expected sign-extended
input.  APInt unfortunately zero-extends signed integers, so Dale
modified the function to expect zero-extended input.  Make this
assumption explicit in the function name.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42732 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07 11:45:55 +00:00