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Author SHA1 Message Date
Andrew Trick
5d73448bb7 Add -unroll-runtime for unrolling loops with run-time trip counts. 
Patch by Brendon Cahoon!

This extends the existing LoopUnroll and LoopUnrollPass. Brendon
measured no regressions in the llvm test suite with -unroll-runtime
enabled. This implementation works by using the existing loop
unrolling code to unroll the loop by a power-of-two (default 8). It
generates an if-then-else sequence of code prior to the loop to
execute the extra iterations before entering the unrolled loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146245 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 06:19:40 +00:00
Evan Cheng
9c181a92d8 Forgot setting -march. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 06:15:00 +00:00
Chandler Carruth
0c5fc0c7e1 Fix InitializeNativeTargetAsmParser in CMake builds by defining the 
appropriate macro. Patch by Alexey Prokhin. Fixes PR11498.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146239 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 03:31:58 +00:00
Rafael Espindola
1d5969d839 Handle the case of the magical _GLOBAL_OFFSET_TABLE_ showing up in a 
symbol difference. This matches gas behavior and fixes PR11513.

We still don't handle _GLOBAL_OFFSET_TABLE_ in data sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146238 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 03:03:58 +00:00
Chad Rosier
85f5a1ae39 Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146234 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 02:00:44 +00:00
Akira Hatanaka
6df7e23f0c Rename WrapperPIC. It is now used for both pic and static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:53:17 +00:00
Akira Hatanaka
0dca9456c5 jalr should use t9 ($25) for indirect calls regardless of the relocation model 
specified.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146229 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:45:12 +00:00
Devang Patel
f5b9a74f0a Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146226 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:25:04 +00:00
Devang Patel
2b1d77355b Update stale comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146220 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:18:48 +00:00
Eli Friedman
2dd0353fec Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146219 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:16:26 +00:00
Michael J. Spencer
bd3825ecd1 unittests/SupportTests: Fix test. pop modifies the current entry, thus the 
dontlookhere check must be after it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:14:41 +00:00
Michael J. Spencer
6132d70210 unittests/SupportTests: Add some outs()'s to debug the issues on some bots. 
I have run these tests under many configurations on the exact same OS as
the failures, and I can't reproduce them :(.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146214 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 00:45:09 +00:00
Devang Patel
7f7f0902a6 Revert r146184. I am seeing performance regression cause by this patch in one test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146205 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 23:52:00 +00:00
Jim Grosbach
976c0da213 ARM convenience aliases for VSQRT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146201 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:51:25 +00:00
Michael J. Spencer
a81ac8f2b5 Support/FileSystem: Implement recursive_directory_iterator and make 
directory_iterator preserve InputIterator semantics on copy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146200 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:50:09 +00:00
Nick Lewycky
c9b98ad7a7 Fix infinite loop in DSE when deleting a free in a reachable loop that's also 
trivially infinite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146197 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:36:35 +00:00
Evan Cheng
e955726a0e Add 256-bit variant vmovss and vmovsd patterns. rdar://10538417 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146196 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:30:45 +00:00
Eli Friedman
0572c7d31e Remove reference to dead GEPSplitterPass. PR11506. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146195 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:28:17 +00:00
Jim Grosbach
8759c3f548 ARM 64-bit VEXT assembly uses a .64 suffix, not .32, amazingly enough. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146194 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:19:04 +00:00
Owen Anderson
243eb9ecbb Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter can use the former to prevent the formation of libm SDNode's when -fno-builtin is passed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146193 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:15:21 +00:00
Jim Grosbach
6b044c2609 ARM VSHR implied destination operand form aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146192 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:06:06 +00:00
Evan Cheng
13d2ba34f2 Add various missing AVX patterns which was causing crashes. Sadly, the generated 
code looks pretty bad compared to SSE.

rdar://10538793


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146191 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:05:28 +00:00
Jim Grosbach
318df74104 Tidy up a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146190 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 22:04:40 +00:00
Devang Patel
e265bcf1a6 Refactor. No intentional functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146187 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 21:48:01 +00:00
Chad Rosier
73e08d3507 Add rather verbose stats for fast-isel failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146186 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 21:37:10 +00:00
Jim Grosbach
a62d11ea94 ARM asm parser, just issue a warning for a duplicate reg in a list. 
For better 'gas' compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146185 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 21:34:20 +00:00
Devang Patel
cf405ba7a6 Filter "sink to" candidate blocks sooner. This avoids unnecessary computation to determine whether the block dominates all uses or not. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146184 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 21:33:23 +00:00
Akira Hatanaka
7a7194b529 Pass a GlobalAddress instead of an ExternalSymbol to LowerCallTo in 
MipsTargetLowering::LowerGlobalTLSAddress. This is necessary to have
call16(__tls_get_addr) emitted instead of got_disp(__tls_get_addr) when the
target is Mips64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146183 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 21:05:38 +00:00
Jim Grosbach
120313435d ARM VSUB implied destination operand form aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146182 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 20:56:26 +00:00
Jim Grosbach
beef39ab63 Tidy up a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146181 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 20:53:19 +00:00
Owen Anderson
587e34065f Don't explicitly marked libm rounding ops as legal on SSE4.1/AVX. There don't seem to be patterns for these, so I don't know why they were marked legal in the first place. 
Fixes failures caused by r146171.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146180 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 20:51:38 +00:00
Jim Grosbach
9e7b42a40e ARM VQADD implied destination operand form aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146179 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 20:49:43 +00:00
Jim Grosbach
1c2c8a9389 ARM a few more VMUL implied destination operand form aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146177 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 20:42:35 +00:00
Akira Hatanaka
ca0747917d Implement 64-bit support for thread local storage handling. 
- Modify lowering of global TLS address nodes.
- Modify isel of ThreadPointer.
- Wrap target global TLS address nodes that are operands of loads with WrapperPIC. 
- Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be
  substituted with other existing nodes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146175 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 20:34:32 +00:00
Owen Anderson
4a4fdf3476 Teach SelectionDAG to match more calls to libm functions onto existing SDNodes. Mark these nodes as illegal by default, unless the target declares otherwise. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146171 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 19:32:14 +00:00
Jim Grosbach
40e2855547 ARM assembler support for register name aliases. 
rdar://10550084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146170 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 19:27:38 +00:00
Evan Cheng
43d5d4ca1c Make MachineInstr instruction property queries more flexible. This change all 
clients to decide whether to look inside bundled instructions and whether
the query should return true if any / all bundled instructions have the
queried property.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146168 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 19:23:10 +00:00
Evan Cheng
e9c1e07c5f Add test for r146163. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146167 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 19:21:39 +00:00
Evan Cheng
2f435511e9 Many of the SSE patterns should not be selected when AVX is available. This led to the following code in X86Subtarget.cpp 
if (HasAVX)
    X86SSELevel = NoMMXSSE;

This is so patterns that are predicated on hasSSE3, etc. would not be selected when avx is available. Instead, the AVX variant is selected.
However, this breaks instructions which do not have AVX variants.

The right way to fix this is for the SSE but not-AVX patterns to predicate on something like hasSSE3() && !hasAVX().
Then we can take out the hack in X86Subtarget.cpp. Patterns which do not have AVX variants do not need to change.

However, we need to audit all the patterns before we make the change. This patch is workaround that fixes one specific case,
the prefetch instructions. rdar://10538297


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146163 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 19:00:42 +00:00
Daniel Dunbar
3b0887e291 Revert r146143, "Fix bug 9905: Failure in code selection for llvm intrinsics 
sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP,
FEXP2).", it is failing tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146157 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 17:32:18 +00:00
NAKAMURA Takumi
e4472726b5 test/CodeGen/X86/vec_compare-2.ll: Add explicit -mtriple=i686-linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146152 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 15:24:09 +00:00
Jan Sjödin
703420f50e Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this and fix the encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146151 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 14:43:19 +00:00
Nadav Rotem
44bac7cd65 Fix a bug in the integer-promotion of bitcast operations on vector types. 
We must not issue a bitcast operation for integer-promotion of vector types, because the
location of the values in the vector may be different.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146150 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 13:10:01 +00:00
Stepan Dyatkovskiy
72590c9738 Fix bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146143 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 07:55:03 +00:00
Hal Finkel
6772452644 MTCTR needs to be glued to BCTR so that CTR is not marked dead in MTCTR (another find by -verify-machineinstrs) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146137 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 04:36:44 +00:00
Pete Cooper
8f391d9330 Reverting r145899 as it breaks clang self-hosting 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146136 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 03:24:10 +00:00
Jim Grosbach
730fe6c1b6 ARM NEON two-operand aliases for VSHL(immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146125 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 01:30:04 +00:00
Jakob Stoklund Olesen
e6f9e9d836 Drop the HasInlineAsm flag. 
It is not used any more. We are tracking inline assembly misalignments
directly through the BBInfo.Unalign and KnownBits fields.

A simple conservative size estimate is not good enough since it can
cause alignment padding to be underestimated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146124 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 01:22:39 +00:00
Jim Grosbach
ff4cbb4c9a ARM NEON two-operand aliases for VSHL(register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146123 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 01:12:35 +00:00
Jakob Stoklund Olesen
99486be8ba Simplify offset verification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146121 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 01:10:05 +00:00