Commit Graph

18090 Commits

Author SHA1 Message Date
Kevin Enderby
5de048ec30 Have the integrated assembler give an error if $1 is used as an identifier in
an expression.  Currently this bug causes the line to be ignored in a
release build and an assert in a debug build.

rdar://13062484


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173195 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 21:09:20 +00:00
Eli Bendersky
aaf483ff17 Add forgotten test case for the x32 commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 18:52:39 +00:00
Benjamin Kramer
341c5fbe84 X86: Make sure we account for the FMA4 register immediate value, otherwise rip-rel relocations will be off by one byte.
PR15040.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 18:05:59 +00:00
Dmitri Gribenko
91df03b8f2 Tests: rewrite 'opt ... %s' to 'opt ... < %s' so that opt does not emit a ModuleID
This is done to avoid odd test failures, like the one fixed in r171243.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173163 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 14:39:21 +00:00
Evgeniy Stepanov
4247b13252 [msan] Do not insert check on volatile store.
Volatile bitfields can cause valid stores of uninitialized bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173153 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 12:30:52 +00:00
Michael Gottesman
fc8d1dd024 This test is only supposed to test that the objc-arc alias analysis
allows for gvn to perform certain optimizations. Thus the runline should
only contain -objc-arc-aa, not the full -objc-arc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173126 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 04:41:11 +00:00
Daniel Dunbar
849209686f [MC/Mach-O] Load commands are supposed to 8-byte aligned on 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173120 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 03:42:49 +00:00
Andrew Trick
ea0e78af6d Remove target triple from an LSR test.
Manish already fixed this test to work with NoTTI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173110 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 00:57:16 +00:00
Paul Redmond
8e528100d2 Transform (sub 0, (zext bool to A)) to (sext bool to A) and
(sub 0, (sext bool to A)) to (zext bool to A).

Patch by Muhammad Ahmad
Reviewed by Duncan Sands


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173093 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-21 21:57:20 +00:00
Richard Osborne
8da5434346 Add instruction encodings / disassembly support for u6 / lu6 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173086 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-21 20:44:17 +00:00
Richard Osborne
9b709f8b3f Add instruction encoding / disassembly support for ru6 / lru6 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173085 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-21 20:42:16 +00:00
Richard Osborne
b853c415c6 Add instruction encodings / disassembly support for l2rus instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172987 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 18:51:15 +00:00
Richard Osborne
c78ec6b6bc Add instruction encodings / disassembly support for l3r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172986 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 18:37:49 +00:00
Richard Osborne
a68c64fbb2 Add instruction encodings / disassembler support for 2rus instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 17:22:43 +00:00
Richard Osborne
62b8786d12 Add instruction encodings / disassembly support 3r instructions.
It is not possible to distinguish 3r instructions from 2r / rus instructions
using only the fixed bits. Therefore if an instruction doesn't match the
2r / rus format try to decode it as a 3r instruction before returning Fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172984 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 17:18:47 +00:00
NAKAMURA Takumi
1340833d7c llvm/test/CodeGen/X86/win_ftol2.ll: Add -cpu=generic to appease valgrind.
On valgrind the processor is reported;
  Host CPU: athlon-fx

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 15:40:02 +00:00
Nadav Rotem
0c8607ba6a Revert 172708.
The optimization handles esoteric cases but adds a lot of complexity both to the X86 backend and to other backends.
This optimization disables an important canonicalization of chains of SEXT nodes and makes SEXT and ZEXT asymmetrical.
Disabling the canonicalization of consecutive SEXT nodes into a single node disables other DAG optimizations that assume
that there is only one SEXT node. The AVX mask optimizations is one example. Additionally this optimization does not update the cost model.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172968 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 08:35:56 +00:00
Nadav Rotem
0bbbc52dc8 LoopVectorizer: Implement a new heuristics for selecting the unroll factor.
We ignore the cpu frontend and focus on pipeline utilization. We do this because we
don't have a good way to estimate the loop body size at the IR level.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 05:24:29 +00:00
Nadav Rotem
bcdabadaf4 Change the cpu type in the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172963 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 05:20:56 +00:00
NAKAMURA Takumi
fe311dba3e llvm/test/Other/close-stderr.ll: Mark this as XFAIL:valgrind. We got 127 instead of 1 here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 03:35:39 +00:00
David Blaikie
1426841672 The last of PR14471 - emission of constant floats
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-20 01:18:01 +00:00
David Blaikie
fe07db323b Fix a latent bug exposed by recent static member debug info changes.
We weren't encoding boolean constants correctly due to modeling boolean as a
signed type & then sign extending an i1 up to a byte & getting 255.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-19 23:00:25 +00:00
Benjamin Kramer
1af132dcf3 LoopVectorizer: Emit memory checks into their own basic block.
This separates the check for "too few elements to run the vector loop" from the
"memory overlap" check, giving a lot nicer code and allowing to skip the memory
checks when we're not going to execute the vector code anyways. We still leave
the decision of whether to emit the memory checks as branches or setccs, but it
seems to be doing a good job. If ugly code pops up we may want to emit them as
separate blocks too. Small speedup on MultiSource/Benchmarks/MallocBench/espresso.

Most of this is legwork to allow multiple bypass blocks while updating PHIs,
dominators and loop info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172902 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-19 13:57:58 +00:00
Nadav Rotem
ba95865441 On Sandybridge split unaligned 256bit stores into two xmm-sized stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-19 08:38:41 +00:00
Jakob Stoklund Olesen
d32eea9636 Remove some register allocation order dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172874 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-19 00:03:32 +00:00
Nadav Rotem
48177ac90f On Sandybridge loading unaligned 256bits using two XMM loads (vmovups and vinsertf128) is faster than using a single vmovups instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172868 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 23:10:30 +00:00
Eric Christopher
0969ddf601 Split out DW_OP_addr for the split debug info DWARF5 proposal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172857 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 22:11:33 +00:00
Jack Carter
c91cbb9b0c This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
Support for Mips register information sections.

Mips ELF object files have a section that is dedicated
to register use info. Some of this information such as
the assumed Global Pointer value is used by the linker
in relocation resolution.

The register info file is .reginfo in o32 and .MIPS.options
in 64 and n32 abi files.

This patch contains the changes needed to create the sections,
but leaves the actual register accounting for a future patch.


Contributer: Jack Carter
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172847 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 21:20:38 +00:00
Jack Carter
e72fac60e3 This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.

Removal of redundant code and formatting fixes.

Contributers: Jack Carter/Vladimir Medic
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172842 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 20:15:06 +00:00
Daniel Dunbar
6d49b680be [MC/Mach-O] Implement integrated assembler support for linker options.
- Also, fixup syntax errors in LangRef and missing newline in the MCAsmStreamer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172837 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 19:37:00 +00:00
NAKAMURA Takumi
ca81374e32 llvm/test/CodeGen/X86/Atomics-64.ll: Tweak for 2nd RUN not to overwrite %t. It sometimes causes spurious failure on lit win32.
Feel free to prune or suppress each output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172823 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 14:52:02 +00:00
Daniel Dunbar
a94c339423 [MC/Mach-O] Add support for linker options in Mach-O files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 01:26:07 +00:00
Daniel Dunbar
cddd236e8a [MC/Mach-O] Add AsmParser support for .linker_option directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172778 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18 01:25:48 +00:00
Bill Wendling
167ede898a Reverting r171325 & r172363. This was causing a mis-compile on the self-hosted LTO build bots.
Okay, here's how to reproduce the problem:

1) Build a Release (or Release+Asserts) version of clang in the normal way.

2) Using the clang & clang++ binaries from (1), build a Release (or
   Release+Asserts) version of the same sources, but this time enable LTO ---
   specify the `-flto' flag on the command line.

3) Run the ARC migrator tests:

    $ arcmt-test --args -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ ./src/tools/clang/test/ARCMT/cxx-rewrite.mm

You'll see that the output isn't correct (the whitespace is off).

The mis-compile is in the function `RewriteBuffer::RemoveText' in the
clang/lib/Rewrite/Core/Rewriter.cpp file. When that function and RewriteRope.cpp
are compiled with LTO and the `arcmt-test' executable is regenerated, you'll see
the error. When those files are not LTO'ed, then the output of the `arcmt-test'
is fine.

It is *really* hard to get a testcase out of this. I'll file a PR with what I
have currently.

--- Reverse-merging r172363 into '.':
U    include/llvm/Analysis/MemoryBuiltins.h
U    lib/Analysis/MemoryBuiltins.cpp

--- Reverse-merging r171325 into '.':
U    test/Transforms/InstCombine/objsize.ll
G    include/llvm/Analysis/MemoryBuiltins.h
G    lib/Analysis/MemoryBuiltins.cpp




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172756 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 21:28:46 +00:00
Bill Schmidt
d69a43a88d Restore reverted test case, this time with REQUIRES: asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172747 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 19:46:51 +00:00
Bill Schmidt
c087dcfa63 Remove bad test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172746 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 19:39:36 +00:00
Bill Schmidt
8f4ee4b2a2 This patch fixes PR13626 by providing i128 support in the return
calling convention.  128-bit integers are now properly returned
in GPR3 and GPR4 on PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172745 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 19:34:57 +00:00
Jyotsna Verma
a454ffd02a Add indexed load/store instructions for offset validation check.
This patch fixes bug 14902 - http://llvm.org/bugs/show_bug.cgi?id=14902



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172737 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 18:42:37 +00:00
Bill Schmidt
792b123338 This patch fixes the PPC calling convention to handle returns of
_Complex float and _Complex long double, by simply increasing the
number of floating point registers available for return values.

The test case verifies that the correct registers are loaded.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172733 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 17:45:19 +00:00
Elena Demikhovsky
6c327f92a5 Optimization for the following SIGN_EXTEND pairs:
v8i8  -> v8i64, 
v8i8  -> v8i32, 
v4i8  -> v4i64, 
v4i16 -> v4i64 
for AVX and AVX2.

Bug 14865.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172708 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 09:59:53 +00:00
Eric Christopher
446b88fb81 Fix the assembly and dissassembly of DW_FORM_sec_offset. Found this by
changing both the string of the dwo_name to be correct and the type of
the statement list.

Testcases all around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172699 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 03:00:04 +00:00
Eric Christopher
d96c72a14c Add the DW_AT_GNU_addr_base for the skeleton cu. Add support for
emitting the dwarf32 version of DW_FORM_sec_offset and correct
disassembler support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172698 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 02:59:59 +00:00
Jack Carter
c147b67820 This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.

The Mips RDHWR (Read Hardware Register) instruction was not 
tested for assembler or dissassembler consumption. This patch
adds that functionality.

Contributer: Vladimir Medic
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172685 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 00:28:20 +00:00
Daniel Dunbar
5db391c67d [IR] Add 'Append' and 'AppendUnique' module flag behaviors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172659 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-16 21:38:56 +00:00
Michael Gottesman
ac47c1bc39 Added test for r172599 which fixes bugzilla://14584,rdar://11744105.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172656 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-16 21:07:18 +00:00
Eric Christopher
4f3b323f8d Make this test X86 only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172652 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-16 20:31:35 +00:00
Eric Christopher
65605d85bd Move this to X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172651 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-16 20:31:32 +00:00
Eric Christopher
2c2bcbdd5b Add testcase missed yesterday from Paul Robinson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172646 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-16 19:53:47 +00:00
Daniel Dunbar
1e08165ae9 [Linker] Change module flag linking to be more extensible.
- Instead of computing a bunch of buckets of different flag types, just do an
   incremental link resolving conflicts as they arise.

 - This also has the advantage of making the link result deterministic and not
   dependent on map iteration order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172634 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-16 18:39:23 +00:00
Kevin Enderby
75c9b9384f We want the dwarf AT_producer for assembly source files to match clang's
AT_producer.  Which includes clang's version information so we can tell
which version of the compiler was used.

This is the first of two steps to allow us to do that.  This is the llvm-mc
change to provide a method to set the AT_producer string.  The second step,
coming soon to a clang near you, will have the clang driver pass the value
of getClangFullVersion() via an flag when invoking the integrated assembler
on assembly source files.

rdar://12955296


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172630 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-16 17:46:23 +00:00