Commit Graph

26929 Commits

Author SHA1 Message Date
Daniel Sanders
62c2faa216 [mips] Fix sret arguments for N32/N64 which were accidentally broken in r221534.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 15:57:53 +00:00
Manuel Klimek
d8d51ffe26 Mark test using python as REQUIRES: python27.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221598 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 15:29:29 +00:00
Matt Arsenault
79da624ab2 R600/SI: Fix broken check prefixes in test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221565 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-08 00:02:57 +00:00
Chad Rosier
bcdc4769f4 [Reassociate] Better preserve NSW/NUW flags.
Part of PR12985.

Phabricator Revision: http://reviews.llvm.org/D6172

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221555 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 22:12:57 +00:00
Saleem Abdulrasool
35c163020a Transform: add SymbolRewriter pass
This introduces the symbol rewriter. This is an IR->IR transformation that is
implemented as a CodeGenPrepare pass. This allows for the transparent
adjustment of the symbols during compilation.

It provides a clean, simple, elegant solution for symbol inter-positioning. This
technique is often used, such as in the various sanitizers and performance
analysis.

The control of this is via a custom YAML syntax map file that indicates source
to destination mapping, so as to avoid having the compiler to know the exact
details of the source to destination transformations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221548 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 21:32:08 +00:00
Daniel Sanders
fe2b8b1960 [mips] Promote i32 arguments to i64 for the N32/N64 ABI and fix <64-bit structs...
Summary:
... and after all that refactoring, it's possible to distinguish softfloat
floating point values from integers so this patch no longer breaks softfloat to
do it.

Remove direct handling of i32's in the N32/N64 ABI by promoting them to
i64. This more closely reflects the ABI documentation and also fixes
problems with stack arguments on big-endian targets.

We now rely on signext/zeroext annotations (already generated by clang) and
the Assert[SZ]ext nodes to avoid the introduction of unnecessary sign/zero
extends.

It was not possible to convert three tests to use signext/zeroext. These tests
are bswap.ll, ctlz-v.ll, ctlz-v.ll. It's not possible to put signext on a
vector type so we just accept the sign extends here for now. These tests don't
pass the vectors the same way clang does (clang puts multiple elements in the
same argument, these map 1 element to 1 argument) so we don't need to worry too
much about it.

With this patch, all known N32/N64 bugs should be fixed and we now pass the
first 10,000 tests generated by ABITest.py.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6117


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221534 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 16:54:21 +00:00
NAKAMURA Takumi
7ad3ceb478 llvm/test/tools/llvm-symbolizer/ppc64.test: Avoid subshell.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221526 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 14:50:10 +00:00
Jay Foad
222fcc59cb llvm-symbolizer: teach it about PowerPC64 ELF function descriptors
Summary:
Teach llvm-symbolizer about PowerPC64 ELF function descriptors. Symbols in the .opd section point to function descriptors, the first word of which is a pointer to the real function. For the purposes of symbolizing we pretend that the symbol points directly to the function.

This is enough to get decent function names in stack traces for unoptimized binaries, which fixes the sanitizer print-stack-trace test on PowerPC64 Linux.

Reviewers: kcc, willschm, samsonov

Reviewed By: samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6110

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221514 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 09:08:39 +00:00
David Majnemer
3f2ffe0423 SCCP: overdefined calls cannot become constant
We would attempt to fold away a call instruction which had been marked
overdefined.  However, it's not valid to transition to constant from
overdefined.

This fixes PR21512.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221513 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 08:54:19 +00:00
Justin Hibbits
893f22f882 Add Position-independent Code model Module API.
Summary:
This makes PIC levels a Module flag attribute, which can be queried by the
backend.  The flag is named `PIC Level`, and can have a value of:

  0 - Backend-default
  1 - Small-model (-fpic)
  2 - Large-model (-fPIC)

These match the `-pic-level' command line argument for clang, and the value of the
preprocessor macro `__PIC__'.

Test Plan:
New flags tests specific for the 'PIC Level' module flag.
Tests to be added as part of a future commit for PowerPC, which will use this new API.

Reviewers: rafael, echristo

Reviewed By: rafael, echristo

Subscribers: rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D5882

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221510 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 04:46:10 +00:00
Ahmed Bougacha
75da31ff15 [AArch64] Keep flags on condition vreg when instantiating a CB branch.
Reversing a CB* instruction used to drop the flags on the condition. On the
included testcase, this lead to a read from an undefined vreg.
Using addOperand keeps the flags, here <undef>.

Differential Revision: http://reviews.llvm.org/D6159


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221507 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 02:50:00 +00:00
David Majnemer
bb642c4369 LoopVectorize: Don't assume pointees are sized
A pointer's pointee might not be sized: the pointee could be a function.

Report this as IK_NoInduction when calculating isInductionVariable.

This fixes PR21508.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221501 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 00:31:14 +00:00
David Majnemer
98066413ca InstCombine: Rely on cmpxchg's return code when it's strong
Comparing the result of a cmpxchg instruction can be replaced with an
extractvalue of the cmpxchg success indicator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221498 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 23:23:30 +00:00
Simon Atanasyan
848edb1bfa [ELF][yaml2obj] Handle additional MIPS specific st_other field flags
The ELF symbol `st_other` field might contain additional flags besides
visibility ones. This patch implements support for some MIPS specific
flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221491 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 22:46:24 +00:00
Simon Pilgrim
de3d50643c [X86][SSE] Vector integer/float conversion memory folding (cvttps2dq / cvttpd2dq)
Fixed an issue with the (v)cvttps2dq and (v)cvttpd2dq instructions being incorrectly put in the 2 source operand folding tables instead of the 1 source operand and added the missing SSE/AVX versions.

Also added missing (v)cvtps2dq and (v)cvtpd2dq instructions to the folding tables.

Differential Revision: http://reviews.llvm.org/D6001



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221489 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 22:15:41 +00:00
Ahmed Bougacha
112aabeeeb [X86] Add VFMADDSUB cases for the 213->231 custom inserter.
Also add tests for vfmadd/vfmsub.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221488 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 22:04:15 +00:00
Ahmed Bougacha
f44d4cd925 [X86] Add missing FMA3 VFMADDSUB in the emitter.
Also reuse the fma4 intrinsic test to cover fma3 instructions too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221487 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 21:58:11 +00:00
Ahmed Bougacha
8b6319bfed [X86] Split FMA4 RM tests into a separate file. NFC.
While there, remove useless comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221484 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 21:46:23 +00:00
Rafael Espindola
d8eb4f1912 Base check on the section name, not the variable name.
The variable is private, so the name should not be relied on. Also, the
linker uses the sections, so asan should too when trying to avoid causing
the linker problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221480 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 20:01:34 +00:00
Lang Hames
0ea3b243b0 [RegAlloc] Remove reference to the trivial spiller in test case.
This test case was never actually testing the trivial spiller: the -spiller
option has not been hooked up for a while now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221475 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 19:24:18 +00:00
Kevin Enderby
3b80486e3a Plumb in the ARM thumb symbolizer in llvm-objdump’s Mach-O disassembler and
add the code and test cases for 32-bit ARM symbolizer.

Also fixed the printing of data in code as it was not using the table correctly
and needed to fix one of the test cases too.

This will break lld’s test/mach-o/arm-interworking-movw.yaml till the tweak
for that is made. Which I’ll be committing immediately after this commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221470 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 19:00:13 +00:00
Colin LeMahieu
d67fc42d22 [Hexagon] Adding basic Hexagon ELF object emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221465 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 17:05:51 +00:00
Chad Rosier
e15b20eb13 [Reassociate] Don't reassociate when mixing regular and fast-math FP
instructions.  Inlining might cause such cases and it's not valid to
reassociate floating-point instructions without the unsafe algebra flag.

Patch by Mehdi Amini <mehdi_amini@apple.com>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221462 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 16:46:37 +00:00
Rafael Espindola
4396b44b9a Use FileCheck in a few tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 15:05:51 +00:00
Rafael Espindola
eed959015b Compute the correct jump table entries on 32 bit windows.
On 32 bit windows we use label differences and .set does not suppress
rolocations, a combination that was not used before r220256.

This fixes PR21497.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221456 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 14:39:49 +00:00
Andrea Di Biagio
f0f66a254d [X86] When commuting SSE immediate blend, make sure that the new blend mask is a valid imm8.
Example:
define <4 x i32> @test(<4 x i32> %a, <4 x i32> %b) {
  %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
  ret <4 x i32> %shuffle
}

Before llc (-mattr=+sse4.1), produced the following assembly instruction:
  pblendw $4294967103, %xmm1, %xmm0

After
  pblendw $63, %xmm1, %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221455 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 14:36:45 +00:00
Toma Tabacu
7f22a20351 [mips] Tolerate the use of the %z inline asm operand modifier with non-immediates.
Summary:
Currently, we give an error if %z is used with non-immediates, instead of continuing as if the %z isn't there.

For example, you use the %z operand modifier along with the "Jr" constraints ("r" makes the operand a register, and "J" makes it an immediate, but only if its value is 0). 
In this case, you want the compiler to print "$0" if the inline asm input operand turns out to be an immediate zero and you want it to print the register containing the operand, if it's not.

We give an error in the latter case, and we shouldn't (GCC also doesn't).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6023

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221453 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 14:25:42 +00:00
Sasa Stankovic
2b8f96996b [mips] Add the following MIPS options that control gp-relative addressing of
small data items: -mgpopt, -mlocal-sdata, -mextern-sdata. Implement gp-relative
addressing for constants.

Differential Revision: http://reviews.llvm.org/D4903


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221450 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 13:20:12 +00:00
Toma Tabacu
ea60f51d87 [mips] Improve error/warning messages and testing for the .cpload assembler directive.
Summary:
Improved warning message when using .cpload inside a reorder section and added an error message for using .cpload with Mips16 enabled.
Modified the tests to fit with the changes mentioned above, added a test-case for the N32 ABI in cpload.s and did some reformatting to make the tests easier to read.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5465

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221447 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 10:02:45 +00:00
David Majnemer
42b17f97cf Object, COFF: Infer symbol sizes from adjacent symbols
Use the position of the subsequent symbol in the object file to infer
the size of it's predecessor.  I hope to eventually remove whatever COFF
specific details from this little algorithm so that we can unify this
logic with what Mach-O does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221444 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 08:10:41 +00:00
Justin Bogner
03e3dfd20a GCOV: Make sure that function idents in the .gcda and .gcno match
When generating gcov compatible profiling, we sometimes skip emitting
data for functions for one reason or another. However, this was
emitting different function IDs in the .gcno and .gcda files, because
the .gcno case was using the loop index before skipping functions and
the .gcda the array index after. This resulted in completely invalid
gcov data.

This fixes the problem by making the .gcno loop track the ID
separately from the loop index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221441 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 06:55:02 +00:00
Rafael Espindola
58de7099c7 Add three other sections when L symbols are allowed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221436 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 05:01:21 +00:00
Rafael Espindola
e1f22e397d Allow L symbols in no_dead_strip sections.
If a section cannot be dead stripped, it is safe to use L symbols, since
the linker will keep all of it in the end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221431 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 02:42:03 +00:00
Quentin Colombet
d465eced34 [X86] Lower VSELECT into SHRUNKBLEND when we shrink the bits used into the
condition to match a blend.
This prevents optimizations that work on VSELECT to perform invalid
transformations. Indeed, the optimized condition does not match the vector
boolean content that is expected and bad things may happen.

This patch yields the exact same code on the whole test-suite + specs (-O3 and
-O3 -march=core-avx2), it improves one test case (vector-blend.ll) and fixes a
bug reduced in vselect-avx.ll.

<rdar://problem/18819506>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221429 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 02:25:03 +00:00
Petar Jovanovic
5940390ece [mips64] Fix MIPS64 exception personality encoding
Remove dynamic relocations of __gxx_personality_v0 from the .eh_frame.
The MIPS64 follow-up of the MIPS32 fix (rL209907).

Patch by Vladimir Stefanovic.

Differential Revision: http://reviews.llvm.org/D6141


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221408 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 22:42:31 +00:00
Simon Pilgrim
3f1d66fe93 [X86][SSE] Vector integer to float conversion memory folding
Added missing memory folding for the (V)CVTDQ2PS instructions - we can safely fold these (but not the (V)CVTDQ2PD versions which have a register/memory size discrepancy in the source operand). I've added a test case demonstrating that stack folding now works.

Differential Revision: http://reviews.llvm.org/D5981



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221407 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 22:28:25 +00:00
Sean Silva
212f3ab5ea [Linker] Add some test coverage for llvm.ident merging
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221403 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 21:33:34 +00:00
Derek Schuff
65c7979555 Fix test breakage from r221386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221389 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 20:02:05 +00:00
Derek Schuff
07ffcb1007 [x86 fast-isel] Materialize allocas with the correct-sized lea for ILP32
Summary:
X86FastISel::fastMaterializeAlloca was incorrectly conditioning its
opcode selection on subtarget bitness rather than pointer size.

Differential Revision: http://reviews.llvm.org/D6136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 19:27:21 +00:00
Matt Arsenault
e7a8e298fb R600/SI: Add testcase I forgot to commit from months ago
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221384 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 19:01:22 +00:00
Justin Holewinski
e459c0bf65 [NVPTX] Add NVPTXLowerStructArgs pass
This works around the limitation that PTX does not allow .param space
loads/stores with arbitrary pointers.

If a function has a by-val struct ptr arg, say foo(%struct.x *byval %d), then
add the following instructions to the first basic block :

%temp = alloca %struct.x, align 8
%tt1 = bitcast %struct.x * %d to i8 *
%tt2 = llvm.nvvm.cvt.gen.to.param %tt2
%tempd = bitcast i8 addrspace(101) * to %struct.x addrspace(101) *
%tv = load %struct.x addrspace(101) * %tempd
store %struct.x %tv, %struct.x * %temp, align 8

The above code allocates some space in the stack and copies the incoming
struct from param space to local space. Then replace all occurences of %d
by %temp.

Fixes PR21465.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221377 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 18:19:30 +00:00
Zoran Jovanovic
cd2d40cef6 ps][microMIPS] Implement CodeGen support for ANDI16 instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221371 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 17:43:00 +00:00
Zoran Jovanovic
a1925e6d5d ps][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221369 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 17:38:31 +00:00
Zoran Jovanovic
8dad1e1e8e [mips][microMIPS] Implement ANDI16 instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221367 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 17:31:00 +00:00
Peter Collingbourne
7cc4447ccf [dfsan] Abort at runtime on indirect calls to uninstrumented vararg functions.
We currently have no infrastructure to support these correctly.

This is accomplished by generating a call to a runtime library function that
aborts at runtime in place of the regular wrapper for such functions. Direct
calls are rewritten in the usual way during traversal of the caller's IR.

We also remove the "split-stack" attribute from such wrappers, as the code
generator cannot currently handle split-stack vararg functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221360 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 17:21:00 +00:00
Zoran Jovanovic
0f0a134d9d [mips][microMIPS] Mark symbols as microMIPS if necessary
Differential Revision: http://reviews.llvm.org/D6039


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 16:35:20 +00:00
Zoran Jovanovic
e9b9ca452f Reverted revisions 221351, 221352 and 221353.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221354 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 16:19:59 +00:00
Zoran Jovanovic
e7ec22de06 [mips][microMIPS] Implement CodeGen support for ANDI16 instruction
Differential Revision: http://reviews.llvm.org/D5797


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221353 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 15:54:05 +00:00
Zoran Jovanovic
8cfd4909f0 [mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions
Differential Revision: http://reviews.llvm.org/D5933


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221352 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 15:46:53 +00:00
Zoran Jovanovic
7c63a6331f [mips][microMIPS] Implement ANDI16 instruction
Differential Revision: http://reviews.llvm.org/D5163


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 15:39:41 +00:00