Commit Graph

25 Commits

Author SHA1 Message Date
Chris Lattner
35a27c8a0d revert r79562 + r79563
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 23:12:15 +00:00
Sanjiv Gupta
eb01abaad1 Implement support for ISRs.
Clone functions that are shared between the Main thread and Interrupt thread.
CallSites are changed in AsmPrinter currently. A better solution would have been to modify the legalizer (SoftenFloat) to allow targets to change the name of libcalls for float operations. But that currently breaks other targets.
Also, cloing of automatic variables is done AsmPrinter, a better approach would
be to use the ValueMap in CloneFunction itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 19:28:24 +00:00
Dan Gohman
98ca4f2a32 Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
Sanjiv Gupta
e0d12d5f7b Mark attributes of return insn correctly. It was being assumed safe to delete in isSafeToDelete (a thing checked-in 76281).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 07:48:53 +00:00
Sanjiv Gupta
2d76f256f8 Mark sublw_cc and subfw_cc as Terminator insns so that they are part of the terminator insns for a basic block alongwith branch insns. This way a copy is not getting inserted between cmp and branch during PHIElimination disturbing the status flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 05:40:05 +00:00
Sanjiv Gupta
1d2e6ed1ef For extended loads of type i1 to i8, we will need to at least one byte from memory.
The change in the .td file is to mark the side effects of mov insn.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 07:58:59 +00:00
Sanjiv Gupta
892c8caa3c FrameIndex could be used as a value (addressof (arg)) or as an address.
Expand it exactly like GlobalAddress.
Fix some more crashes (InsertBranch() not being implemented) for compiling hitec libs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 15:31:12 +00:00
Sanjiv Gupta
a455942895 Mark the branch insns correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72529 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 17:32:56 +00:00
Sanjiv Gupta
ed4f4fbfba Mark mayLoad, mayStore for insns correctly and use them
to check if an insn is accessing memory during mem sel optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71537 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 04:30:38 +00:00
Sanjiv Gupta
d8d27f4a4b Emit banksel and movlp instructions.
Split large global data (both initialized and un-initialized) into multiple sections of <= 80 bytes.
Provide routines to manage PIC16 ABI naming conventions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71073 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 08:02:01 +00:00
Sanjiv Gupta
dd92dba644 Make the function begin label start after ther data pointer.
The address of data frame for function can be obtained by subtracting 2 from the function begin label.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69801 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-22 12:02:36 +00:00
Sanjiv Gupta
85be408a32 Handle aggregate type arguments to direct and indirect calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 02:49:52 +00:00
Sanjiv Gupta
a3613be963 Added code to handle spilling and reloading of FSRs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68783 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 15:10:14 +00:00
Sanjiv Gupta
c1fa70c35a Emit .line debug directives for stoppoints. The debug location is retrieved by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 06:24:04 +00:00
Sanjiv Gupta
7836fc129a Handle indirect function calls.
Every function has the address of its frame in the beginning of code section.
The frame address is retrieved and used to pass arguments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68597 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 05:38:48 +00:00
Sanjiv Gupta
5274a4afb7 To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-02 18:03:10 +00:00
Sanjiv Gupta
b84d5a476a Params are not being generated as static globals now. The caller passes them onto the callee's stack directly and the callee loads the argvals from its own stack. Clang generated frameindexes validatd by recalculating the stack as if all frameindexes represent 1-byte slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68327 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-02 17:42:00 +00:00
Sanjiv Gupta
c29f0c7dde Mark the Defs and Uses of STATUS register correctly, plus some reformatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 10:35:34 +00:00
Sanjiv Gupta
5af3ee2818 Fixed the comment. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 09:01:44 +00:00
Sanjiv Gupta
1b04694116 Checking in conditionals, function call, arrays and libcalls implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62174 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 19:18:47 +00:00
Sanjiv Gupta
8f78fa827e Emit declaration for globals and externs.
Custom lower AND, OR, XOR bitwise operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-26 10:53:50 +00:00
Sanjiv Gupta
b1b5ffd827 Added a more function PIC16 backend. However to get this working a patch in
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59617 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 11:00:54 +00:00
Dan Gohman
f5aeb1a8e4 Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 16:56:44 +00:00
Sanjiv Gupta
2010b3eea6 Detabification. Fixed indentation and spacing.
Changed cout to DOUT, and TODOs to FIXMEs.
Other changes as per coding conventions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51105 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 11:31:39 +00:00
Sanjiv Gupta
0e68771536 Adding files for Microchip's PIC16 target.
A brief description about PIC16:
===============================
PIC16 is an 8-bit microcontroller with only one 8-bit register which is the 
accumulator. All arithmetic/load/store operations are 8-bit only.
The architecture has two address spaces: program and data. The program memory 
is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory. 

It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register). 

Two classes of registers exist: (8-bit class which is only one
accumulator) (16-bit class, which contains one or more 16 bit
pointer(s))



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51027 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 09:02:57 +00:00