Commit Graph

103751 Commits

Author SHA1 Message Date
David Blaikie
675e527ab8 DebugInfo: Add FIXME regarding DILexicalBlock uniquing fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208909 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 20:09:55 +00:00
Tom Stellard
522a941c17 autoconf: Fix libLLVM-Major-Minor-Patch.so symlink
The symlink needs to point to a relative path, so we don't break
building in a chroot.

Tested-by: Laurent Carlier <lordheavym@gmail.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208908 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 19:50:25 +00:00
Simon Atanasyan
1564bf7dbe [obj2yaml][ELF] Print relocation's offset as a hex number. Use a proper
types to hold relocation's offset and addend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208906 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 18:04:09 +00:00
Simon Atanasyan
650c53fe2a [obj2yaml][ELF] Do not print empty Link and Info fields for ELF sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208905 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 18:04:02 +00:00
Juergen Ributzka
218bad2bc5 Revert "[PM] Add pass run listeners to the pass manager."
Revert the current implementation and C API. New implementation and C APIs are
in the works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208904 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 17:49:20 +00:00
Bradley Smith
fd76d8a72d [ARM64] Improve diagnostics for Cn operands in SYS instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208902 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 16:28:32 +00:00
Simon Atanasyan
926273d496 [yaml2obj] Add "-o" command line option to specify an output file name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208900 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 16:14:02 +00:00
NAKAMURA Takumi
70e3aba855 llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll: Add explicit triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 15:45:31 +00:00
Andrea Di Biagio
9836c47ea6 [X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.
Added target specific combine rules to fold blend intrinsics according
to the following rules:
 1) fold(blend A, A, Mask) -> A;
 2) fold(blend A, B, <allZeros>) -> A;
 3) fold(blend A, B, <allOnes>) -> B.

Added two new tests to verify that the new folding rules work for all
the optimized blend intrinsics.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208895 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 15:18:15 +00:00
Zoran Jovanovic
1f05322d96 [mips][mips64r6] Add CLASS.fmt instructions
Differential Revision: http://reviews.llvm.org/D3712


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208894 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 15:16:36 +00:00
Zoran Jovanovic
75999124df [mips][mips64r6] Add RINT.fmt instructions
Differential Revision: http://reviews.llvm.org/D3711


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208892 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 15:04:37 +00:00
Zoran Jovanovic
c8d4dfc48b [mips][mips64r6] Add SELEQZ/SELNEZ.fmt instructions
Differential Revision: http://reviews.llvm.org/D3710


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208891 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 14:58:42 +00:00
Zoran Jovanovic
bd80605e28 [mips][mips64r6] Add MAX/MIN/MAXA/MINA.fmt instructions
Differential Revision: http://reviews.llvm.org/D3709


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 14:54:06 +00:00
Tom Stellard
29d4ed329e R600/SI: Stop using VSrc_* as the default register class for types.
We now use SReg_* for integer types and VReg_* for floating-point types.
This should help simplify the SIFixSGPRCopies pass and no longer causes
ISel to insert a COPY after termiator instuctions that output a value.

This change is covered by exisitng tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208888 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 14:41:57 +00:00
Tom Stellard
704fe35d88 R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies
This prevents a future commit from regressing the load-i1.ll test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208887 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 14:41:55 +00:00
Tom Stellard
c1de569ce8 R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208886 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 14:41:54 +00:00
Tom Stellard
bfffad69b2 R600/SI: Use VALU instructions for i1 ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 14:41:50 +00:00
Tim Northover
d0e93f2440 TableGen: use correct MIOperand when printing aliases
Previously, TableGen assumed that every aliased operand consumed precisely 1
MachineInstr slot (this was reasonable because until a couple of days ago,
nothing more complicated was eligible for printing).

This allows a couple more ARM64 aliases to print so we can remove the special
code.

On the X86 side, I've gone for explicit AT&T size specifiers as the default, so
turned off a few of the aliases that would have just started printing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208880 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 13:36:01 +00:00
Daniel Sanders
9f6a386e6a [mips][mips64r6] Add bitswap, and dbitswap
Summary: Depends on D3728

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3729

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208877 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 12:18:23 +00:00
Jay Foad
b7ba5c2e2e Instead of littering asserts throughout the code after every call to
computeKnownBits, consolidate them into one assert at the end of
computeKnownBits itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208876 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 12:12:55 +00:00
Tim Northover
0a088b1fc5 ARM64: print correct aliases for NEON mov & mvn instructions
In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208874 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 12:11:02 +00:00
Daniel Sanders
8b580ccba0 [mips][mips64r6] Add align and dalign
Summary: Depends on D3689

Reviewers: vmedic, zoran.jovanovic, jkolek

Reviewed By: jkolek

Differential Revision: http://reviews.llvm.org/D3728

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208872 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 12:06:36 +00:00
Tim Northover
f61a467a59 TableGen/ARM64: print aliases even if they have syntax variants.
To get at least one use of the change (and some actual tests) in with its
commit, I've enabled the AArch64 & ARM64 NEON mov aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208867 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:16:32 +00:00
Tim Northover
d744346566 ARM64: add correct vector registers during asm parsing
Previously, we ignored the difference between V64 and V128 when parsing
assembly: they both got mapped to registers in the FPR128 class. This is
basically harmless at the moment because they both print and encode the same
way. However, it will affect the printing of aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208866 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:16:19 +00:00
Bradley Smith
75aa5372bc [ARM64] Improve load/store diagnostics and forbid 32-bit register addresses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208864 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:08:30 +00:00
Bradley Smith
e7856db583 [ARM64] Parse fixed vector lanes properly so that diagnostics can be emitted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208863 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:07:57 +00:00
Bradley Smith
dbe4f8b96e [ARM64] Add/Fixup diagnostics for floating point immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208862 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:07:28 +00:00
Bradley Smith
6091820c29 [ARM64] Add condition code operand type such that proper diagnostics can be emitted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208861 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:06:51 +00:00
Bradley Smith
907c04bc4c [ARM64] Add more simple diagnostics for immediate/shift ranges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208860 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 11:06:16 +00:00
Daniel Sanders
06961bf147 [mips][mips64r6] Add addiupc, aluipc, and auipc
Summary:
No support for symbols in place of the immediate yet since it requires new
relocations.

Depends on D3671

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3689

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208858 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 10:45:58 +00:00
Daniel Sanders
fc4953bff2 [mips][mips64r6] Add aui, daui, dahi, and dati
Summary: Depends on D3671

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3759

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208857 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 10:27:19 +00:00
Chandler Carruth
ca323cf916 Teach the constant folder to look through bitcast constant expressions
much more effectively when trying to constant fold a load of a constant.
Previously, we only handled bitcasts by trying to find a totally generic
byte representation of the constant and use that. Now, we look through
the bitcast to see what constant we might fold the load into, and then
try to form a constant expression cast of the found value that would be
equivalent to loading the value.

You might wonder why on earth this actually matters. Well, turns out
that the Itanium ABI causes us to create a single array for a vtable
where the first elements are virtual base offsets, followed by the
virtual function pointers. Because the array is homogenous the element
type is consistently i8* and we inttoptr the virtual base offsets into
the initial elements.

Then constructors bitcast these pointers to i64 pointers prior to
loading them. Boom, no more constant folding of virtual base offsets.
This is the first fix to LLVM to address the *insane* performance Eric
Niebler discovered with Clang on his range comprehensions[1]. There is
more to come though, this doesn't *really* fix the problem fully.

[1]: http://ericniebler.com/2014/04/27/range-comprehensions/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208856 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 09:56:28 +00:00
Daniel Sanders
9cfa5cf7ae [mips][mips64r6] Test that branch likelies are not accepted on MIPS64r6.
Summary:
They aren't implemented for any ISA at the moment.

Depends on D3670

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3671

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208855 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 09:47:43 +00:00
Dinesh Dwivedi
0d5742fc59 Reverting r208848, reason: build failure: sanitizer-x86_64-linux-bootstrap/builds/3399
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208852 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 08:22:55 +00:00
Dinesh Dwivedi
707048b0db Added instcombine for 'MIN(MIN(A, 27), 93)' and 'MAX(MAX(A, 93), 27)'
MIN(MIN(A, 23), 97) -> MIN(A, 23)
MAX(MAX(A, 97), 23) -> MAX(A, 97)

Differential Revision: http://reviews.llvm.org/D3629



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208849 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 06:13:40 +00:00
Dinesh Dwivedi
d10a54f07f Added inst combine transforms for single bit tests from Chris's note
if ((x & C) == 0) x |= C becomes x |= C
if ((x & C) != 0) x ^= C becomes x &= ~C
if ((x & C) == 0) x ^= C becomes x |= C
if ((x & C) != 0) x &= ~C becomes x &= ~C
if ((x & C) == 0) x &= ~C becomes nothing

Z3 Verifications code for above transform
http://rise4fun.com/Z3/Pmsh

Differential Revision: http://reviews.llvm.org/D3717



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208848 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 06:01:33 +00:00
Jonathan Roelofs
af5e67a79b Fix some dyslexia in an assert message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208842 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 02:24:50 +00:00
Alp Toker
727273b11c Fix typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208839 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 01:52:21 +00:00
Jiangning Liu
66b123f0d8 [ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out argument stack from callee.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208837 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 01:33:17 +00:00
Eric Christopher
cea72fe763 Remove unused functions setting MCOptions from TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208835 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 01:25:04 +00:00
Eric Christopher
475ac5d302 Unify command line handling of MCTargetOptions and remove extra
options and code. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208833 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 01:10:50 +00:00
Eric Christopher
afc6099348 Move the TargetMachine MC options to MCTargetOptions. No functional
change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208832 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 01:08:00 +00:00
David Majnemer
e880187bb6 InstCombine: Optimize -x s< cst
Summary:
This gets rid of a sub instruction by moving the negation to the
constant when valid.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3773

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208827 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 00:02:20 +00:00
David Blaikie
dc3725862b DwarfDebug: Don't set frame index locations on abstract variables.
Abstract variables should never have/use locations. In this case the
data wasn't used, so no functional change intended here, just
simplification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208820 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-14 22:51:59 +00:00
David Blaikie
3f62ac3ac1 DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals.
Many old tests using prior schemas still had some brokenness here (both
indirect arrays and arrays with single bogus elements). Fixed those up
so they don't hit the new assertions.

Also reduced nesting in some places, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208817 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-14 21:52:46 +00:00
David Blaikie
fbb8f38bb7 DebugInfo: Assert that a CU's subprogram list contains only subprograms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208816 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-14 21:52:37 +00:00
Kevin Enderby
14963a696b Teach llvm-nm to know about fat archives (aka MachOUniversal files
containing archives).  First step as other tools will be updated next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208812 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-14 21:18:50 +00:00
Jay Foad
6b543713a2 Rename ComputeMaskedBits to computeKnownBits. "Masked" has been
inappropriate since it lost its Mask parameter in r154011.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-14 21:14:37 +00:00
David Majnemer
cd237ed585 InstSimplify: Optimize signed icmp of -(zext V)
Summary:
We know that -(zext V) will always be <= zero, simplify signed icmps
that have these.

Uncovered using http://www.cs.utah.edu/~regehr/souper/

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3754

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208809 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-14 20:16:28 +00:00
David Blaikie
e0776de2df DebugInfo: Do not delay attaching DW_AT_inline attribute to abstract definitions.
This is just unneccessary - we only create abstract definitions when
we're inlining anyway, so there's no reason to delay this to see if
we're going to inline anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208798 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-14 17:58:53 +00:00