Commit Graph

30133 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith
e3ae958f94 AsmPrinter: Emit the DwarfStringPool offset directly when possible
Change `DwarfStringPool` to calculate byte offsets on-the-fly, and
update `DwarfUnit::getLocalString()` to use a `DIEInteger` instead of a
`DIEDelta` when Dwarf doesn't use relocations (i.e., Mach-O).  This
eliminates another call to `EmitLabelDifference()`, and drops memory
usage from 865 MB down to 861 MB, around 0.5%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238114 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:14:59 +00:00
Duncan P. N. Exon Smith
237137532a DebugInfo: Clarify test/DebugInfo/X86/stmt-list-multiple-compile-units.ll
This test was relying on the numbering of preceding .set directives, but
an upcoming commit is going to remove some of them.  Make the CHECKs
more nuanced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238113 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:10:35 +00:00
Matt Arsenault
f44ed0919c Add target hook to allow merging stores of nonzero constants
On GPU targets, materializing constants is cheap and stores are
expensive, so only doing this for zero vectors was silly.

Most of the new testcases aren't optimally merged, and are for
later improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 00:51:27 +00:00
Benjamin Kramer
083d79a583 [AArch64] Clean up the ELF streamer a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 16:39:10 +00:00
Hal Finkel
43a5aa62d4 [PowerPC] Fix fast-isel when compare is split from branch
When the compare feeding a branch was in a different BB from the branch, we'd
try to "regenerate" the compare in the block with the branch, possibly trying
to make use of values not available there. Copy a page from AArch64's play book
here to fix the problem (at least in terms of correctness).

Fixes PR23640.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238097 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 12:18:10 +00:00
Akira Hatanaka
01461204b3 Stop resetting NoFramePointerElim in TargetMachine::resetTargetOptions.
This is part of the work to remove TargetMachine::resetTargetOptions.

In this patch, instead of updating global variable NoFramePointerElim in
resetTargetOptions, its use in DisableFramePointerElim is replaced with a call
to TargetFrameLowering::noFramePointerElim. This function determines on a
per-function basis if frame pointer elimination should be disabled.

There is no change in functionality except that cl:opt option "disable-fp-elim"
can now override function attribute "no-frame-pointer-elim". 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238080 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 01:14:08 +00:00
Akira Hatanaka
9484f5764c Remove unnecessary command line option "-disable-fp-elim".
This option currently has no effect as function attribute
"no-frame-pointer-elim=false" overrides it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238077 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 00:31:56 +00:00
Rafael Espindola
58bf2827d3 Revert "make reciprocal estimate code generation more flexible by adding command-line options"
This reverts commit r238051.

It broke some bots:

http://lab.llvm.org:8011/builders/llvm-ppc64-linux1/builds/18190

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 00:22:44 +00:00
Philip Reames
4e5aa77b3d Correct a mistaken comment from 238071 [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238074 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 00:05:43 +00:00
Rafael Espindola
7c4f3dcc5e Produce a single string table in a ELF .o
Normally an ELF .o has two string tables, one for symbols, one for section
names.

With the scheme of naming sections like ".text.foo" where foo is a symbol,
there is a big potential saving in using a single one.

Building llvm+clang+lld with master and with this patch the results were:

master:                          193,267,008 bytes
patch:                           186,107,952 bytes
master non unique section names: 183,260,192 bytes
patch non unique section names:  183,118,632 bytes

So using non usique saves 10,006,816 bytes, and the patch saves 7,159,056 while
still using distinct names for the sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238073 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 23:58:30 +00:00
Philip Reames
e00c0df2c4 Extend EarlyCSE to handle basic cases from JumpThreading and CVP
This patch extends EarlyCSE to take advantage of the information that a controlling branch gives us about the value of a Value within this and dominated basic blocks. If the current block has a single predecessor with a controlling branch, we can infer what the branch condition must have been to execute this block. The actual change to support this is downright simple because EarlyCSE's existing scoped hash table logic deals with most of the complexity around merging.

The patch actually implements two optimizations.
1) The first is analogous to JumpThreading in that it enables EarlyCSE's CSE handling to fold branches which are exactly redundant due to a previous branch to branches on constants. (It doesn't actually replace the branch or change the CFG.) This is pretty clearly a win since it enables substantial CFG simplification before we start trying to inline.
2) The second is analogous to CVP in that it exploits the knowledge gained to replace dominated *uses* of the original value. EarlyCSE does not otherwise reason about specific uses, so this is the more arguable one. It does enable further simplication and constant folding within the rest of the visit by EarlyCSE.

In both cases, the added code only handles the easy dominance based case of each optimization. The general case is deferred to the existing passes.

Differential Revision: http://reviews.llvm.org/D9763



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 23:53:24 +00:00
David Majnemer
12baade498 [InstCombine] Don't eagerly propagate nsw for A*B+A*C => A*(B+C)
InstCombine transforms A *nsw B +nsw A *nsw C to A *nsw (B + C).
This is incorrect -- e.g. if A = -1, B = 1, C = INT_SMAX. Then
nothing in the LHS overflows, but the multiplication in RHS overflows.

We need to first make sure that we won't multiple by INT_SMAX + 1.

Test case `add_of_mul` contributed by Sanjoy Das.

This fixes PR23635.

Differential Revision: http://reviews.llvm.org/D9629

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238066 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 23:02:11 +00:00
Ahmed Bougacha
d8319655f2 [AArch64][CGP] Sink zext feeding stxr/stlxr into the same block.
The usual CodeGenPrepare trickery, on a target-specific intrinsic.
Without this, the expansion of atomics will usually have the zext
be hoisted out of the loop, defeating the various patterns we have
to catch this precise case.

Differential Revision: http://reviews.llvm.org/D9930


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238054 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 21:37:17 +00:00
Rafael Espindola
6af60ebd57 Relax these tests a bit.
It is not relevant where in the string table the name is located.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238053 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 21:37:13 +00:00
Ahmed Bougacha
bde8616229 [AArch64] Robustize atomic cmpxchg test a little more. NFC.
We changed the test to test non-constant values in r238049.
We can also use CHECK-NEXT to be a little stricter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238052 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 21:35:14 +00:00
Sanjay Patel
7e80a67d35 make reciprocal estimate code generation more flexible by adding command-line options
This patch adds a class for processing many recip codegen possibilities.
The TargetRecip class is intended to handle both command-line options to llc as well
as options passed in from a front-end such as clang with the -mrecip option.

The x86 backend is updated to use the new functionality.
Only -mcpu=btver2 with -ffast-math should see a functional change from this patch.
All other CPUs continue to *not* use reciprocal estimates by default with -ffast-math.

Differential Revision: http://reviews.llvm.org/D8982



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238051 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 21:10:06 +00:00
Ahmed Bougacha
d3244b7749 [AArch64] Robustize atomic cmpxchg test. NFC.
Constants are easy to get right the wrong way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238049 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 21:08:15 +00:00
Quentin Colombet
57cc146595 Reapply r238011 with a fix for the trap instruction.
The problem was that I slipped a change required for shrink-wrapping, namely I
used getFirstTerminator instead of the getLastNonDebugInstr that was here before
the refactoring, whereas the surrounding code is not yet patched for that.

Original message:
[X86] Refactor the prologue emission to prepare for shrink-wrapping.

- Add a late pass to expand pseudo instructions (tail call and EH returns).
 Instead of doing it in the prologue emission.
- Factor some static methods in X86FrameLowering to ease code sharing.

NFC.

Related to <rdar://problem/20821487>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238035 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 18:10:47 +00:00
Bill Schmidt
490d207be4 [PPC64] Add support for clrbhrb, mfbhrbe, rfebb.
This patch adds support for the ISA 2.07 additions involving the
branch history rolling buffer and event-based branching.  These will
not be used by typical applications, so built-in support is not
required.  They will only be available via inline assembly.

Assembly/disassembly tests are included in the patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238032 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 16:44:10 +00:00
Rafael Espindola
7b677dd986 Stop inventing symbol sizes.
MachO and COFF quite reasonably only define the size for common symbols.

We used to try to figure out the "size" by computing the gap from one symbol to
the next.

This would not be correct in general, since a part of a section can belong to no
visible symbol (padding, private globals).

It was also really expensive, since we would walk every symbol to find the size
of one.

If a caller really wants this, it can sort all the symbols once and get all the
gaps ("size") in O(n log n) instead of O(n^2).

On MachO this also has the advantage of centralizing all the checks for an
invalid n_sect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238028 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 15:43:00 +00:00
Rafael Espindola
cc3f1db34c Detect invalid section indexes when we first read them.
We still detect the same errors, but now we do it earlier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238024 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 14:59:27 +00:00
John Brawn
8a95a5095d [ARM] Fix typo in subtarget feature list for 7em triple
The list of subtarget features for the 7em triple contains 't2xtpk',
which actually disables that subtarget feature. Correct that to
'+t2xtpk' and test that the instructions enabled by that feature do
actually work.

Differential Revision: http://reviews.llvm.org/D9936


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 14:16:22 +00:00
Rafael Espindola
05f7d4f508 Fix llvm-nm -S option.
It is explicitly documented to have no effect on object formats where symbols
don't have sizes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238019 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 13:28:35 +00:00
Rafael Espindola
c6174adb16 Make this test stricter. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 13:17:31 +00:00
NAKAMURA Takumi
b6b98c12d5 Revert r237954, "Resubmit r237708 (MIR Serialization: print and parse LLVM IR using MIR format)."
It brought cyclic dependencies between LLVMCodeGen and LLVMMIR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238007 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 07:17:07 +00:00
David Majnemer
fe0d65bcc6 [InstSimplify] Handle some overflow intrinsics in InstSimplify
This change does a few things:
- Move some InstCombine transforms to InstSimplify
- Run SimplifyCall from within InstCombine::visitCallInst
- Teach InstSimplify to fold [us]mul_with_overflow(X, undef) to 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237995 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 03:56:46 +00:00
Philip Reames
2c78f9499c [LICM] Sinking doesn't involve the preheader
PR23608 pointed out that using the preheader to gain a context instruction isn't always legal because a loop might not have a preheader.  When looking into that, I realized that using the preheader to determine legality for sinking is questionable at best.  Given no test covers that case and the original commit didn't seem to intend it, I restructured the code to only ask context sensative queries for hoising of loads and stores.  This is effectively a partial revert of 237593.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237985 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 02:14:05 +00:00
Hans Wennborg
253c092e56 Revert r236894 "[BasicAA] Fix zext & sext handling"
This seems to have caused PR23626: Clang miscompiles webkit's base64 decoder

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237984 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 01:27:37 +00:00
Peter Collingbourne
66811d9817 Revert r237590, "ARM: allow jump tables to be placed as constant islands."
Caused a miscompile of the Android port of Chromium, details
forthcoming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237972 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 23:20:55 +00:00
Jingyue Wu
41cf9ae1b8 [NaryReassoc] reassociate GEP for CSE
Summary:
x = &a[i];
y = &a[i + j];

=>

y = x + j;

along with some refactoring work such as extracting method
findClosestMatchingDominator.

Depends on D9786 which provides the ScalarEvolution::getGEPExpr interface.

Test Plan: nary-gep.ll

Reviewers: meheff, broune

Reviewed By: broune

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D9802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237971 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 23:17:30 +00:00
David Majnemer
41af60bdc0 [InstCombine] X - 0 is equal to X, not undef
A refactoring made @llvm.ssub.with.overflow.i32(i32 %X, i32 0) transform
into undef instead of %X.

This fixes PR23624.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237968 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 23:04:21 +00:00
Chad Rosier
676efa4d56 [AArch64] Enhance the load/store optimizer with target-specific alias analysis.
Phabricator: http://reviews.llvm.org/D9863

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237963 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 21:36:46 +00:00
Keno Fischer
b6976af3cd Make it easier to use DwarfContext with MCJIT
Summary:
This supersedes http://reviews.llvm.org/D4010, hopefully properly
dealing with the JIT case and also adds an actual test case.
DwarfContext was basically already usable for the JIT (and back when
we were overwriting ELF files it actually worked out of the box by
accident), but in order to resolve relocations correctly it needs
to know the load address of the section.
Rather than trying to get this out of the ObjectFile or requiring
the user to create a new ObjectFile just to get some debug info,
this adds the capability to pass in that info directly.
As part of this I separated out part of the LoadedObjectInfo struct
from RuntimeDyld, since it is now required at a higher layer.

Reviewers: lhames, echristo

Reviewed By: echristo

Subscribers: vtjnash, friss, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D6961

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237961 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 21:24:32 +00:00
Alex Lorenz
3e5034d130 Resubmit r237708 (MIR Serialization: print and parse LLVM IR using MIR format).
This commit is a 2nd attempt at committing the initial MIR serialization patch.
The first commit (r237708) made the incremental buildbots unstable and was 
reverted in r237730. The original commit didn't add a terminating null 
character to the LLVM IR source which was passed to LLParser, and this 
sometimes caused the test 'llvmIR.mir' to fail with a parsing error because 
the LLVM IR source didn't have a null character immediately after the end 
and thus LLLexer encountered some garbage characters that ultimately caused 
the error.

This commit also includes the other test fixes I committed in
r237712 (llc path fix) and r237723 (remove target triple) which
also got reverted in r237730.

--Original Commit Message--

MIR Serialization: print and parse LLVM IR using MIR format.

This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR 
using the MIR format. This pass is then added as a last pass when a 
'stop-after' option is used in llc. The new library adds the initial 
functionality for parsing of MIR files as well. This commit also 
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 20:54:45 +00:00
Bill Schmidt
63292d1bba [PPC64] Handle vpkudum mask pattern correctly when vpkudum isn't available
My recent patch to add support for ISA 2.07 vector pack/unpack
instructions didn't properly check for availability of the vpkudum
instruction when recognizing it as a special vector shuffle case.
This causes us to leave the vector shuffle in place (rather than
converting it to a vector permute) so that it can be recognized later
as a vpkudum, but that pattern is invalid for processors prior to
POWER8.  Thus LLVM crashes with an "unable to select" message.  We
observed this since one of our buildbots is configured to generate
code for a POWER7.

This patch fixes the problem by checking for availability of the
vpkudum instruction during custom lowering of vector shuffles.

I've added a test case variant for the vpkudum pattern when the
instruction isn't available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237952 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 20:48:49 +00:00
Adrian Prantl
849c7601a0 IR / debug info: Add a DWOId field to DICompileUnit,
so DWARF skeleton CUs can be expression in IR. A skeleton CU is a
(typically empty) DW_TAG_compile_unit that has a DW_AT_(GNU)_dwo_name and
a DW_AT_(GNU)_dwo_id attribute. It is used to refer to external debug info.

This is a prerequisite for clang module debugging as discussed in
http://lists.cs.uiuc.edu/pipermail/cfe-dev/2014-November/040076.html.
In order to refer to external types stored in split DWARF (dwo) objects,
such as clang modules, we need to emit skeleton CUs, which identify the
dwarf object (i.e., the clang module) by filename (the SplitDebugFilename)
and a hash value, the dwo_id.

This patch only contains the IR changes. The idea is that a CUs with a
non-zero dwo_id field will be emitted together with a DW_AT_GNU_dwo_name
and DW_AT_GNU_dwo_id attribute.

http://reviews.llvm.org/D9488
rdar://problem/20091852

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237949 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 20:37:30 +00:00
Hal Finkel
5368a26e16 [PPC/LoopUnrollRuntime] Don't avoid high-cost trip count computation on the PPC/A2
On X86 (and similar OOO cores) unrolling is very limited, and even if the
runtime unrolling is otherwise profitable, the expense of a division to compute
the trip count could greatly outweigh the benefits. On the A2, we unroll a lot,
and the benefits of unrolling are more significant (seeing a 5x or 6x speedup
is not uncommon), so we're more able to tolerate the expense, on average, of a
division to compute the trip count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237947 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 20:30:23 +00:00
Nemanja Ivanovic
24ed4de261 Add support for VSX scalar single-precision arithmetic in the PPC target
http://reviews.llvm.org/D9891
Following up on the VSX single precision loads and stores added earlier, this
adds support for elementary arithmetic operations on single precision values
in VSX registers. These instructions utilize the new VSSRC register class.
Instructions added:
xsaddsp
xsdivsp
xsmulsp
xsresp
xsrsqrtesp
xssqrtsp
xssubsp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237937 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 19:32:49 +00:00
Elena Demikhovsky
86425451e5 AVX-512: Enabled SSE intrinsics on AVX-512.
Predicate UseAVX depricates pattern selection on AVX-512.
This predicate is necessary for DAG selection to select EVEX form.
But mapping SSE intrinsics to AVX-512 instructions is not ready yet.
So I replaced UseAVX with HasAVX for intrinsics patterns.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237903 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 14:01:32 +00:00
Artur Pilipenko
5ac9604df7 Fix memory-dereferenceable.ll test
One of the testcases introduced by D9365 had incorrect !dereferenceable metadata on load. It must fail but it doesn't due to incorrect order of CHECK/CHECK-NOT commands in test. Fixed both.

Reviewed By: sanjoy

Differential Revision: http://reviews.llvm.org/D9877


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237897 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 12:51:38 +00:00
Simon Pilgrim
87d1836793 [X86][SSE] Improve support for 128-bit vector sign extension
This patch improves support for sign extension of the lower lanes of vectors of integers by making use of the SSE41 pmovsx* sign extension instructions where possible, and optimizing the sign extension by shifts on pre-SSE41 targets (avoiding the use of i64 arithmetic shifts which require scalarization).

It converts SIGN_EXTEND nodes to SIGN_EXTEND_VECTOR_INREG where necessary, that more closely matches the pmovsx* instruction than the default approach of using SIGN_EXTEND_INREG which splits the operation (into an ANY_EXTEND lowered to a shuffle followed by shifts) making instruction matching difficult during lowering. Necessary support for SIGN_EXTEND_VECTOR_INREG has been added to the DAGCombiner.

Differential Revision: http://reviews.llvm.org/D9848

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 10:05:03 +00:00
Toma Tabacu
cebe8f8b05 [mips] [IAS] Add 2 missing CHECK directives for fixups in mips-expansions.s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237884 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 10:04:39 +00:00
Hal Finkel
80bb2d981d [TableGen] Resolve complex def names inside multiclasses
We had not been trying hard enough to resolve def names inside multiclasses
that had complex concatenations, etc. Now we'll try harder.

Patch by Amaury Sechet!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237877 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 04:32:56 +00:00
Ahmed Bougacha
8eca988b00 [MemCpyOpt] Do move the memset, but look at its dest's dependencies.
In effect a partial revert of r237858, which was a dumb shortcut.
Looking at the dependencies of the destination should be the proper
fix: if the new memset would depend on anything other than itself,
the transformation isn't correct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237874 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 01:43:39 +00:00
Ahmed Bougacha
6d1485e974 [MemCpyOpt] Don't move the memset when optimizing memset+memcpy.
Fixes PR23599, another miscompile introduced by r235232: when there is
another dependency on the destination of the created memset (i.e., the
part of the original destination that the memcpy doesn't depend on)
between the memcpy and the original memset, we would insert the created
memset after the memcpy, and thus after the other dependency.

Instead, insert the created memset right after the old one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237858 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 23:55:16 +00:00
Andrew Kaylor
d0f4ffa472 [WinEH] C++ EH state numbering fixes
Differential Revision: http://reviews.llvm.org/D9787



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237854 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 23:22:24 +00:00
Reid Kleckner
7681f6a1b0 [WinEH] Store pointers to the LSDA in the exception registration object
We aren't yet emitting the LSDA yet, so this will still fail to
assemble.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237852 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 23:08:04 +00:00
Hans Wennborg
fa13c712af Revert r237828 "[X86] Remove unused node after morphing it from shr to and."
This caused assertions during DAG combine: PR23601.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237843 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 22:31:55 +00:00
Davide Italiano
e677c7bd22 [Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.
Ideally this is going to be and LLVM IR pass (shared, among others
with AArch64), but for the time being just enable it if consumers
ask us for optimization and not unconditionally.

Discussed with Tim Northover on IRC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 21:40:38 +00:00
Benjamin Kramer
644f1ff184 [X86] Remove unused node after morphing it from shr to and.
In some cases it won't get cleaned up properly leading to crashes
downstream. PR23353.

Based on a patch by Davide Italiano.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237828 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 20:10:26 +00:00