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27 Commits

Author SHA1 Message Date
Dan Gohman
9f23dee08c Start function numbering at 0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101638 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 16:29:15 +00:00
Dale Johannesen
b39b7e5ebf Split big test into multiple directories to cater to 
those who don't build all targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 20:43:35 +00:00
Evan Cheng
fac4f1f181 Enable machine cse pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98132 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-10 03:07:41 +00:00
Bob Wilson
516ab96de3 Run the pre-register allocation tail duplication pass by default. Remove 
the -pre-regalloc-taildup command-line option, and add a new
-disable-early-taildup option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93597 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-16 00:29:50 +00:00
Jim Grosbach
2be065a0e8 add testcase for r93564 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93567 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 22:27:37 +00:00
Jakob Stoklund Olesen
f8ad5bcdb5 Add test case for the phi reuse patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91642 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 00:11:44 +00:00
Evan Cheng
2ef9c8a43d More consistent thumb1 asm printing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89328 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-19 06:57:41 +00:00
Evan Cheng
d457e6e9a5 Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-07 04:04:34 +00:00
Jim Grosbach
6009751244 Enable allocation of R3 in Thumb1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84563 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 22:57:03 +00:00
Evan Cheng
892597943a Forgot about ARM::tPUSH. It also has a new writeback operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83237 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 05:03:07 +00:00
Evan Cheng
10469f8e48 ARM::tPOP and tPOP_RET each has an extra writeback operand now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83214 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 20:54:53 +00:00
Dan Gohman
fce288fc91 Eliminate more uses of llvm-as and llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:09:15 +00:00
Evan Cheng
0e87e23f6e v4, v5 does not support sxtb / sxth. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80322 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 00:31:43 +00:00
Evan Cheng
89d177f017 Fix an obvious copy-n-paste bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-20 17:01:04 +00:00
Evan Cheng
48bd7e3bbc tPOP_RET now has predicate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 06:05:07 +00:00
Evan Cheng
86e5f7b6f8 It's ok to spill a tGPR register as long as it's still allocated a low register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:40:51 +00:00
Evan Cheng
bae20a6353 tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77305 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-28 07:38:35 +00:00
Chris Lattner
634d61b135 remove a very large testcase for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76537 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 06:28:36 +00:00
David Greene
76081c4ef7 Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes 
next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76486 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 22:02:59 +00:00
Evan Cheng
33d0474bf5 Use TII->findCommutedOpIndices to find the commute operands (rather than guessing). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76472 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 21:16:08 +00:00
Evan Cheng
753480ad20 Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 19:47:55 +00:00
Evan Cheng
ba8dc03935 Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76398 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 06:10:07 +00:00
Evan Cheng
2f297df02e Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75360 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 07:08:13 +00:00
Evan Cheng
446c428bf3 Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically. 
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75359 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 06:43:01 +00:00
Evan Cheng
35bd43da76 Add missing tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74945 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 20:38:08 +00:00
Evan Cheng
2e1af3529b We should run these tests as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74121 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 21:36:26 +00:00
Evan Cheng
9f76ed5127 Move thumb and thumb2 tests into separate directories. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74068 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 06:36:07 +00:00