Commit Graph

9102 Commits

Author SHA1 Message Date
Evan Cheng
6cc1aeaad2 Don't update physical register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06 01:14:19 +00:00
Dale Johannesen
06a26637da Add some new bits of debug info handling. No
functional change yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06 00:03:23 +00:00
Dan Gohman
0fa9d1d901 Reapply r97778 and r97779, enabled only for unsigned i64 to f64
conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06 00:00:55 +00:00
Charles Davis
314fef6127 Don't emit global symbols into the (__TEXT,__ustring) section on Darwin. This
is a workaround for <rdar://problem/7672401/> (which I filed).

This let's us build Wine on Darwin, and it gets the Qt build there a little bit
further (so Doug says).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 22:28:45 +00:00
Jakob Stoklund Olesen
53e000bac3 Better handling of dead super registers in LiveVariables. We used to do this:
CALL ... %RAX<imp-def>
   ... [not using %RAX]
   %EAX = ..., %RAX<imp-use, kill>
   RET %EAX<imp-use,kill>

Now we do this:

   CALL ... %RAX<imp-def, dead>
   ... [not using %RAX]
   %EAX = ...
   RET %EAX<imp-use,kill>

By not artificially keeping %RAX alive, we lower register pressure a bit.

The correct number of instructions for 2008-08-05-SpillerBug.ll is obviously
55, anybody can see that. Sheesh.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97838 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 21:49:17 +00:00
Jakob Stoklund Olesen
a76e816844 We don't really care about correct register liveness information after the
post-ra scheduler has run. Disable the verifier checks that late in the game.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97837 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 21:49:13 +00:00
Jakob Stoklund Olesen
580bba2b0d Avoid creating bad PHI instructions when BR is being const-folded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97836 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 21:49:10 +00:00
Chris Lattner
18fdabadca Fix PR6497, a bug where we'd fold a load into an addc
node which has a flag.  That flag in turn was used by an
already-selected adde which turned into an ADC32ri8 which
used a selected load which was chained to the load we
folded.  This flag use caused us to form a cycle.  Fix
this by not ignoring chains in IsLegalToFold even in
cases where the isel thinks it can.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 06:19:13 +00:00
Chris Lattner
9bbcd5ee5b inline a small function with one call site.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 05:49:45 +00:00
Dan Gohman
b6b343d77a Revert r97778 and r97779. They're somehow breaking llvm-gcc builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 02:40:23 +00:00
Dan Gohman
808ab341b4 Fix these constants to be more portable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97779 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 02:13:10 +00:00
Dan Gohman
cfa7ca1997 Rewrite i64-to-f64 conversion using an algorithm which handles
rounding correctly. This implementation is a generalization of
the x86_64 code in compiler-rt.

This fixes rdar://7683708.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97778 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 02:00:46 +00:00
Dale Johannesen
b0812f114b Fix some more places where dbg_value affected codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 00:02:59 +00:00
Jeffrey Yasskin
e8cfa63e4e Fix memcheck-found leaks: one false positive from using new[], and one true
positive where pointers would be leaked on llvm_shutdown.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97759 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 22:15:01 +00:00
Jim Grosbach
b58a59b3c1 For SJLJ exception handling, make sure that all calls that are not marked
as nounwind are marked with a -1 call-site value. This is necessary to, for
example, correctly process exceptions thrown from within an "unexpected"
execption handler (see SingleSource/Regression/C++/EH/expection_spec_test.cpp).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97757 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 22:07:46 +00:00
Evan Cheng
c46e293e94 Run machine licm before machine cse to avoid messing up licm opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97752 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 21:28:09 +00:00
Evan Cheng
a5f32cb3d3 Avoid cse load instructions unless they are known to be invariant loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 21:18:08 +00:00
Chris Lattner
c19ae9d91d add a statistic for # times fastisel fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97738 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 19:46:56 +00:00
Dan Gohman
ba72b0c4e1 Fix a typo Duncan noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 19:11:28 +00:00
Evan Cheng
9763f709e2 Rename -machine-cse to -enable-machine-cse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97713 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 02:08:04 +00:00
Evan Cheng
b3958e8032 Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97706 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 01:33:55 +00:00
Chris Lattner
57bf8a483e change the new isel matcher to emit ComplexPattern matches
as the very last thing before node emission.  This should
dramatically reduce the number of times we do 'MatchAddress'
on X86, speeding up compile time.  This also improves comments
in the tables and shrinks the table a bit, now down to 
80506 bytes for x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97703 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 01:23:08 +00:00
Dan Gohman
6900a39d28 Fix more code to work properly with vector operands. Based on
a patch my Micah Villmow for PR6465.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 00:23:16 +00:00
Chris Lattner
2c4afd1d8e inline CannotYetSelectIntrinsic into CannotYetSelect and simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 00:21:16 +00:00
Evan Cheng
67bda7215b Fix a logic error. An instruction that has a live physical register def cannot be CSE'ed, but it *can* be used to replace a common subexpression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 23:59:08 +00:00
Evan Cheng
a92dced4a1 Remove PHINodeTraits and use MachineInstrExpressionTrait instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 23:55:49 +00:00
Evan Cheng
67eaa08f2b Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip over only virtual register defs. This matches what isEqual() is doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97680 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 23:37:30 +00:00
Evan Cheng
05bdcbb1ae Re-apply r97667 but with a little bit of thought put into the patch. This implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 23:27:36 +00:00
Dan Gohman
319dfa3fb3 Revert 97667. It broke a bunch of tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97673 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 22:40:03 +00:00
Evan Cheng
34cdf6edf5 Fix funky indentation and add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97670 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 21:54:14 +00:00
Evan Cheng
a054ae02fd Move DenseMapInfo for MachineInstr* to MachineInstr.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97667 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 21:47:16 +00:00
Dan Gohman
a72d2a210c Fix a bug in SelectionDAG's ReplaceAllUsesWith in the case where
CSE and recursive RAUW calls delete a node from the use list,
invalidating the use list iterator. There's currently no known
way to reproduce this in an unmodified LLVM, however there's no
fundamental reason why a SelectionDAG couldn't be formed which
would trigger this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97665 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 21:33:37 +00:00
Evan Cheng
16b48b8a05 Machine CSE work in progress. It's doing some CSE now. But implicit def of physical registers are getting in the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 21:20:05 +00:00
Evan Cheng
1423c70b8f Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97663 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 21:18:38 +00:00
Bill Wendling
fec8657351 Revert...
--- Reverse-merging r97592 into '.':
U    lib/CodeGen/TargetLoweringObjectFileImpl.cpp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97657 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 19:31:05 +00:00
Chris Lattner
da828e3c8c add some of the more obscure predicate types to the
Scope accelerator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97652 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 07:46:25 +00:00
Chris Lattner
f1b7c7d476 speed up scope node processing: if the first element of a scope
entry we're about to process is obviously going to fail, don't
bother pushing a scope only to have it immediately be popped.
This avoids a lot of scope stack traffic in common cases.

Unfortunately, this requires duplicating some of the predicate
dispatch.  To avoid duplicating the actual logic I pulled each
predicate out to its own static function which gets used in
both places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97651 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 07:31:15 +00:00
Chris Lattner
cfe2eab744 introduce a new SwitchTypeMatcher node (which is analogous to
SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it.  This
speeds up selection, particularly for X86 which has lots of 
variants of instructions with only type differences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97645 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 06:28:15 +00:00
Evan Cheng
6ba9554988 Work in progress. Finding some cse now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 02:48:20 +00:00
Bill Wendling
32f9eb2bc3 Use APInt instead of zext value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97631 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:58:01 +00:00
Evan Cheng
506049f29f - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality.
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97628 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:44:33 +00:00
Evan Cheng
d89347cb49 Add an option to enable machine cse (it's not doing anything yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97627 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 01:38:35 +00:00
Bill Wendling
7d9f2b93a3 This test case:
long test(long x) { return (x & 123124) | 3; }

Currently compiles to:

_test:
        orl     $3, %edi
        movq    %rdi, %rax
        andq    $123127, %rax
        ret

This is because instruction and DAG combiners canonicalize

  (or (and x, C), D) -> (and (or, D), (C | D))

However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97616 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 00:35:56 +00:00
Chris Lattner
d1b7382983 Fix some issues in WalkChainUsers dealing with
CopyToReg/CopyFromReg/INLINEASM.  These are annoying because
they have the same opcode before an after isel.  Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.

With that done, give IsLegalToFold a new flag that causes it to
ignore chains.  This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing.  This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.

I currently #if out the dead code in the X86 backend and MSP 
backend, I'll remove it for real in a follow-on patch.

The testcase changes are:
  test/CodeGen/X86/sse3.ll: we generate better code
  test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was 
      miscompiling this before, we now generate correct code
      Convert it to filecheck while I'm at it.
  test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
      folding to make anton happy. :)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 22:20:06 +00:00
Bill Wendling
d556155afd Okay. One last attempt:
Place the LSDA into the TEXT section on Mach-O. This saves space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97592 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 21:50:35 +00:00
Chris Lattner
00592ec857 run HandleMergeInputChains even if we only have one input chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:34:59 +00:00
Evan Cheng
ac1abde05b Swap parameters of isSafeToMove and isSafeToReMat for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97578 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:03:01 +00:00
Evan Cheng
c5bbba1e49 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97577 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 19:02:27 +00:00
Devang Patel
1eac3e7d1e Fix grammar.
Thanks Duncan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97572 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 17:58:15 +00:00
Chris Lattner
82dd3d38d9 Fix the xfail I added a couple of patches back. The issue
was that we weren't properly handling the case when interior
nodes of a matched pattern become dead after updating chain
and flag uses.  Now we handle this explicitly in 
UpdateChainsAndFlags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97561 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 07:50:03 +00:00