Commit Graph

74616 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
21384c4ea8 Revert r136528 "Enable compact region splitting by default."
While this generally helped x86-64, there was some large regressions
for i386.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136571 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 17:19:14 +00:00
Chandler Carruth
61377a1f3c Switch another of the old dependencies on implicitly produced synthetic
rules to the new explicitly listed TableGen rules. Somehow I missed this
in my original sweep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 10:10:23 +00:00
Chandler Carruth
c58247da70 Remove yet another buried and hidden implicit dependency: every single
sub-library for the targets depended on the core target CodeGen library.
This completely undermined the careful work to separate the those
libraries, especially the MC-layer ones. This surfaced as circular
dependencies when the libraries were built as shared libraries where
CMake doesn't allow cycles.

This should fix PR10537. I'll watch the bots to see if there is fallout
on other platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 08:47:05 +00:00
Bill Wendling
10c6d12a9f Revert r136253, r136263, r136269, r136313, r136325, r136326, r136329, r136338,
r136339, r136341, r136369, r136387, r136392, r136396, r136429, r136430, r136444,
r136445, r136446, r136253 pending review.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 05:42:50 +00:00
Sean Callanan
efd7919618 Added several architecture names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 01:29:54 +00:00
Jakob Stoklund Olesen
4af0f5fecb Revert "Don't check liveness of unallocatable registers."
The ARM target depends on CPSR liveness being tracked after register
allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30 00:57:25 +00:00
Chandler Carruth
2e1513d9cd Make my attempt to build up global deps variables actually utilize
globally scoped constructs. Also, round-trip these dependencies through
the LLVMConfig.cmake.in file thata is used by CMake-based clients of
"installed" (or built) LLVM trees.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136543 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:52:01 +00:00
Jakob Stoklund Olesen
eeb57c7701 Don't check liveness of unallocatable registers.
This includes registers like EFLAGS and ST0-ST7. We don't check for
liveness issues in the verifier and scavenger because registers will
never be allocated from these classes.

While in SSA form, we do care about the liveness of unallocatable
unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for
MachineDCE and MachineSinking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136541 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:36:21 +00:00
Jakob Stoklund Olesen
93e6f02759 Check for multiple defs in the machine code verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:02:48 +00:00
Owen Anderson
eb809f562e Correctly handle scattered operands where the bits of the operand are contiguous, but out of order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:01:18 +00:00
Jakob Stoklund Olesen
73e7dced38 Add an isSSA() flag to MachineRegisterInfo.
This flag is true from isel to register allocation when the machine
function is required to be in SSA form.  The TwoAddressInstructionPass
and PHIElimination passes clear the flag.

The SSA flag wil be used by the machine code verifier to check for SSA
form, and eventually an assertion can enforce it in +Asserts builds.
This will catch the common target error of creating machine code with
multiple defs of a virtual register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:51:22 +00:00
David Greene
05bce0beee Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136531 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:43:06 +00:00
Jakub Staszak
c8f34de5d6 Do not lose branch weights when lowering SwitchInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:25:21 +00:00
Jakob Stoklund Olesen
9162abb39f Enable compact region splitting by default.
This helps generate better code in functions with high register
pressure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136528 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:10:27 +00:00
Eric Christopher
ef7f1e71f7 Add support for the 'Q' constraint.
Fixes rdar://9866494


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 21:18:58 +00:00
David Greene
b4f4cbd199 Remove a blank line from the top.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136511 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:50:18 +00:00
Chris Lattner
4cea5bae82 have the verifier catch gep's into opaque struct types. PR10473
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:32:28 +00:00
Jim Grosbach
e1cf5902ec ARM SRS instruction parsing, diassembly and encoding support.
Fix the instruction encoding for operands. Refactor mode to use explicit
instruction definitions per FIXME to be more consistent with loads/stores.
Fix disassembler accordingly. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136509 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:26:09 +00:00
Chandler Carruth
c91d6263cf On mac, it seems the MC disassembler is actually using the targetinfo
for targets that don't have an MC-ized disassembler. I'm suspicious that
this shouldn't actually be happening, but hoping to fix the CMake build
on macs first, and investigate why second.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:23:34 +00:00
Jakub Staszak
95ece8efc0 Remove unneeded const_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136506 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:05:36 +00:00
Jim Grosbach
33768dba54 ARM CPS mode immediate is 5 bits, not 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:02:39 +00:00
Devang Patel
6e8bb8a0cb Clear DbgValues in the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136503 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:49:58 +00:00
Jakub Staszak
6f6baf1bdd Add more constantness in BranchProbabilityInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:30:00 +00:00
David Greene
78621a851a [AVX] Make DagInits Unique
Make sure DagInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136501 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:26 +00:00
David Greene
65bf3ca9aa [AVX] Make FieldInit Unique
Make sure FieldInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136500 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:24 +00:00
David Greene
08f71e3e74 [AVX] Make VarListElementInit Unique
Make sure VarListElementInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136499 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:23 +00:00
David Greene
aa839b8fa3 [AVX] Make VarBitInit Unique
Make sure VarBitInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:22 +00:00
David Greene
e0be0e361a [AVX] Make VarInit Unique
Make sure VarInits are unique and created only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:21 +00:00
David Greene
b76a1e6993 [AVX] Make TernOpInit Unique
Make sure TernOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136496 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:20 +00:00
David Greene
65a5b8cb3b [AVX] Make BinOpInit Unique
Make sure BinOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:19 +00:00
David Greene
6f03b636d2 [AVX] Make UnOpInit Unique
Make sure UnOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:18 +00:00
David Greene
aad4c9fc37 [AVX] Make ListInits Unique
Ensure ListInits are unique and only created once.  This will be
important for AVX as lists will be used extensively to pass generic
patterns, prefix information and other things to lower-level
pattern-generation classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:16 +00:00
David Greene
637b4ffa01 [AVX] Make CodeInit Unique
Use a StringMap to ensure CodeInits are unique and created only
once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136492 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:15 +00:00
David Greene
d0e9d04ab0 [AVX] Make StringInit Unique
Use a StringMap to ensure the StringInits are unique.  This is
especially important for AVX where we will have many smallish
strings representing instruction prefixes, suffixes and the like.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136491 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:14 +00:00
David Greene
2855b0f073 [AVX] Make IntInit Unique
Use a DenseMap to make sure only one IntInit of any value exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136490 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:12 +00:00
David Greene
726bbde3c4 [AVX] Make BitsInit Unique
Make BitsInit a FoldingSetNode so we can unique it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136489 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:11 +00:00
David Greene
0ffd167a01 [AVX] Unique BitInit
Keep only two copies of BitInit: one for true and one for false.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:10 +00:00
David Greene
ba1ae18287 [AVX] Unique UnsetInit
Keep only one UnsetInit around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:09 +00:00
David Greene
dcd35c797d [AVX] Create Inits Via Factory Method
Replace uses of new *Init with *Init::get.  This hides the allocation
implementation so that we can unique Inits in various ways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:07 +00:00
David Greene
f37dd02f77 [AVX] Constify Inits
Make references to Inits const everywhere.  This is the final step
before making them unique.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:05 +00:00
David Greene
60c04af787 [AVX] Remove non-const Iterators
Remove all non-const iterators from Init classes.  This is another
step toward constifying Inits and ultimately turning them into
FoldingSetNodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136484 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:02 +00:00
David Greene
ca7fd3de36 [AVX] Remove Mutating Members from Inits
Get rid of all Init members that modify internal state.  This is in
preparation for making references to Inits const.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:00 +00:00
David Greene
c45a2cacd0 Add ListInit::getValues
Add a getValues ListInit method to return the sequence of values in
the list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:06:59 +00:00
David Greene
cd0bc905d2 Add a std::string Wrapper for TableGen
Create a std::string wrapper for use as a DenseMap key.  DenseMap is
not safe in generate with strings, so this wrapper indicates that only
strings guaranteed not to have certain values should be used in the
DenseMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:06:58 +00:00
Devang Patel
1619560521 Clean up debug info after reassociation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136480 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:00:35 +00:00
Jim Grosbach
2c6363a62d ARM assembly parsing and encoding for RFE instruction.
Fill in the missing fixed bits and the register operand bits of the instruction
encoding. Refactor the definition to make the mode explicit, which is
consistent with how loads and stores are normally represented and makes
parsing much easier. Add parsing aliases for pseudo-instruction variants.
Update the disassembler for the new representations. Add tests for parsing and
encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136479 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 18:47:24 +00:00
Owen Anderson
ea2429896a Third time's the charm for implementing tied operand decoding properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 18:28:52 +00:00
Nick Lewycky
2b9c50776a Don't look at $PWD in GetCurrentDirectory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 18:26:59 +00:00
Jim Grosbach
5a28748360 ARM SRS and RFE instructions are not code-gen only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136475 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 17:51:39 +00:00
Jim Grosbach
b48ce900f9 ARM range checking for mode on CPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136473 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 17:42:17 +00:00