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17623 Commits

Author SHA1 Message Date
Daniel Dunbar
6ec56204f3 McARM: Fill in ASMOperand::dump() for memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123745 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 05:55:21 +00:00
Daniel Dunbar
2637dc9a25 McARM: Make ARMOperand use a union where appropriate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123744 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 05:55:15 +00:00
Daniel Dunbar
05d8b71424 McARM: Unify ParseMemory() successfull return. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123740 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 05:34:24 +00:00
Daniel Dunbar
0571093f4c McARM: Early exit on failure (NEFC). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 05:34:17 +00:00
Daniel Dunbar
d3df5f32c0 McARM: Always keep an offset expression, if used (instead of assuming == 0 if used but not present), and simplify logic. 
Also, clean up various non-sensicalisms in isMemModeRegThumb() and isMemModeImmThumb().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123738 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 05:34:11 +00:00
Daniel Dunbar
023835d51b McARM: Add a variety of asserts on the sanity of memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123737 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 05:34:05 +00:00
Daniel Dunbar
81f453c4b9 McARM: Use a consistent marker for not-set OffsetRegNum. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123736 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 05:33:57 +00:00
Daniel Dunbar
2e3cea3153 McARM: Start marking T2 address operands as such, for the benefit of the parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 03:06:03 +00:00
Eric Christopher
cdfe3c359b The stub routine that we're calling uses test and so clobbers 
the flags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123712 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 01:37:20 +00:00
Chris Lattner
32899199c0 minor change to rafael's recent patches: if something is 
constant but requires a unique address, we can still put it in a
readonly section, just not a mergable one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123711 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 01:23:44 +00:00
Jeffrey Yasskin
955ed73d12 Remove unused variables found by gcc-4.6's -Wunused-but-set-variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 00:51:23 +00:00
Douglas Gregor
e735882224 Add a missing <cctype> include, from Joerg Sonnenberger! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123670 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-17 19:17:01 +00:00
Kalle Raiskila
9dcb98cbe7 Split up RotateShift itinerary in SPU. 
'rotq*' and 'shlq*' instructions go to the odd pipeline,
wheras the inter-vector equivalents 'rot*', 'shl*' go 
to the even.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123622 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-17 13:33:19 +00:00
Kalle Raiskila
8702e8be8d Don't crash SPU BE with memory accesses with big alignmnet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123620 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-17 11:59:20 +00:00
Evan Cheng
5de5d4b6d0 Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. 
movw    r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4))
        movt    r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4))
LPC0_0:
        add     r0, pc, r0

It's not yet enabled by default as some tests are failing. I suspect bugs in
down stream tools.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123619 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-17 08:03:18 +00:00
Anton Korobeynikov
1d8334eabc Provide instruction sizes for ARMv5 variants of MUL instructions. 
This fixes PR8987

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123598 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 21:28:33 +00:00
Anders Carlsson
5822b86e4d Update README.txt to remove the DAE enhancement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123597 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 21:26:15 +00:00
Rafael Espindola
7010401c6b Only put unnamed_addr constants in mergeable sections. Fixes PR8297. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123585 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 17:19:34 +00:00
Chris Lattner
dec28ceb02 fix PR8514, a bug where the "heroic" transformation of shift/and 
into and/shift would cause nodes to move around and a dangling pointer
to happen.  The code tried to avoid this with a HandleSDNode, but 
got the details wrong.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123578 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 08:48:11 +00:00
Chris Lattner
b0daffc609 add some commentary 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123572 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 06:39:44 +00:00
Evan Cheng
df55fea807 Spill R4 if it's going to be used to restore SP from FP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123567 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 05:14:33 +00:00
Venkatraman Govindaraju
c1a62834a2 Implement AnalyzeBranch in Sparc Backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123561 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 03:15:11 +00:00
Chris Lattner
9cd3da47f9 fix PR8981, a crash trying to form a conditional inc with a floating point compare. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 02:56:53 +00:00
Chris Lattner
b99fdee325 reapply my fix for PR8961 with a tweak to properly handle 
multi-instruction sequences like calls.  Many thanks to Jakob for
finding a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123559 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 02:27:38 +00:00
Chandler Carruth
cad33c624e Simplify a README.txt entry significantly to expose the core issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123556 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 01:40:23 +00:00
Eric Christopher
a0f720f500 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123505 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-15 00:25:09 +00:00
Bob Wilson
ca3f06963c Fix a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123497 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-15 00:09:18 +00:00
Eric Christopher
41262da6cc Fix 80-cols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123494 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 23:50:53 +00:00
Ted Kremenek
d7f696edec 'HiReg' is written but never read. Nuke its 
declaration and its assignments.

Found by clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 22:34:13 +00:00
Anton Korobeynikov
3965b5e974 Add a possibility to switch between CFI directives- and table-based frame description emission. Currently all the backends use table-based stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123476 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 21:58:08 +00:00
Anton Korobeynikov
e749911372 Cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123475 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 21:57:58 +00:00
Chris Lattner
d357e88740 revert my fastisel patch again which apparently still gives the 
llvm-gcc-i386-linux-selfhost buildbot heartburn...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 06:14:33 +00:00
Chris Lattner
9e27cc8049 reapply r123414 now that the botz are calmed down and the fix is already in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123427 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 04:24:28 +00:00
Evan Cheng
f3eb3bba16 Completed :lower16: / :upper16: support for movw / movt pairs on Darwin. 
- Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first.
- Added support for Thumb2 :lower16: and :upper16: fix up.
- Added :upper16: and :lower16: relocation support to mach-o object writer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 02:38:49 +00:00
Chris Lattner
a899d1c264 r123414 broke llvm-gcc bootstrap apparently, revert 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123422 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 02:07:32 +00:00
Chris Lattner
d754041493 fix PR8961 - a fast isel miscompilation where we'd insert a new instruction 
after sext's generated for addressing that got folded.  Previously we compiled
test5 into:

_test5:                                 ## @test5
## BB#0:
        movq    -8(%rsp), %rax          ## 8-byte Reload
        movq    (%rdi,%rax), %rdi
        addq    %rdx, %rdi
        movslq  %esi, %rax
        movq    %rax, -8(%rsp)          ## 8-byte Spill
        movq    %rdi, %rax
        ret

which is insane and wrong.  Now we produce:

_test5:                                 ## @test5
## BB#0:
	movslq	%esi, %rax
	movq	(%rdi,%rax), %rax
	addq	%rdx, %rax
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123414 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 00:01:01 +00:00
Owen Anderson
0c9f250d54 Recognize alternative register names like ip -> r12. 
Fixes <rdar://problem/8857982>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123409 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 22:50:36 +00:00
Jakob Stoklund Olesen
f7ca976e74 Fix a few more places that should use MBB::getLastNonDebugInstr(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123408 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 22:47:43 +00:00
Chris Lattner
4c5456a56f typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123406 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 22:11:56 +00:00
Chris Lattner
4cd18f98f7 memcpy + metadata = bliss :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123405 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 22:08:15 +00:00
Owen Anderson
e4e5e2aae7 Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting 
the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.

With this, we can properly pretty-print and encode assembly like:
	mrc p15, #0, r3, c13, c0, #3

Fixes <rdar://problem/8857858>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123404 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 21:46:02 +00:00
Jakob Stoklund Olesen
4f28c1c714 Teach frame lowering to ignore debug values after the terminators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 21:28:52 +00:00
Bob Wilson
422578547e Tidy comments, indentation, and 80-column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123397 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 21:10:12 +00:00
Kevin Enderby
67b212e03b Fix ARMAsmParser::ParseOperand() to allow it to parse . as a branch target and 
directional local labels like 1f and 2b.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123393 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 20:32:36 +00:00
Jim Grosbach
5f3e2be7c9 When updating a tSpill/tRestore instruction to be a tSTRr/tLDRr, correctly 
set up the source operands. The original instr has an immediate operand that
should be replaced with the frame reg operand rather than just adding the
reg operand. Previously, the instruction ended up with too many operands
causing an assert() when adding the default predicate. rdar://8825456

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123387 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 19:16:48 +00:00
Evan Cheng
7597212abc Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step 
in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123369 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 07:58:56 +00:00
Eric Christopher
04f5079ca1 Experiment with changing the default 32-bit linux stack alignment to 
16 bytes for PR8969. Update all testcases accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123367 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 06:47:10 +00:00
Kevin Enderby
fef9ff4922 Add a FIXME and two asserts for now in the ARMAsmParser when it sees .code 16 or 
.code 32 if the TargetMachine's isThumb() boolean does not match.  The correct
fix is to switch ARM subtargets at that point and is tracked by rdar://8856789
which is bigger task.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123353 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 01:07:01 +00:00
Jason W Kim
8a8696db6b Change call to Error() to assert() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123350 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 00:27:00 +00:00
Jason W Kim
8dc602d245 Added clarifying comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123341 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-12 23:25:02 +00:00